Provides *SEQUENTIAL* access to the packet slots in an isochronous transfer descriptor. As some HCs may pack the buffer space tightly, with one packet starting immediately after the preceeding one, random access is not possible -- in this implementation, even replacing the content of a slot with another packet of the same size is not 'intentionally' possible. Note that reading data is possible in a random access manner -- the sequential constraint only applies to writing. Intended to be available to 3rd parties later