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Boot Table MMU Permission and Cache Attribute Definitions

Lists MMU attributes that the bootstrap implementation must provide.

The definitions are summarised in the following table. Each entry type is identified by its TBootTableEntry enumerator value that defines its position within the table. This group of entries always follows the function entries.

Enumerator symbol	Summary description
`BTP_Rom`	Defines permissions for XIP ROM areas, including RAM used as ROM.
`BTP_Kernel`	Defines permissions for kernel data, initial kernel stack and initial kernel heap.
`BTP_SuperCPU`	Defines permissions for super page and CPU page.
`BTP_PageTable`	Defines permissions for page directory and page tables.
`BTP_Vector`	Defines permissions for ARM exception vector mapping.
`BTP_Hw`	Defines permissions for I/O mappings.
`BTP_MiniCache`	Defines permissions for mini cache flush area, if required.
`BTP_MainCache`	Defines permissions for main cache flush area, if required.
`BTP_PtInfo`	Defines permissions for page table info and, for the multiple memory model, ASID info.
`BTP_User`	Defines permissions for user memory area in direct memory model.
`BTP_Temp`	Defines permissions for temporary identity mapping of code while enabling MMU.
`BTP_Uncached`	Defines permissions for dummy uncached area mapping on moving or multiple model and for identity RAM mapping on direct memory model.

Each entry is defined using the BTP_ENTRY macro. See this macro for a detailed description of the syntax and meanings.

Take the template port, in os/kernelhwsrv/bsptemplate/asspandvariant/template_variant/bootstrap/template.s as an example. The first two entries, at position BTP_Rom and position BTP_Kernel in the boot table, follow the last function entry at position BTF_EnableMMU within the table. This gives the following code:

BootTable
        DCD    DoWriteC                    ; output a debug character
        ...
    
IF    CFG_MMUPresent

        BTP_ENTRY    CLIENT_DOMAIN, PERM_RORO, CACHE_WTRA,    0    ; ROM
        BTP_ENTRY    CLIENT_DOMAIN, PERM_RWNO, CACHE_WBRA,    0    ; kernel data/stack/heap
        ...

Parent topic: Platform-Specific Source Code