author | William Roberts <williamr@symbian.org> |
Wed, 31 Mar 2010 12:33:34 +0100 | |
branch | Symbian3 |
changeset 4 | 837f303aceeb |
parent 2 | 2fe1408b6811 |
permissions | -rw-r--r-- |
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/*-------------------------------------------------------------------- |
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*© Portions copyright (c) 2006 Nokia Corporation. All rights reserved. |
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*-------------------------------------------------------------------- |
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*/ |
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/*- |
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* Copyright (c) 2004-2005 David Schultz <das@FreeBSD.ORG> |
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* All rights reserved. |
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* |
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* Redistribution and use in source and binary forms, with or without |
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* modification, are permitted provided that the following conditions |
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* are met: |
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* 1. Redistributions of source code must retain the above copyright |
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* notice, this list of conditions and the following disclaimer. |
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* 2. Redistributions in binary form must reproduce the above copyright |
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* notice, this list of conditions and the following disclaimer in the |
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* documentation and/or other materials provided with the distribution. |
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* |
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND |
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE |
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS |
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY |
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
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* SUCH DAMAGE. |
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* |
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* $FreeBSD: src/lib/msun/arm/fenv.h,v 1.5 2005/03/16 19:03:45 das Exp $ |
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*/ |
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#ifndef _FENV_H_ |
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#define _FENV_H_ |
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#include <sys/_types.h> |
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#ifdef __WINSCW__ |
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/*to supress warnings 'arguments not used in function' |
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This warnings crop up wherever fevn.h is included. So |
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it is desirable to supress it here. The warning arises as a |
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fact that these arguments are used within macros which get |
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get replaced at the time of pre-processing and thus the |
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compiler(s)warning 'argument/variable is not used in function*/ |
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#pragma warn_unusedarg off |
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#endif //__WINSCW__ |
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typedef __uint32_t fenv_t; |
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typedef __uint32_t fexcept_t; |
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/* Exception flags */ |
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#define FE_INVALID 0x0001 |
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#define FE_DIVBYZERO 0x0002 |
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#define FE_OVERFLOW 0x0004 |
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#define FE_UNDERFLOW 0x0008 |
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#define FE_INEXACT 0x0010 |
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#define FE_ALL_EXCEPT (FE_DIVBYZERO | FE_INEXACT | \ |
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FE_INVALID | FE_OVERFLOW | FE_UNDERFLOW) |
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/* Rounding modes */ |
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#define FE_TONEAREST 0x0000 |
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#define FE_TOWARDZERO 0x0001 |
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#define FE_UPWARD 0x0002 |
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#define FE_DOWNWARD 0x0003 |
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#define _ROUND_MASK (FE_TONEAREST | FE_DOWNWARD | \ |
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FE_UPWARD | FE_TOWARDZERO) |
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__BEGIN_DECLS |
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/* Default floating-point environment */ |
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extern const fenv_t __fe_dfl_env; |
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#define FE_DFL_ENV (&__fe_dfl_env) |
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/* We need to be able to map status flag positions to mask flag positions */ |
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#define _FPUSW_SHIFT 16 |
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#define _ENABLE_MASK (FE_ALL_EXCEPT << _FPUSW_SHIFT) |
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#ifdef ARM_HARD_FLOAT |
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#define __rfs(__fpsr) __asm __volatile("rfs %0" : "=r" (*(__fpsr))) |
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#define __wfs(__fpsr) __asm __volatile("wfs %0" : : "r" (__fpsr)) |
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#else |
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#define __rfs(__fpsr) |
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#define __wfs(__fpsr) |
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#endif |
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static __inline int |
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feclearexcept(int __excepts) |
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{ |
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#ifdef __SYMBIAN32__ |
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fexcept_t __fpsr = 0; |
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#else |
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fexcept_t __fpsr ; |
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#endif //__SYMBIAN32__ |
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__rfs(&__fpsr); |
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__fpsr &= ~__excepts; |
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__wfs(__fpsr); |
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return (0); |
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} |
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static __inline int |
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fegetexceptflag(fexcept_t *__flagp, int __excepts) |
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{ |
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#ifdef __SYMBIAN32__ |
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fexcept_t __fpsr = 0; |
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#else |
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fexcept_t __fpsr ; |
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#endif //__SYMBIAN32__ |
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__rfs(&__fpsr); |
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*__flagp = __fpsr & __excepts; |
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return (0); |
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} |
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113 |
|
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114 |
static __inline int |
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fesetexceptflag(const fexcept_t *__flagp, int __excepts) |
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116 |
{ |
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117 |
#ifdef __SYMBIAN32__ |
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fexcept_t __fpsr = 0; |
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119 |
#else |
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fexcept_t __fpsr ; |
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121 |
#endif //__SYMBIAN32__ |
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122 |
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123 |
__rfs(&__fpsr); |
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__fpsr &= ~__excepts; |
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__fpsr |= *__flagp & __excepts; |
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126 |
__wfs(__fpsr); |
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return (0); |
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128 |
} |
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129 |
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130 |
static __inline int |
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131 |
feraiseexcept(int __excepts) |
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132 |
{ |
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133 |
fexcept_t __ex = __excepts; |
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134 |
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135 |
fesetexceptflag(&__ex, __excepts); /* XXX */ |
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136 |
return (0); |
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137 |
} |
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138 |
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139 |
static __inline int |
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fetestexcept(int __excepts) |
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141 |
{ |
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142 |
#ifdef __SYMBIAN32__ |
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fexcept_t __fpsr = 0; |
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144 |
#else |
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fexcept_t __fpsr ; |
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146 |
#endif //__SYMBIAN32__ |
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147 |
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148 |
__rfs(&__fpsr); |
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149 |
return (__fpsr & __excepts); |
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150 |
} |
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151 |
|
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152 |
static __inline int |
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153 |
fegetround(void) |
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154 |
{ |
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155 |
|
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156 |
/* |
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* Apparently, the rounding mode is specified as part of the |
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158 |
* instruction format on ARM, so the dynamic rounding mode is |
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* indeterminate. Some FPUs may differ. |
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160 |
*/ |
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161 |
return (-1); |
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162 |
} |
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163 |
|
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164 |
static __inline int |
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165 |
fesetround(int __round) |
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166 |
{ |
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167 |
|
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168 |
return (-1); |
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169 |
} |
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170 |
|
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171 |
static __inline int |
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172 |
fegetenv(fenv_t *__envp) |
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173 |
{ |
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174 |
|
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175 |
__rfs(__envp); |
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176 |
return (0); |
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177 |
} |
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178 |
|
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179 |
static __inline int |
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180 |
feholdexcept(fenv_t *__envp) |
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181 |
{ |
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182 |
#ifdef __SYMBIAN32__ |
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183 |
fenv_t __env = 0; |
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184 |
#else |
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185 |
fenv_t __env ; |
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186 |
#endif //__SYMBIAN32__ |
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187 |
|
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188 |
__rfs(&__env); |
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189 |
*__envp = __env; |
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190 |
__env &= ~(FE_ALL_EXCEPT | _ENABLE_MASK); |
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191 |
__wfs(__env); |
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192 |
return (0); |
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193 |
} |
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194 |
|
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195 |
static __inline int |
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196 |
fesetenv(const fenv_t *__envp) |
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197 |
{ |
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198 |
|
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199 |
__wfs(*__envp); |
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200 |
return (0); |
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201 |
} |
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202 |
|
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203 |
static __inline int |
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204 |
feupdateenv(const fenv_t *__envp) |
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205 |
{ |
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206 |
#ifdef __SYMBIAN32__ |
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207 |
fexcept_t __fpsr = 0; |
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208 |
#else |
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209 |
fexcept_t __fpsr ; |
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210 |
#endif //__SYMBIAN32__ |
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211 |
|
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212 |
__rfs(&__fpsr); |
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213 |
__wfs(*__envp); |
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214 |
feraiseexcept(__fpsr & FE_ALL_EXCEPT); |
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215 |
return (0); |
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216 |
} |
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217 |
|
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218 |
#if __BSD_VISIBLE |
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219 |
|
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220 |
static __inline int |
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221 |
feenableexcept(int __mask) |
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222 |
{ |
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223 |
#ifdef __SYMBIAN32__ |
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fenv_t __old_fpsr = 0, __new_fpsr= 0; |
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225 |
#else |
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226 |
fenv_t __old_fpsr, __new_fpsr; |
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227 |
#endif //__SYMBIAN32__ |
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228 |
|
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229 |
__rfs(&__old_fpsr); |
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230 |
__new_fpsr = __old_fpsr | (__mask & FE_ALL_EXCEPT) << _FPUSW_SHIFT; |
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__wfs(__new_fpsr); |
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return ((__old_fpsr >> _FPUSW_SHIFT) & FE_ALL_EXCEPT); |
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} |
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static __inline int |
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fedisableexcept(int __mask) |
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{ |
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#ifdef __SYMBIAN32__ |
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fenv_t __old_fpsr =0, __new_fpsr =0; |
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#else |
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fenv_t __old_fpsr, __new_fpsr; |
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#endif //__SYMBIAN32__ |
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__rfs(&__old_fpsr); |
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__new_fpsr = __old_fpsr & ~((__mask & FE_ALL_EXCEPT) << _FPUSW_SHIFT); |
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__wfs(__new_fpsr); |
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return ((__old_fpsr >> _FPUSW_SHIFT) & FE_ALL_EXCEPT); |
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} |
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static __inline int |
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fegetexcept(void) |
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{ |
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#ifdef __SYMBIAN32__ |
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fexcept_t __fpsr = 0; |
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#else |
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fexcept_t __fpsr ; |
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#endif //__SYMBIAN32__ |
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__rfs(&__fpsr); |
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return ((__fpsr & _ENABLE_MASK) >> _FPUSW_SHIFT); |
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} |
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#endif /* __BSD_VISIBLE */ |
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__END_DECLS |
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#endif /* !_FENV_H_ */ |