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1 Unsolved issues/bugs in the mips/mipsel backend |
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2 ----------------------------------------------- |
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3 |
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4 General |
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5 ------- |
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6 - Unimplemented ASEs: |
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7 - MIPS16 |
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8 - MDMX |
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9 - SmartMIPS |
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10 - DSP r1 |
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11 - DSP r2 |
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12 - MT ASE only partially implemented and not functional |
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13 - Shadow register support only partially implemented, |
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14 lacks set switching on interrupt/exception. |
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15 - 34K ITC not implemented. |
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16 - A general lack of documentation, especially for technical internals. |
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17 Existing documentation is x86-centric. |
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18 - Reverse endianness bit not implemented |
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19 - The TLB emulation is very inefficient: |
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20 Qemu's softmmu implements a x86-style MMU, with separate entries |
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21 for read/write/execute, a TLB index which is just a modulo of the |
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22 virtual address, and a set of TLBs for each user/kernel/supervisor |
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23 MMU mode. |
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24 MIPS has a single entry for read/write/execute and only one MMU mode. |
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25 But it is fully associative with randomized entry indices, and uses |
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26 up to 256 ASID tags as additional matching criterion (which roughly |
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27 equates to 256 MMU modes). It also has a global flag which causes |
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28 entries to match regardless of ASID. |
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29 To cope with these differences, Qemu currently flushes the TLB at |
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30 each ASID change. Using the MMU modes to implement ASIDs hinges on |
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31 implementing the global bit efficiently. |
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32 - save/restore of the CPU state is not implemented (see machine.c). |
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33 |
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34 MIPS64 |
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35 ------ |
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36 - Userland emulation (both n32 and n64) not functional. |
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37 |
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38 "Generic" 4Kc system emulation |
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39 ------------------------------ |
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40 - Doesn't correspond to any real hardware. Should be removed some day, |
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41 U-Boot is the last remaining user. |
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42 |
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43 PICA 61 system emulation |
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44 ------------------------ |
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45 - No framebuffer support yet. |
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46 |
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47 MALTA system emulation |
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48 ---------------------- |
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49 - We fake firmware support instead of doing the real thing |
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50 - Real firmware (YAMON) falls over when trying to init RAM, presumably |
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51 due to lacking system controller emulation. |
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52 - Bonito system controller not implemented |
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53 - MSC1 system controller not implemented |