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// Copyright (c) 1994-2009 Nokia Corporation and/or its subsidiary(-ies).
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// All rights reserved.
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// This component and the accompanying materials are made available
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// under the terms of the License "Eclipse Public License v1.0"
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// which accompanies this distribution, and is available
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// at the URL "http://www.eclipse.org/legal/epl-v10.html".
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//
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// Initial Contributors:
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// Nokia Corporation - initial contribution.
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//
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// Contributors:
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//
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// Description:
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// omap3530/omap3530_drivers/gpio/gpio_interrupts.cpp
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//
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#include <e32cmn.h>
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#include <nk_priv.h>
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#include <assp/omap3530_assp/omap3530_gpio.h>
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#include <assp/omap3530_assp/omap3530_irqmap.h>
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#include <assp/omap3530_assp/omap3530_ktrace.h>
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#include <assp/omap3530_assp/omap3530_assp_priv.h>
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#include <assp/omap3530_assp/locks.h>
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NONSHARABLE_CLASS( TGpioDispatcher ) : public MInterruptDispatcher
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{
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public:
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TGpioDispatcher();
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TInt Init();
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virtual TInt Bind(TInt aId, TIsr aIsr, TAny* aPtr);
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virtual TInt Unbind(TInt aId);
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virtual TInt Enable(TInt aId);
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virtual TInt Disable(TInt aId);
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virtual TInt Clear(TInt aId);
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virtual TInt SetPriority(TInt aId, TInt aPriority);
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private:
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static void Spurious( TAny* aParam );
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static void DispatchIsr( TAny* aParam );
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static TInt GetGPIOPin( TInt aId,GpioPin *aPin );
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static TInt SetGPIOPin(TInt aId,GpioPin *aPin);
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static FORCE_INLINE TBool IsValidId( TInt aId );
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};
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TSpinLock GPIOpinsDescLock(/*TSpinLock::EOrderGenericIrqLow0*/);
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static GpioPin GpioPins[KHwGpioPinMax];
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TGpioDispatcher::TGpioDispatcher()
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{
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for (TInt32 i = 0; i < KHwGpioPinMax; i++)
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{
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GpioPins[i].iMode = GPIO::EIdle;
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GpioPins[i].irq.iIsr = Spurious;
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GpioPins[i].irq.iPtr = &GpioPins[i];
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GpioPins[i].iBankAddr = GPIO_BASE_ADDRESS(i);
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GpioPins[i].iBank = i / KHwGpioPinsPerBank;
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GpioPins[i].iIrqVector = EOmap3530_IRQ29_GPIO1_MPU_IRQ +GpioPins[i].iBank;
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}
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}
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TInt TGpioDispatcher::Init()
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{
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for(TInt i=0; i < KHwGpioBanks; i++)
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{
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TInt r = Interrupt::Bind(EOmap3530_IRQ29_GPIO1_MPU_IRQ+i,DispatchIsr,(TAny*) i);
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// Pass in a pointer to the first pin in the bank - shouldn't use addition on the constant here
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__ASSERT_ALWAYS(r==KErrNone,Kern::Fault("ExternalInterrupt::%s Cant Bind to %d",EOmap3530_IRQ29_GPIO1_MPU_IRQ+i));
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}
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Register( EIrqRangeBaseGpio );
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return KErrNone;
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}
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TInt TGpioDispatcher::GetGPIOPin(TInt aId,GpioPin *aPin)
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{
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if(! ( aId >= 0 && aId < KHwGpioPinMax) )
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return KErrArgument;
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TInt irq = /*NKern::DisableAllInterrupts();*/__SPIN_LOCK_IRQSAVE_R(GPIOpinsDescLock);
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memcpy(aPin,&GpioPins[aId],sizeof(GpioPin));
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/*NKern::RestoreInterrupts(irq);*/__SPIN_UNLOCK_IRQRESTORE_R(GPIOpinsDescLock,irq);
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return KErrNone;
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}
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TInt TGpioDispatcher::SetGPIOPin(TInt aId,GpioPin *aPin)
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{
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if(! ( aId >= 0 && aId < KHwGpioPinMax) )
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return KErrArgument;
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TInt irq = /*NKern::DisableAllInterrupts();*/__SPIN_LOCK_IRQSAVE_W(GPIOpinsDescLock);
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memcpy(&GpioPins[aId],aPin,sizeof(GpioPin ));
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/*NKern::RestoreInterrupts(irq);*/__SPIN_UNLOCK_IRQRESTORE_W(GPIOpinsDescLock,irq);
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return KErrNone;
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}
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FORCE_INLINE TBool TGpioDispatcher::IsValidId( TInt aId )
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{
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return ((TUint)aId < EGPIOIRQ_END && (TUint)aId>=EGPIOIRQ_FIRST);
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}
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void TGpioDispatcher::Spurious(TAny* aId)
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{
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Kern::Fault("SpuriousExtInt",(TInt)aId);
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}
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void TGpioDispatcher::DispatchIsr(TAny *aPtr)
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{
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Interrupt::Disable(EOmap3530_IRQ29_GPIO1_MPU_IRQ + (TInt) aPtr);
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//need to spinlock the gpio here.....
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TUint32 highVectors = AsspRegister::Read32(KGPIO_BASE_ADDRESSES[(TInt) aPtr] + KGPIO_IRQSTATUS1);
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AsspRegister::Write32(KGPIO_BASE_ADDRESSES[(TInt) aPtr] + KGPIO_IRQSTATUS1, highVectors);
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GpioPin pin;
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for (TInt i = 0; i < KHwGpioPinsPerBank ; i++,highVectors >>=1)
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{
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if(highVectors & 0x1)
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{
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GetGPIOPin(i+(TInt)aPtr*KHwGpioPinsPerBank, &pin);
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(*pin.irq.iIsr)(pin.irq.iPtr); // dispatch this pin's ISR
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}
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}
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Interrupt::Enable(EOmap3530_IRQ29_GPIO1_MPU_IRQ + (TInt)aPtr);
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}
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TInt TGpioDispatcher::Bind(TInt anId, TIsr anIsr, TAny* aPtr)
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{
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if(IsValidId(anId))
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{
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//we want to bind the callers isrfunc to the pin dispatch here
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GpioPin pin;
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GetGPIOPin(anId- EGPIOIRQ_FIRST,&pin);
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pin.irq.iIsr = anIsr;
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pin.irq.iPtr = aPtr;
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SetGPIOPin(anId- EGPIOIRQ_FIRST,&pin);
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return KErrNone;
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}
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else
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{
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return KErrArgument;
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}
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}
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TInt TGpioDispatcher::Unbind(TInt anId)
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{
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__KTRACE_OPT(KGPIO,Kern::Printf("GPIO:%s id=%d",__FUNCTION__,anId));
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if(IsValidId(anId))
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{
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GpioPin pin;
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TInt pinNr = anId - EGPIOIRQ_FIRST;
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GetGPIOPin(pinNr,&pin);
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pin.irq.iIsr=Spurious;
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pin.irq.iPtr=NULL;
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SetGPIOPin(pinNr,&pin);
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return KErrNone;
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}
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else
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{
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return KErrArgument;
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}
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}
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TInt TGpioDispatcher::Enable(TInt anId)
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{
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__KTRACE_OPT(KGPIO,Kern::Printf("GPIO:%s id=%d +",__FUNCTION__,anId));
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CHECK_PRECONDITIONS(MASK_NO_FAST_MUTEX,"GPIO::InterruptEnable Cant Hold Mutex in Blocking function");
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if(IsValidId(anId))
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{
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GpioPin pin;
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TInt pinNr = anId - EGPIOIRQ_FIRST;
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GetGPIOPin(pinNr,&pin);
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if(Spurious == pin.irq.iIsr)
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{
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__KTRACE_OPT(KGPIO,Kern::Printf("GPIO:%s id=%d NOT BOUND",__FUNCTION__,anId));
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return KErrNotReady;
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}
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AsspRegister::Write32(pin.iBankAddr+KGPIO_SETIRQENABLE1,GPIO_PIN_OFFSET( pinNr));
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if(!Omap3530Interrupt::IsInterruptEnabled(pin.iIrqVector))
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Interrupt::Enable(pin.iIrqVector);
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return KErrNone;
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}
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else
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{
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return KErrArgument;
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}
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}
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TInt TGpioDispatcher::Disable(TInt anId)
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{
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__KTRACE_OPT(KGPIO,Kern::Printf("GPIO:%s id=%d",__FUNCTION__,anId));
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CHECK_PRECONDITIONS(MASK_NO_FAST_MUTEX,"GPIO::InterruptDisable Cant Hold Mutex in Blocking function");
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if(IsValidId(anId))
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{
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TInt pinNr = anId- EGPIOIRQ_FIRST;
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GpioPin pin;
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GetGPIOPin(pinNr, &pin);
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AsspRegister::Write32(pin.iBankAddr+KGPIO_CLEARIRQENABLE1, GPIO_PIN_OFFSET(pinNr));
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//is this the last one for this bank ? then unmap
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if(0x00 == AsspRegister::Read32(pin.iBankAddr+KGPIO_IRQENABLE1))
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{
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Interrupt::Disable(pin.iIrqVector);
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}
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return KErrNone;
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}
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else
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{
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return KErrArgument;
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}
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}
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TInt TGpioDispatcher::Clear(TInt anId)
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{
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__KTRACE_OPT(KGPIO,Kern::Printf("GPIO:%s id=%d",__FUNCTION__,anId));
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CHECK_PRECONDITIONS(MASK_NO_FAST_MUTEX,"GPIO::InterruptDisable Cant Hold Mutex in Blocking function");
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if(IsValidId(anId))
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{
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TInt pinNr = anId- EGPIOIRQ_FIRST;
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GpioPin myPin;
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GetGPIOPin(pinNr, &myPin);
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AsspRegister::Write32((myPin.iBankAddr+KGPIO_IRQSTATUS1), GPIO_PIN_OFFSET(pinNr));
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//if that was the only high bit clear the mainline as well
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if(0 == AsspRegister::Read32(myPin.iBankAddr+KGPIO_IRQSTATUS1))
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{
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Interrupt::Clear(myPin.iIrqVector);
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}
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}
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return KErrNone;
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}
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TInt TGpioDispatcher::SetPriority(TInt aId, TInt aPriority)
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{
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return KErrNotSupported;
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}
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GLDEF_C TInt InitGpioInterrupts()
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{
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TInt r = KErrNoMemory;
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TGpioDispatcher* dispatcher = new TGpioDispatcher;
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if( dispatcher )
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{
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r = dispatcher->Init();
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}
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return r;
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}
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