author | Simon Howkins <simonh@symbian.org> |
Mon, 29 Nov 2010 13:27:18 +0000 | |
changeset 122 | d8dcdd4c8ab4 |
parent 51 | 254b9435d75e |
permissions | -rwxr-xr-x |
0 | 1 |
// Copyright (c) 2009 Nokia Corporation and/or its subsidiary(-ies). |
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// All rights reserved. |
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// This component and the accompanying materials are made available |
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// under the terms of the License "Eclipse Public License v1.0" |
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// which accompanies this distribution, and is available |
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// at the URL "http://www.eclipse.org/legal/epl-v10.html". |
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// |
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// Initial Contributors: |
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// Nokia Corporation - initial contribution. |
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// |
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// Contributors: |
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// |
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// Description: |
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// \omap3530\omap3530_assp\shared\tps65950\tps65950.cpp |
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// Access driver for TPS65950 |
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// This file is part of the Beagle Base port |
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// |
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||
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#include <e32cmn.h> |
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#include <kernel.h> |
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#include <nk_priv.h> |
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//#include <e32atomics.h> |
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#include <omap3530_i2c.h> |
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#include <omap3530_i2creg.h> |
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#include "tps65950.h" |
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||
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GLREF_C TInt InitInterrupts(); |
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||
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const TUint KGroupCount = 5; |
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||
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// One handle per group on TPS65950 |
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static I2c::THandle I2cHandle[ KGroupCount ]; |
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||
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// One DCB per group |
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static I2c::TConfigPb TheDcb[ KGroupCount ]; |
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||
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// I2C transfer object |
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enum TPhase |
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{ |
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EAddressPb, |
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EDataPb |
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}; |
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static I2c::TTransferPb TheTransferPb[2]; |
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||
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// Group index to Group number |
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static const TUint8 KGroupIndexToGroupNumber[ KGroupCount ] = |
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{ 0x12, 0x48, 0x49, 0x4a, 0x4b }; |
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||
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// Queue of requests |
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static SDblQue TheQueue; |
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||
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// Current state |
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enum TState |
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{ |
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EIdle, |
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EPending, |
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EReading, |
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EWriting, |
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EUnprotectPhase0 |
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}; |
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static TState CurrentState; |
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TPS65950::TReq* CurrentPhaseReq; |
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TPS65950::TReq* PreviousPhaseReq; |
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||
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LOCAL_D TUint8 IsInitialized; // auto-cleared to EFalse |
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||
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const TUint8 KUnprotectPhase0Data = 0xCE; |
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const TUint8 KUnprotectPhase1Data = 0xEC; |
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static const TUint8 KUnprotectData[4] = |
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{ |
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TPS65950::Register::PROTECT_KEY bitand TPS65950::Register::KRegisterMask, KUnprotectPhase0Data, |
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TPS65950::Register::PROTECT_KEY bitand TPS65950::Register::KRegisterMask, KUnprotectPhase1Data, |
|
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}; |
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||
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static const TUint8 KProtectData[2] = |
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{ |
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TPS65950::Register::PROTECT_KEY bitand TPS65950::Register::KRegisterMask, 0 |
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}; |
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||
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static TUint8 TempWriteBuf[2]; |
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||
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// Spinlock to protect queue when adding or removing items |
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//static TSpinLock QueueLock(TSpinLock::EOrderGenericIrqLow1+1); |
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51
254b9435d75e
Fixed build warnings
Lukasz Forynski <lukasz.forynski@gmail.com>
parents:
0
diff
changeset
|
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//static TSpinLock QueueLock(); |
0 | 88 |
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GLDEF_D TDfcQue* TheDfcQue; |
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||
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const TInt KDfcQuePriority = 27; |
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_LIT( KDriverNameDes, "tps65950" ); |
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||
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TInt TheProtectionUsageCount = 0; |
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LOCAL_C void InternalPanic( TInt aLine ) |
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{ |
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Kern::Fault( "tps65950", aLine ); |
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} |
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254b9435d75e
Fixed build warnings
Lukasz Forynski <lukasz.forynski@gmail.com>
parents:
0
diff
changeset
|
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#ifdef _DEBUG |
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LOCAL_C void PanicClient( TPS65950::TPanic aPanic ) |
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{ |
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Kern::PanicCurrentThread( KDriverNameDes, aPanic ); |
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} |
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51
254b9435d75e
Fixed build warnings
Lukasz Forynski <lukasz.forynski@gmail.com>
parents:
0
diff
changeset
|
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#endif |
0 | 108 |
namespace TPS65950 |
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{ |
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void CompletionDfcFunction( TAny* aParam ); |
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void SyncDfcFunction( TAny* aParam ); |
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void DummyDfcFunction( TAny* aParam ); |
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static TDfc CompletionDfc( CompletionDfcFunction, NULL, 1 ); |
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static TDfc DummyDfc( CompletionDfcFunction, NULL, 1 ); |
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||
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FORCE_INLINE TReq& ReqFromLink( SDblQueLink* aLink ) |
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{ |
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return *_LOFF( aLink, TReq, iLink ); |
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} |
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||
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inline TBool AtomicSetPendingWasIdle() |
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{ |
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// atomic if (CurrentState == idleState) {CurrentState=EPending, returns TRUE} else {idleState=CurrentState, CurrentState unchanged, return FALSE} |
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TState idleState = EIdle; // required for atomic comparison |
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//TBool wasIdle = __e32_atomic_cas_ord32( (TUint32*)&CurrentState, (TUint32*)&idleState, EPending ); |
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//return wasIdle; |
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||
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if (CurrentState == idleState) |
|
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{ |
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CurrentState = EPending; |
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return ETrue; |
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} |
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else |
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{ |
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idleState = CurrentState; |
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return EFalse; |
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} |
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||
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} |
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140 |
||
141 |
||
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void StartRead( TReq& aReq ) |
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{ |
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__KTRACE_OPT( KTPS65950, Kern::Printf( "+TPS65950:StartRead(@%x) [%x:%x]", |
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&aReq, |
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KGroupIndexToGroupNumber[ aReq.iRegister >> Register::KGroupShift ], |
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aReq.iRegister bitand Register::KRegisterMask ) ); |
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||
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//__e32_atomic_store_ord32( &CurrentState, EReading ); |
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CurrentState = EReading; |
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||
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TheTransferPb[ EAddressPb ].iData = (TUint8*)&aReq.iRegister; // low byte is register address |
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TheTransferPb[ EDataPb ].iType = I2c::TTransferPb::ERead; |
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TheTransferPb[ EDataPb ].iData = &aReq.iReadValue; |
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__DEBUG_ONLY( aReq.iReadValue = 0xEE ); |
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TheTransferPb[ EDataPb ].iLength = 1; |
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TheTransferPb[ EAddressPb ].iResult = KErrNone; |
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TheTransferPb[ EDataPb ].iResult = KErrNone; |
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||
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TUint groupIndex = aReq.iRegister >> Register::KGroupShift; |
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I2c::TransferA( I2cHandle[ groupIndex ], TheTransferPb[ EAddressPb ] ); |
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||
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__KTRACE_OPT( KTPS65950, Kern::Printf( "-TPS65950:StartRead(@%x)", &aReq ) ); |
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} |
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||
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void StartWrite( TReq& aReq ) |
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{ |
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__KTRACE_OPT( KTPS65950, Kern::Printf( "+TPS65950:StartWrite(@%x) [%x:%x]<-%x", |
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&aReq, |
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KGroupIndexToGroupNumber[ aReq.iRegister >> Register::KGroupShift ], |
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aReq.iRegister bitand Register::KRegisterMask, |
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aReq.iWriteValue ) ); |
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||
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//__e32_atomic_store_ord32( &CurrentState, EWriting ); |
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CurrentState = EWriting; |
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||
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TempWriteBuf[0] = aReq.iRegister bitand Register::KRegisterMask; |
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TempWriteBuf[1] = aReq.iWriteValue; |
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TheTransferPb[ EDataPb ].iType = I2c::TTransferPb::EWrite; |
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TheTransferPb[ EDataPb ].iData = &TempWriteBuf[0]; |
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TheTransferPb[ EDataPb ].iLength = 2; |
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TheTransferPb[ EDataPb ].iResult = KErrNone; |
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||
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TUint groupIndex = aReq.iRegister >> Register::KGroupShift; |
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I2c::TransferA( I2cHandle[ groupIndex ], TheTransferPb[ EDataPb ] ); |
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__KTRACE_OPT( KTPS65950, Kern::Printf( "-TPS65950:StartWrite(@%x)", &aReq ) ); |
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} |
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189 |
||
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void StartUnprotectPhase0( TReq& aReq ) |
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{ |
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__KTRACE_OPT( KTPS65950, Kern::Printf( "+TPS65950:StartUnprotectPhase0(@%x)", &aReq ) ); |
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//__e32_atomic_store_ord32( &CurrentState, EUnprotectPhase0 ); |
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CurrentState = EUnprotectPhase0; |
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TheTransferPb[ EDataPb ].iType = I2c::TTransferPb::EWrite; |
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TheTransferPb[ EDataPb ].iData = &KUnprotectData[0]; |
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TheTransferPb[ EDataPb ].iLength = 2; |
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TheTransferPb[ EDataPb ].iResult = KErrNone; |
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||
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const TUint groupIndex = Register::PROTECT_KEY >> Register::KGroupShift; |
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I2c::TransferA( I2cHandle[ groupIndex ], TheTransferPb[ EDataPb ] ); |
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||
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__KTRACE_OPT( KTPS65950, Kern::Printf( "-TPS65950:StartUnprotectPhase0(@%x)", &aReq ) ); |
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} |
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||
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void StartUnprotectPhase1( TReq& aReq ) |
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{ |
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__KTRACE_OPT( KTPS65950, Kern::Printf( "+TPS65950:StartUnprotectPhase1(@%x)", &aReq ) ); |
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||
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// Set state to writing so that it will complete as a normal write |
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//__e32_atomic_store_ord32( &CurrentState, EWriting ); |
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CurrentState = EWriting; |
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215 |
||
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TheTransferPb[ EDataPb ].iData = &KUnprotectData[2]; |
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TheTransferPb[ EDataPb ].iResult = KErrNone; |
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||
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const TUint groupIndex = Register::PROTECT_KEY >> Register::KGroupShift; |
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I2c::TransferA( I2cHandle[ groupIndex ], TheTransferPb[ EDataPb ] ); |
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||
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__KTRACE_OPT( KTPS65950, Kern::Printf( "-TPS65950:StartUnprotectPhase1(@%x)", &aReq ) ); |
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} |
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||
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void StartProtect( TReq& aReq ) |
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{ |
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__KTRACE_OPT( KTPS65950, Kern::Printf( "+TPS65950:StartProtect(@%x)", &aReq ) ); |
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||
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//__e32_atomic_store_ord32( &CurrentState, EWriting ); |
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CurrentState = EWriting; |
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||
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TheTransferPb[ EDataPb ].iType = I2c::TTransferPb::EWrite; |
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TheTransferPb[ EDataPb ].iData = &KProtectData[0]; |
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TheTransferPb[ EDataPb ].iLength = 2; |
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TheTransferPb[ EDataPb ].iResult = KErrNone; |
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||
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const TUint groupIndex = Register::PROTECT_KEY >> Register::KGroupShift; |
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I2c::TransferA( I2cHandle[ groupIndex ], TheTransferPb[ EDataPb ] ); |
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||
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__KTRACE_OPT( KTPS65950, Kern::Printf( "-TPS65950:StartWrite(@%x)", &aReq ) ); |
|
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} |
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||
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||
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void StartRequest() |
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{ |
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__KTRACE_OPT( KTPS65950, Kern::Printf( "+TPS65950:StartRequest(%d)", CurrentState ) ); |
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__ASSERT_DEBUG( EPending == CurrentState, InternalPanic( __LINE__ ) ); |
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248 |
||
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// We don't need to take lock here because we're currently idle so it's not possible |
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// for there to be a change in which item is queue head. The link pointers of the |
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// head item could change if another thread is queueing a new request, but that doesn't |
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// affect any of the fields we care about here |
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__ASSERT_DEBUG( !TheQueue.IsEmpty(), InternalPanic( __LINE__ ) ); |
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||
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if( !CurrentPhaseReq ) |
|
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{ |
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PreviousPhaseReq = NULL; |
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CurrentPhaseReq = &ReqFromLink( TheQueue.First() ); |
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} |
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||
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FOREVER |
|
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{ |
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if( !CurrentPhaseReq ) |
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{ |
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__ASSERT_DEBUG( PreviousPhaseReq, InternalPanic( __LINE__ ) ); |
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||
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// we didn't find any phases to execute, so complete request |
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// by faking a write completion on the previous phase |
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CurrentPhaseReq = PreviousPhaseReq; |
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//__e32_atomic_store_ord32( &CurrentState, EWriting ); |
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CurrentState = EWriting; |
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||
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// Queue DFC instead of calling directly to avoid recursion if multiple items on queue |
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// complete without any action |
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CompletionDfc.Enque(); |
|
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break; |
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} |
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else |
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{ |
|
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TReq::TAction action = CurrentPhaseReq->iAction; |
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||
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__KTRACE_OPT( KTPS65950, Kern::Printf( "=TPS65950:StartRequest:req@%x:a=%x", CurrentPhaseReq, action ) ); |
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||
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if( (TReq::ERead == action) || (TReq::EClearSet == action) ) |
|
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{ |
|
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StartRead( *CurrentPhaseReq ); |
|
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break; |
|
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} |
|
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else if( TReq::EWrite == action ) |
|
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{ |
|
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StartWrite( *CurrentPhaseReq ); |
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break; |
|
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} |
|
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else if( TReq::EDisableProtect == action ) |
|
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{ |
|
296 |
if( ++TheProtectionUsageCount == 1 ) |
|
297 |
{ |
|
298 |
// Currently protected, start an unprotect sequence |
|
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StartUnprotectPhase0( *CurrentPhaseReq ); |
|
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break; |
|
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} |
|
302 |
else |
|
303 |
{ |
|
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goto move_to_next_phase; |
|
305 |
} |
|
306 |
} |
|
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else if( TReq::ERestoreProtect == action ) |
|
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{ |
|
309 |
if( --TheProtectionUsageCount == 0 ) |
|
310 |
{ |
|
311 |
StartProtect( *CurrentPhaseReq ); |
|
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break; |
|
313 |
} |
|
314 |
else |
|
315 |
{ |
|
316 |
move_to_next_phase: |
|
317 |
// already unprotected, skip to next phase |
|
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CurrentPhaseReq->iResult = KErrNone; |
|
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PreviousPhaseReq = CurrentPhaseReq; |
|
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CurrentPhaseReq = CurrentPhaseReq->iNextPhase; |
|
321 |
} |
|
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} |
|
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else |
|
324 |
{ |
|
325 |
InternalPanic( __LINE__ ); |
|
326 |
} |
|
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} |
|
328 |
} |
|
329 |
||
330 |
||
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__KTRACE_OPT( KTPS65950, Kern::Printf( "-TPS65950:StartRequest(%d)", CurrentState ) ); |
|
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} |
|
333 |
||
334 |
void DummyDfcFunction( TAny* /*aParam*/ ) |
|
335 |
{ |
|
336 |
__KTRACE_OPT( KTPS65950, Kern::Printf( "TPS65950:DummyDFC(%d)", CurrentState ) ); |
|
337 |
} |
|
338 |
||
339 |
void CompletionDfcFunction( TAny* /*aParam*/ ) |
|
340 |
{ |
|
341 |
__KTRACE_OPT( KTPS65950, Kern::Printf( "+TPS65950:DFC(%d)", CurrentState ) ); |
|
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__ASSERT_DEBUG( EIdle != CurrentState, InternalPanic( __LINE__ ) ); |
|
343 |
__ASSERT_DEBUG( CurrentPhaseReq, InternalPanic( __LINE__ ) ); |
|
344 |
||
345 |
TInt result = TheTransferPb[ EDataPb ].iResult; |
|
346 |
if( KErrNone != TheTransferPb[ EAddressPb ].iResult ) |
|
347 |
{ |
|
348 |
result = TheTransferPb[ EAddressPb ].iResult; |
|
349 |
} |
|
350 |
||
351 |
TReq& req = *CurrentPhaseReq; |
|
352 |
TBool completed = ETrue; |
|
353 |
||
354 |
if( KErrNone == result) |
|
355 |
{ |
|
356 |
if( EReading == CurrentState ) |
|
357 |
{ |
|
358 |
__KTRACE_OPT( KTPS65950, Kern::Printf( "=TPS65950:DFC:Read [%x:%x]=%x", |
|
359 |
KGroupIndexToGroupNumber[ req.iRegister >> Register::KGroupShift ], |
|
360 |
req.iRegister bitand Register::KRegisterMask, |
|
361 |
req.iReadValue ) ); |
|
362 |
||
363 |
if( TReq::EClearSet == req.iAction) |
|
364 |
{ |
|
365 |
// Start write phase of a ClearSet |
|
366 |
req.iWriteValue = (req.iReadValue bitand ~req.iClearMask) bitor req.iSetMask; |
|
367 |
StartWrite( req ); |
|
368 |
completed = EFalse; |
|
369 |
} |
|
370 |
} |
|
371 |
else if( EUnprotectPhase0 == CurrentState ) |
|
372 |
{ |
|
373 |
StartUnprotectPhase1( req ); |
|
374 |
completed = EFalse; |
|
375 |
} |
|
376 |
} |
|
377 |
||
378 |
if( completed || (KErrNone != result) ) |
|
379 |
{ |
|
380 |
// Read or write, protect has completed, or final write stage of a ClearSet or unprotect, or error |
|
381 |
PreviousPhaseReq = CurrentPhaseReq; |
|
382 |
CurrentPhaseReq = req.iNextPhase; |
|
383 |
||
384 |
if( CurrentPhaseReq ) |
|
385 |
{ |
|
386 |
// start next phase |
|
387 |
//__e32_atomic_store_ord32( &CurrentState, EPending ); |
|
388 |
CurrentState = EPending; |
|
389 |
StartRequest(); |
|
390 |
} |
|
391 |
else |
|
392 |
{ |
|
393 |
//__e32_atomic_store_ord32( &CurrentState, EIdle ); |
|
394 |
CurrentState = EIdle; |
|
395 |
// From now a concurrent ExecAsync() can start a new request if it adds an item to the queue |
|
396 |
||
397 |
// remove item from queue and complete |
|
398 |
TUint irq = __SPIN_LOCK_IRQSAVE( QueueLock ); |
|
399 |
ReqFromLink( TheQueue.First() ).iLink.Deque(); |
|
400 |
TBool queueEmpty = TheQueue.IsEmpty(); |
|
401 |
__SPIN_UNLOCK_IRQRESTORE( QueueLock, irq ); |
|
402 |
||
403 |
// If queue was empty inside spinlock but an ExecAsync() adds an item before the if statement below, |
|
404 |
// the ExecAsync() will start the new request |
|
405 |
if( !queueEmpty ) |
|
406 |
{ |
|
407 |
if( AtomicSetPendingWasIdle() ) |
|
408 |
{ |
|
409 |
// ExecAsync didn't start a request |
|
410 |
StartRequest(); |
|
411 |
} |
|
412 |
} |
|
413 |
||
414 |
// Notify client of completion |
|
415 |
req.iResult = result; |
|
416 |
if( req.iCompletionDfc ) |
|
417 |
{ |
|
418 |
req.iCompletionDfc->Enque(); |
|
419 |
} |
|
420 |
} |
|
421 |
} |
|
422 |
||
423 |
__KTRACE_OPT( KTPS65950, Kern::Printf( "-TPS65950:DFC(%d)", CurrentState ) ); |
|
424 |
} |
|
425 |
||
426 |
// Used to complete synchronous operations |
|
427 |
void SyncDfcFunction( TAny* aParam ) |
|
428 |
{ |
|
429 |
NKern::FSSignal( reinterpret_cast<NFastSemaphore*>( aParam ) ); |
|
430 |
} |
|
431 |
||
432 |
||
433 |
EXPORT_C void ExecAsync( TReq& aRequest ) |
|
434 |
{ |
|
435 |
__KTRACE_OPT( KTPS65950, Kern::Printf( "+TPS65950:ExecAsync(@%x)", &aRequest ) ); |
|
436 |
||
437 |
__ASSERT_DEBUG( (TUint)aRequest.iAction <= TReq::ERestoreProtect, PanicClient( EBadAction ) ); |
|
438 |
__ASSERT_DEBUG( (TReq::EDisableProtect == aRequest.iAction) |
|
439 |
|| (TReq::ERestoreProtect == aRequest.iAction) |
|
440 |
|| (((TUint)aRequest.iRegister >> Register::KGroupShift) < KGroupCount), PanicClient( EBadGroup ) ); |
|
441 |
||
442 |
TUint irq = __SPIN_LOCK_IRQSAVE( QueueLock ); |
|
443 |
TheQueue.Add( &aRequest.iLink ); |
|
444 |
__SPIN_UNLOCK_IRQRESTORE( QueueLock, irq ); |
|
445 |
||
446 |
if( AtomicSetPendingWasIdle() ) |
|
447 |
{ |
|
448 |
StartRequest(); |
|
449 |
} |
|
450 |
||
451 |
__KTRACE_OPT( KTPS65950, Kern::Printf( "-TPS65950:ExecAsync" ) ); |
|
452 |
} |
|
453 |
||
454 |
EXPORT_C TInt WriteSync( TUint16 aRegister, TUint8 aValue ) |
|
455 |
{ |
|
456 |
__ASSERT_NO_FAST_MUTEX; |
|
457 |
||
458 |
NFastSemaphore sem; |
|
459 |
TDfc dfc( SyncDfcFunction, &sem, TheDfcQue, 2 ); |
|
460 |
TReq req; |
|
461 |
req.iRegister = aRegister; |
|
462 |
req.iAction = TReq::EWrite; |
|
463 |
req.iCompletionDfc = &dfc; |
|
464 |
req.iWriteValue = aValue; |
|
465 |
req.iNextPhase = NULL; |
|
466 |
||
467 |
NKern::FSSetOwner( &sem, NULL ); |
|
468 |
ExecAsync( req ); |
|
469 |
NKern::FSWait( &sem ); |
|
470 |
||
471 |
return req.iResult; |
|
472 |
} |
|
473 |
||
474 |
EXPORT_C TInt ReadSync( TUint16 aRegister, TUint8& aValue ) |
|
475 |
{ |
|
476 |
__ASSERT_NO_FAST_MUTEX; |
|
477 |
||
478 |
NFastSemaphore sem; |
|
479 |
TDfc dfc( SyncDfcFunction, &sem, TheDfcQue, 2 ); |
|
480 |
TReq req; |
|
481 |
req.iRegister = aRegister; |
|
482 |
req.iAction = TReq::ERead; |
|
483 |
req.iCompletionDfc = &dfc; |
|
484 |
req.iNextPhase = NULL; |
|
485 |
||
486 |
NKern::FSSetOwner( &sem, NULL ); |
|
487 |
ExecAsync( req ); |
|
488 |
NKern::FSWait( &sem ); |
|
489 |
||
490 |
aValue = req.iReadValue; |
|
491 |
return req.iResult; |
|
492 |
} |
|
493 |
||
494 |
EXPORT_C TInt ClearSetSync( TUint16 aRegister, TUint8 aClearMask, TUint8 aSetMask ) |
|
495 |
{ |
|
496 |
__ASSERT_NO_FAST_MUTEX; |
|
497 |
||
498 |
NFastSemaphore sem; |
|
499 |
TDfc dfc( SyncDfcFunction, &sem, TheDfcQue, 2 ); |
|
500 |
TReq req; |
|
501 |
req.iRegister = aRegister; |
|
502 |
req.iAction = TReq::EClearSet; |
|
503 |
req.iCompletionDfc = &dfc; |
|
504 |
req.iClearMask = aClearMask; |
|
505 |
req.iSetMask = aSetMask; |
|
506 |
req.iNextPhase = NULL; |
|
507 |
||
508 |
NKern::FSSetOwner( &sem, NULL ); |
|
509 |
ExecAsync( req ); |
|
510 |
NKern::FSWait( &sem ); |
|
511 |
||
512 |
return req.iResult; |
|
513 |
} |
|
514 |
||
515 |
EXPORT_C TInt DisableProtect() |
|
516 |
{ |
|
517 |
__ASSERT_NO_FAST_MUTEX; |
|
518 |
||
519 |
NFastSemaphore sem; |
|
520 |
TDfc dfc( SyncDfcFunction, &sem, TheDfcQue, 2 ); |
|
521 |
TReq req; |
|
522 |
req.iAction = TReq::EDisableProtect; |
|
523 |
req.iCompletionDfc = &dfc; |
|
524 |
req.iNextPhase = NULL; |
|
525 |
||
526 |
NKern::FSSetOwner( &sem, NULL ); |
|
527 |
ExecAsync( req ); |
|
528 |
NKern::FSWait( &sem ); |
|
529 |
||
530 |
return req.iResult; |
|
531 |
} |
|
532 |
||
533 |
EXPORT_C TInt RestoreProtect() |
|
534 |
{ |
|
535 |
__ASSERT_NO_FAST_MUTEX; |
|
536 |
||
537 |
NFastSemaphore sem; |
|
538 |
TDfc dfc( SyncDfcFunction, &sem, TheDfcQue, 2 ); |
|
539 |
TReq req; |
|
540 |
req.iAction = TReq::ERestoreProtect; |
|
541 |
req.iCompletionDfc = &dfc; |
|
542 |
req.iNextPhase = NULL; |
|
543 |
||
544 |
NKern::FSSetOwner( &sem, NULL ); |
|
545 |
ExecAsync( req ); |
|
546 |
NKern::FSWait( &sem ); |
|
547 |
||
548 |
return req.iResult; |
|
549 |
} |
|
550 |
||
551 |
||
552 |
TInt Init() |
|
553 |
{ |
|
554 |
// Create DFC queue |
|
555 |
TInt r = Kern::DfcQCreate( TheDfcQue, KDfcQuePriority, &KDriverNameDes ); |
|
556 |
if( KErrNone != r ) |
|
557 |
{ |
|
558 |
return r; |
|
559 |
} |
|
560 |
||
561 |
TPS65950::CompletionDfc.SetDfcQ( TheDfcQue ); |
|
562 |
TPS65950::DummyDfc.SetDfcQ( TheDfcQue ); |
|
563 |
||
564 |
// Open I2c handles |
|
565 |
for( TInt i = 0; i < KGroupCount; ++i ) |
|
566 |
{ |
|
567 |
TheDcb[i].iUnit = I2c::E1; // Master / slave |
|
568 |
TheDcb[i].iRole = I2c::EMaster; |
|
569 |
TheDcb[i].iMode = I2c::E7Bit; |
|
570 |
TheDcb[i].iExclusiveClient = NULL; |
|
571 |
TheDcb[i].iRate = I2c::E400K; |
|
572 |
TheDcb[i].iOwnAddress = 0x01; |
|
573 |
TheDcb[i].iDfcQueue = TheDfcQue; |
|
574 |
TheDcb[i].iDeviceAddress = KGroupIndexToGroupNumber[i]; |
|
575 |
||
576 |
I2cHandle[i] = I2c::Open( TheDcb[i] ); |
|
577 |
if( I2cHandle[i] < 0 ) |
|
578 |
{ |
|
579 |
return I2cHandle[i]; |
|
580 |
} |
|
581 |
} |
|
582 |
||
583 |
// Setup transfer linked list |
|
584 |
TheTransferPb[ EAddressPb ].iType = I2c::TTransferPb::EWrite; // address write |
|
585 |
TheTransferPb[ EAddressPb ].iLength = 1; |
|
586 |
TheTransferPb[ EAddressPb ].iCompletionDfc = &TPS65950::DummyDfc; |
|
587 |
TheTransferPb[ EAddressPb ].iNextPhase = &TheTransferPb[ EDataPb ]; |
|
588 |
TheTransferPb[ EDataPb ].iCompletionDfc = &TPS65950::CompletionDfc; |
|
589 |
TheTransferPb[ EDataPb ].iNextPhase = NULL; |
|
590 |
||
591 |
return r; |
|
592 |
} |
|
593 |
||
594 |
inline TInt BcdToDecimal( TUint8 aBcd ) |
|
595 |
{ |
|
596 |
return ( aBcd bitand 0xF ) + ( (aBcd >> 4) * 10); |
|
597 |
} |
|
598 |
||
599 |
inline TUint8 DecimalToBcd( TInt aDecimal ) |
|
600 |
{ |
|
601 |
TUint tens = (aDecimal / 10); |
|
602 |
return ( tens << 4 ) + ( aDecimal - tens ); |
|
603 |
} |
|
604 |
||
605 |
EXPORT_C TInt GetRtcData( TRtcTime& aTime ) |
|
606 |
{ |
|
607 |
__ASSERT_NO_FAST_MUTEX; |
|
608 |
||
609 |
NFastSemaphore sem; |
|
610 |
TDfc dfc( SyncDfcFunction, &sem, TheDfcQue, 2 ); |
|
611 |
TReq req[8]; // 9 stages to the operation |
|
612 |
req[0].iRegister = RTC_CTRL_REG::Addr; |
|
613 |
req[0].iAction = TReq::EClearSet; |
|
614 |
req[0].iSetMask = RTC_CTRL_REG::GET_TIME; |
|
615 |
req[0].iClearMask = 0; |
|
616 |
req[0].iCompletionDfc = NULL; |
|
617 |
req[0].iNextPhase = &req[1]; |
|
618 |
||
619 |
req[1].iRegister = Register::SECONDS_REG; |
|
620 |
req[1].iAction = TReq::ERead; |
|
621 |
req[1].iCompletionDfc = NULL; |
|
622 |
req[1].iNextPhase = &req[2]; |
|
623 |
||
624 |
req[2].iRegister = Register::MINUTES_REG; |
|
625 |
req[2].iAction = TReq::ERead; |
|
626 |
req[2].iCompletionDfc = NULL; |
|
627 |
req[2].iNextPhase = &req[3]; |
|
628 |
||
629 |
req[3].iRegister = Register::HOURS_REG; |
|
630 |
req[3].iAction = TReq::ERead; |
|
631 |
req[3].iCompletionDfc = NULL; |
|
632 |
req[3].iNextPhase = &req[4]; |
|
633 |
||
634 |
req[4].iRegister = Register::DAYS_REG; |
|
635 |
req[4].iAction = TReq::ERead; |
|
636 |
req[4].iCompletionDfc = NULL; |
|
637 |
req[4].iNextPhase = &req[5]; |
|
638 |
||
639 |
req[5].iRegister = Register::MONTHS_REG; |
|
640 |
req[5].iAction = TReq::ERead; |
|
641 |
req[5].iCompletionDfc = NULL; |
|
642 |
req[5].iNextPhase = &req[6]; |
|
643 |
||
644 |
req[6].iRegister = Register::YEARS_REG; |
|
645 |
req[6].iAction = TReq::ERead; |
|
646 |
req[6].iCompletionDfc = NULL; |
|
647 |
req[6].iNextPhase = &req[7]; |
|
648 |
||
649 |
req[7].iRegister = RTC_CTRL_REG::Addr; |
|
650 |
req[7].iAction = TReq::EClearSet; |
|
651 |
req[7].iSetMask = 0; |
|
652 |
req[7].iClearMask = RTC_CTRL_REG::GET_TIME; |
|
653 |
req[7].iCompletionDfc = &dfc; |
|
654 |
req[7].iNextPhase = NULL; |
|
655 |
||
656 |
NKern::FSSetOwner( &sem, NULL ); |
|
657 |
ExecAsync( req[0] ); |
|
658 |
NKern::FSWait( &sem ); |
|
659 |
||
660 |
aTime.iSecond = BcdToDecimal( req[1].iReadValue ); |
|
661 |
aTime.iMinute = BcdToDecimal( req[2].iReadValue ); |
|
662 |
aTime.iHour = BcdToDecimal( req[3].iReadValue ); |
|
663 |
aTime.iDay = BcdToDecimal( req[4].iReadValue ); |
|
664 |
aTime.iMonth = BcdToDecimal( req[5].iReadValue ); |
|
665 |
aTime.iYear = BcdToDecimal( req[6].iReadValue ); |
|
666 |
||
667 |
return KErrNone; |
|
668 |
} |
|
669 |
||
670 |
#define BCD0(a) ((a)%10) |
|
671 |
#define BCD1(a) (((a)/10)<<4) |
|
672 |
#define TOBCD(i) (BCD1(i)|BCD0(i)) |
|
673 |
||
674 |
EXPORT_C TInt SetRtcData( const TRtcTime& aTime ) |
|
675 |
{ |
|
676 |
__ASSERT_NO_FAST_MUTEX; |
|
677 |
||
678 |
NFastSemaphore sem; |
|
679 |
TDfc dfc( SyncDfcFunction, &sem, TheDfcQue, 2 ); |
|
680 |
TReq req[8]; // 9 stages to the operation |
|
681 |
req[0].iRegister = RTC_CTRL_REG::Addr; |
|
682 |
req[0].iAction = TReq::EClearSet; |
|
683 |
req[0].iSetMask = 0; |
|
684 |
req[0].iClearMask = RTC_CTRL_REG::STOP_RTC; |
|
685 |
req[0].iCompletionDfc = NULL; |
|
686 |
req[0].iNextPhase = &req[1]; |
|
687 |
||
688 |
req[1].iRegister = Register::SECONDS_REG; |
|
689 |
req[1].iAction = TReq::EWrite; |
|
690 |
req[1].iWriteValue = DecimalToBcd( aTime.iSecond ); |
|
691 |
req[1].iCompletionDfc = NULL; |
|
692 |
req[1].iNextPhase = &req[2]; |
|
693 |
||
694 |
req[2].iRegister = Register::MINUTES_REG; |
|
695 |
req[2].iAction = TReq::EWrite; |
|
696 |
req[2].iWriteValue = DecimalToBcd( aTime.iMinute ); |
|
697 |
req[2].iCompletionDfc = NULL; |
|
698 |
req[2].iNextPhase = &req[3]; |
|
699 |
||
700 |
req[3].iRegister = Register::HOURS_REG; |
|
701 |
req[3].iAction = TReq::EWrite; |
|
702 |
req[3].iWriteValue = DecimalToBcd( aTime.iHour ); |
|
703 |
req[3].iCompletionDfc = NULL; |
|
704 |
req[3].iNextPhase = &req[4]; |
|
705 |
||
706 |
req[4].iRegister = Register::DAYS_REG; |
|
707 |
req[4].iAction = TReq::EWrite; |
|
708 |
req[4].iWriteValue = DecimalToBcd( aTime.iDay ); |
|
709 |
req[4].iCompletionDfc = NULL; |
|
710 |
req[4].iNextPhase = &req[5]; |
|
711 |
||
712 |
req[5].iRegister = Register::MONTHS_REG; |
|
713 |
req[5].iAction = TReq::EWrite; |
|
714 |
req[5].iWriteValue = DecimalToBcd( aTime.iMonth ); |
|
715 |
req[5].iCompletionDfc = NULL; |
|
716 |
req[5].iNextPhase = &req[6]; |
|
717 |
||
718 |
req[6].iRegister = Register::YEARS_REG; |
|
719 |
req[6].iAction = TReq::EWrite; |
|
720 |
req[6].iWriteValue = DecimalToBcd( aTime.iYear ); |
|
721 |
req[6].iCompletionDfc = NULL; |
|
722 |
req[6].iNextPhase = &req[7]; |
|
723 |
||
724 |
req[7].iRegister = RTC_CTRL_REG::Addr; |
|
725 |
req[7].iAction = TReq::EClearSet; |
|
726 |
req[7].iSetMask = RTC_CTRL_REG::STOP_RTC; |
|
727 |
req[7].iClearMask = 0; |
|
728 |
req[7].iCompletionDfc = &dfc; |
|
729 |
req[7].iNextPhase = NULL; |
|
730 |
||
731 |
NKern::FSSetOwner( &sem, NULL ); |
|
732 |
ExecAsync( req[0] ); |
|
733 |
NKern::FSWait( &sem ); |
|
734 |
||
735 |
return KErrNone; |
|
736 |
} |
|
737 |
||
738 |
EXPORT_C TBool Initialized() |
|
739 |
{ |
|
740 |
return IsInitialized; |
|
741 |
} |
|
742 |
||
743 |
} // namespace TPS65950 |
|
744 |
||
745 |
||
746 |
||
747 |
||
748 |
DECLARE_STANDARD_EXTENSION() |
|
749 |
{ |
|
750 |
TInt r = TPS65950::Init(); |
|
751 |
if( KErrNone == r ) |
|
752 |
{ |
|
753 |
r = InitInterrupts(); |
|
754 |
} |
|
755 |
||
756 |
IsInitialized = ( KErrNone == r ); |
|
757 |
||
758 |
return r; |
|
759 |
} |
|
760 |