0
|
1 |
// Copyright (c) 2009 Nokia Corporation and/or its subsidiary(-ies).
|
|
2 |
// All rights reserved.
|
|
3 |
// This component and the accompanying materials are made available
|
|
4 |
// under the terms of the License "Eclipse Public License v1.0"
|
|
5 |
// which accompanies this distribution, and is available
|
|
6 |
// at the URL "http://www.eclipse.org/legal/epl-v10.html".
|
|
7 |
//
|
|
8 |
// Initial Contributors:
|
|
9 |
// Nokia Corporation - initial contribution.
|
|
10 |
//
|
|
11 |
// Contributors:
|
|
12 |
//
|
|
13 |
// Description:
|
|
14 |
//
|
|
15 |
|
|
16 |
#ifndef TPS65950_H
|
|
17 |
#define TPS65950_H
|
|
18 |
|
|
19 |
#include <e32cmn.h>
|
|
20 |
#include <nklib.h>
|
|
21 |
#include <assp/omap3530_assp/omap3530_irqmap.h>
|
|
22 |
#include <assp/omap3530_shared/tps65950_registers.h>
|
|
23 |
|
|
24 |
// Trace - 191 = 0x00000000 0x00000000 0x00000000 0x00000000 0x0000000 0x0000000 0x80000000 0x00000000 0x00000000
|
|
25 |
#define KTPS65950 191
|
|
26 |
|
|
27 |
|
|
28 |
|
|
29 |
namespace TPS65950
|
|
30 |
{
|
|
31 |
|
|
32 |
/** Structure used for issuing an asynchronous request
|
|
33 |
* You must set iDfc to point to a TDfc object which will
|
|
34 |
* be queued on completion
|
|
35 |
*/
|
|
36 |
struct TReq
|
|
37 |
{
|
|
38 |
enum TAction
|
|
39 |
{
|
|
40 |
ERead,
|
|
41 |
EWrite,
|
|
42 |
EClearSet,
|
|
43 |
EDisableProtect,
|
|
44 |
ERestoreProtect
|
|
45 |
};
|
|
46 |
|
|
47 |
|
|
48 |
TUint16 iRegister; ///< Register to be accessed
|
|
49 |
TAction iAction : 8; ///< type of request, read, write or clearset
|
|
50 |
TUint8 iReadValue; ///< Returned value from a read, original value for a ClearSet, unused for write
|
|
51 |
union
|
|
52 |
{
|
|
53 |
TUint8 iWriteValue; ///< Value to write into register for a write
|
|
54 |
TUint8 iSetMask; ///< Bits to set in a ClearSet
|
|
55 |
};
|
|
56 |
TUint8 iClearMask; ///< Bits to clear in a ClearSet
|
|
57 |
TDfc* iCompletionDfc; ///< Pointer to DFC to be called on completion (for multi-phase only the last TReq causes a completion)
|
|
58 |
TInt iResult; ///< KErrNone on success, else error code
|
|
59 |
TReq* iNextPhase; ///< set to NULL if this is a single request, for a multi-phase request set this to point to next TReq
|
|
60 |
SDblQueLink iLink; ///< Used internally to maintain linked list of requests
|
|
61 |
};
|
|
62 |
|
|
63 |
struct TRtcTime
|
|
64 |
{
|
|
65 |
TUint8 iSecond;
|
|
66 |
TUint8 iMinute;
|
|
67 |
TUint8 iHour;
|
|
68 |
TUint8 iDay;
|
|
69 |
TUint8 iMonth;
|
|
70 |
TUint8 iYear;
|
|
71 |
};
|
|
72 |
|
|
73 |
/** Test whether this driver has been initialized
|
|
74 |
* Use this in code which is expected to run early during boot
|
|
75 |
* to prevent it trying to access this driver before it is ready
|
|
76 |
*
|
|
77 |
* @return ETrue if initialized, EFalse if not
|
|
78 |
*/
|
|
79 |
IMPORT_C TBool Initialized();
|
|
80 |
|
|
81 |
/** Execute a request asynchronously
|
|
82 |
*
|
|
83 |
* @param aRequest Request object to executed, must stay valid until request completes
|
|
84 |
*/
|
|
85 |
IMPORT_C void ExecAsync( TReq& aRequest );
|
|
86 |
|
|
87 |
/** Execute a write synchronously
|
|
88 |
* @param aRegister Register to write to - this must be one of the
|
|
89 |
* register enumerations from tps65950_register.h
|
|
90 |
* or the value of a register Addr property
|
|
91 |
*
|
|
92 |
* @param aValue Value to write to register
|
|
93 |
* @return KErrNone on success, else standard error code
|
|
94 |
*/
|
|
95 |
IMPORT_C TInt WriteSync( TUint16 aRegister, TUint8 aValue );
|
|
96 |
|
|
97 |
/** Execute a read synchronously
|
|
98 |
* @param aRegister Register to write to - this must be one of the
|
|
99 |
* register enumerations from tps65950_register.h
|
|
100 |
* or the value of a register Addr property
|
|
101 |
*
|
|
102 |
* @param aValue Value read will be written to here
|
|
103 |
* @return KErrNone on success, else standard error code
|
|
104 |
*/
|
|
105 |
IMPORT_C TInt ReadSync( TUint16 aRegister, TUint8& aValue );
|
|
106 |
|
|
107 |
/** Execute a bit clear/set synchronously
|
|
108 |
* @param aRegister Register to write to - this must be one of the
|
|
109 |
* register enumerations from tps65950_register.h
|
|
110 |
* or the value of a register Addr property
|
|
111 |
*
|
|
112 |
* @param aClearMask Each '1' clear the corresponding bit in the register
|
|
113 |
* @param aSetMask Each '1' sets the corresponding bit in the register
|
|
114 |
* @return KErrNone on success, else standard error code
|
|
115 |
*/
|
|
116 |
IMPORT_C TInt ClearSetSync( TUint16 aRegister, TUint8 aClearMask, TUint8 aSetMask );
|
|
117 |
|
|
118 |
/** Disable protection of voltage control registers
|
|
119 |
* Call RestoreProtect() to re-enable protection
|
|
120 |
*
|
|
121 |
* Note - calls to DisableProtect and RestoreProtect() are
|
|
122 |
* reference-counted, so you must call RestoreProtect() the same
|
|
123 |
* number of times you called DisableProtect(). This is to allow
|
|
124 |
* multiple clients to disable and restore protection so that
|
|
125 |
* protection will only be re-enabled when the last client has
|
|
126 |
* restored it.
|
|
127 |
*/
|
|
128 |
IMPORT_C TInt DisableProtect();
|
|
129 |
|
|
130 |
/** Restore protection after a DisableProtect().
|
|
131 |
* If other clients have called DisableProtect(), or this client
|
|
132 |
* has other DisableProtect() calls still not balanced by a
|
|
133 |
* RestoreProtect() then the protection will remain disabled
|
|
134 |
*/
|
|
135 |
IMPORT_C TInt RestoreProtect();
|
|
136 |
|
|
137 |
/** Read the current RTC time */
|
|
138 |
IMPORT_C TInt GetRtcData( TRtcTime& aTime );
|
|
139 |
|
|
140 |
/** Set the RTC time */
|
|
141 |
IMPORT_C TInt SetRtcData( const TRtcTime& aTime );
|
|
142 |
|
|
143 |
enum TPanic
|
|
144 |
{
|
|
145 |
EBadAction, ///< illegal value in TReq::iAction
|
|
146 |
ENoDfc, ///< iCompletionDFC is NULL
|
|
147 |
EBadGroup ///< Group component of iRegister is invalid
|
|
148 |
};
|
|
149 |
|
|
150 |
|
|
151 |
enum TInterruptId
|
|
152 |
{
|
|
153 |
KTPS65950IrqFirst= (EIrqRangeBasePsu << KIrqRangeIndexShift),
|
|
154 |
|
|
155 |
ETPS65950_IRQ_PWR_SC_DETECT = KTPS65950IrqFirst,
|
|
156 |
ETPS65950_IRQ_PWR_MBCHG,
|
|
157 |
ETPS65950_IRQ_PWR_PWROK_TIMEOUT,
|
|
158 |
ETPS65950_IRQ_PWR_HOT_DIE,
|
|
159 |
ETPS65950_IRQ_PWR_RTC_IT,
|
|
160 |
ETPS65950_IRQ_PWR_USB_PRES,
|
|
161 |
ETPS65950_IRQ_PWR_CHG_PRES,
|
|
162 |
ETPS65950_IRQ_PWR_CHG_PWRONS,
|
|
163 |
|
|
164 |
ETPS65950_IRQ_MADC_USB_ISR1,
|
|
165 |
ETPS65950_IRQ_MADC_SW2_ISR1,
|
|
166 |
ETPS65950_IRQ_MADC_SW1_ISR1,
|
|
167 |
ETPS65950_IRQ_MADC_RT_ISR1,
|
|
168 |
|
|
169 |
ETPS65950_IRQ_GPIO_0ISR1,
|
|
170 |
ETPS65950_IRQ_GPIO_1ISR1,
|
|
171 |
ETPS65950_IRQ_GPIO_2ISR1,
|
|
172 |
ETPS65950_IRQ_GPIO_3ISR1,
|
|
173 |
ETPS65950_IRQ_GPIO_4ISR1,
|
|
174 |
ETPS65950_IRQ_GPIO_5ISR1,
|
|
175 |
ETPS65950_IRQ_GPIO_6ISR1,
|
|
176 |
ETPS65950_IRQ_GPIO_7ISR2,
|
|
177 |
|
|
178 |
ETPS65950_IRQ_GPIO_8ISR2,
|
|
179 |
ETPS65950_IRQ_GPIO_9ISR2,
|
|
180 |
ETPS65950_IRQ_GPIO_10ISR2,
|
|
181 |
ETPS65950_IRQ_GPIO_11ISR2,
|
|
182 |
ETPS65950_IRQ_GPIO_12ISR2,
|
|
183 |
ETPS65950_IRQ_GPIO_13ISR2,
|
|
184 |
ETPS65950_IRQ_GPIO_14ISR2,
|
|
185 |
ETPS65950_IRQ_GPIO_15ISR2,
|
|
186 |
|
|
187 |
ETPS65950_IRQ_GPIO16ISR3,
|
|
188 |
ETPS65950_IRQ_GPIO17ISR3,
|
|
189 |
|
|
190 |
ETPS65950_IRQ_BCI_BATSTS_ISR1,
|
|
191 |
ETPS65950_IRQ_BCI_TBATOR1_ISR1,
|
|
192 |
ETPS65950_IRQ_BCI_TBATOR2_ISR1,
|
|
193 |
ETPS65950_IRQ_BCI_ICHGEOC_ISR1,
|
|
194 |
ETPS65950_IRQ_BCI_ICHGLOW_ISR1ASTO,
|
|
195 |
ETPS65950_IRQ_BCI_IICHGHIGH_ISR1,
|
|
196 |
ETPS65950_IRQ_BCI_TMOVF_ISR1,
|
|
197 |
ETPS65950_IRQ_BCI_WOVF_ISR1,
|
|
198 |
|
|
199 |
ETPS65950_IRQ_BCI_ACCHGOV_ISR1,
|
|
200 |
ETPS65950_IRQ_BCI_VBUSOV_ISR1,
|
|
201 |
ETPS65950_IRQ_BCI_VBATOV_ISR1,
|
|
202 |
ETPS65950_IRQ_BCI_VBATLVL_ISR1,
|
|
203 |
|
|
204 |
ETPS65950_IRQ_KEYP_ITMISR1,
|
|
205 |
ETPS65950_IRQ_KEYP_ITTOISR1,
|
|
206 |
ETPS65950_IRQ_KEYP_ITLKISR1,
|
|
207 |
ETPS65950_IRQ_KEYP_ITKPISR1,
|
|
208 |
|
|
209 |
ETPS65950_IRQ_USB_INTSTS_IDGND,
|
|
210 |
ETPS65950_IRQ_USB_INTSTS_SESSEND,
|
|
211 |
ETPS65950_IRQ_USB_INTSTS_SESSVALID,
|
|
212 |
ETPS65950_IRQ_USB_INTSTS_VBUSVALID,
|
|
213 |
ETPS65950_IRQ_USB_INTSTS_HOSTDISCONNECT,
|
|
214 |
ETPS65950_IRQ_USB_CARKIT_CARDP,
|
|
215 |
ETPS65950_IRQ_USB_CARKIT_CARINTDET,
|
|
216 |
ETPS65950_IRQ_USB_CARKIT_IDFLOAT,
|
|
217 |
ETPS65950_IRQ_USB_OTHER_INT_VB_SESS_VLD,
|
|
218 |
ETPS65950_IRQ_USB_OTHER_INT_DM_HI,
|
|
219 |
ETPS65950_IRQ_USB_OTHER_INT_DP_HI,
|
|
220 |
ETPS65950_IRQ_USB_OTHER_INT_MANU,
|
|
221 |
ETPS65950_IRQ_USB_OTHER_INT_ABNORMAL_STRESS,
|
|
222 |
ETPS65950_IRQ_USB_ID_INT_ID_RES_FLOAT,
|
|
223 |
ETPS65950_IRQ_USB_ID_INT_ID_RES_440K,
|
|
224 |
ETPS65950_IRQ_USB_ID_INT_ID_RES_200K,
|
|
225 |
ETPS65950_IRQ_USB_ID_INT_ID_RES_102K,
|
|
226 |
ETPS65950_IRQ_USB_CARKIT_SM_1_PSM_ERROR,
|
|
227 |
ETPS65950_IRQ_USB_CARKIT_SM_1_PH_ACC,
|
|
228 |
ETPS65950_IRQ_USB_CARKIT_SM_1_CHARGER,
|
|
229 |
ETPS65950_IRQ_USB_CARKIT_SM_1_USB_HOST,
|
|
230 |
ETPS65950_IRQ_USB_CARKIT_SM_1_USB_OTG_B,
|
|
231 |
ETPS65950_IRQ_USB_CARKIT_SM_1_CARKIT,
|
|
232 |
ETPS65950_IRQ_USB_CARKIT_SM_1_DISCONNECTED,
|
|
233 |
ETPS65950_IRQ_USB_CARKIT_SM_2_STOP_PLS_MISS,
|
|
234 |
ETPS65950_IRQ_USB_CARKIT_SM_2_STEREO_TO_MONO,
|
|
235 |
ETPS65950_IRQ_USB_CARKIT_SM_2_PHONE_UART,
|
|
236 |
ETPS65950_IRQ_USB_CARKIT_SM_2_PH_NO_ACK,
|
|
237 |
|
|
238 |
KTPS65950IrqLast,
|
|
239 |
};
|
|
240 |
|
|
241 |
const TInt KNumTPSInts = (KTPS65950IrqLast - KTPS65950IrqFirst);
|
|
242 |
|
|
243 |
} // namespace TPS65950
|
|
244 |
|
|
245 |
|
|
246 |
#endif //tps65950
|