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1 // Copyright (c) 1994-2009 Nokia Corporation and/or its subsidiary(-ies). |
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2 // All rights reserved. |
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3 // This component and the accompanying materials are made available |
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4 // under the terms of the License "Eclipse Public License v1.0" |
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5 // which accompanies this distribution, and is available |
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6 // at the URL "http://www.eclipse.org/legal/epl-v10.html". |
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7 // |
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8 // Initial Contributors: |
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9 // Nokia Corporation - initial contribution. |
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10 // |
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11 // Contributors: |
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12 // |
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13 // Description: |
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14 // omap3530/assp/src/register.cpp |
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15 // |
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16 |
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17 #include <assp.h> |
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18 #include <assp/omap3530_assp/omap3530_asspreg.h> |
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19 |
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20 #ifdef __SMP__ |
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21 TSpinLock AsspLock(TSpinLock::EOrderGenericIrqLow1); |
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22 #endif |
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23 |
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24 /////////////////////////////////////////////////////////////////////////////// |
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25 // |
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26 // MHA - Modular Hardware Adaption |
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27 // |
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28 // Register Access |
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29 // |
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30 /////////////////////////////////////////////////////////////////////////////// |
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31 |
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32 |
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33 /////////////////////////////////////////////////////////////////////////////// |
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34 // We need spin locks around read, modify, write operations because another CPU |
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35 // may access the same memory in between operations and potentially cause |
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36 // memory corruption. |
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37 /////////////////////////////////////////////////////////////////////////////// |
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38 EXPORT_C void AsspRegister::Modify8(TLinAddr aAddr, TUint8 aClearMask, TUint8 aSetMask) |
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39 { |
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40 TUint irq = __SPIN_LOCK_IRQSAVE(AsspLock); |
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41 TUint8 value = *(volatile TUint8 *)aAddr; |
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42 value &= ~aClearMask; |
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43 value |= aSetMask; |
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44 *(volatile TUint8 *)aAddr = value; |
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45 __SPIN_UNLOCK_IRQRESTORE(AsspLock,irq); |
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46 } |
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47 |
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48 EXPORT_C void AsspRegister::Modify16(TLinAddr aAddr, TUint16 aClearMask, TUint16 aSetMask) |
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49 { |
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50 TUint irq = __SPIN_LOCK_IRQSAVE(AsspLock); |
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51 TUint16 value = *(volatile TUint16 *)aAddr; |
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52 value &= ~aClearMask; |
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53 value |= aSetMask; |
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54 *(volatile TUint16 *)aAddr = value; |
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55 __SPIN_UNLOCK_IRQRESTORE(AsspLock,irq); |
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56 } |
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57 |
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58 EXPORT_C void AsspRegister::Modify32(TLinAddr aAddr, TUint32 aClearMask, TUint32 aSetMask) |
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59 { |
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60 TUint irq = __SPIN_LOCK_IRQSAVE(AsspLock); |
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61 TUint32 value = *(volatile TUint32 *)aAddr; |
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62 value &= ~aClearMask; |
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63 value |= aSetMask; |
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64 *(volatile TUint32 *)aAddr = value; |
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65 __SPIN_UNLOCK_IRQRESTORE(AsspLock,irq); |
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66 } |
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67 |
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68 /////////////////////////////////////////////////////////////////////////////// |
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69 // 64 bit operations may be more complex than 8/16/32 bit operations, depending |
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70 // upon hardware support for 64 bit accesses. |
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71 // |
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72 // For example, one platform required an assembly language function to prevent |
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73 // the compliler optimising the accesses into 2 x 32 bit accesses and causing a |
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74 // bus error. |
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75 // |
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76 // Spinlocks are required for non-atomic operations and are therefore |
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77 // recommended for 64 bit accesses on current platforms. |
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78 /////////////////////////////////////////////////////////////////////////////// |
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79 extern TUint64 DoRead64(TLinAddr aAddr); |
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80 |
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81 EXPORT_C TUint64 AsspRegister::Read64(TLinAddr aAddr) |
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82 { |
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83 TUint irq = __SPIN_LOCK_IRQSAVE(AsspLock); |
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84 TUint64 value = DoRead64(aAddr); |
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85 __SPIN_UNLOCK_IRQRESTORE(AsspLock,irq); |
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86 return value; |
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87 } |
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88 |
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89 extern void DoWrite64(TLinAddr aAddr, TUint64 aValue); |
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90 |
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91 EXPORT_C void AsspRegister::Write64(TLinAddr aAddr, TUint64 aValue) |
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92 { |
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93 TUint irq = __SPIN_LOCK_IRQSAVE(AsspLock); |
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94 DoWrite64(aAddr, aValue); |
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95 __SPIN_UNLOCK_IRQRESTORE(AsspLock,irq); |
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96 } |
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97 |
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98 EXPORT_C void AsspRegister::Modify64(TLinAddr aAddr, TUint64 aClearMask, TUint64 aSetMask) |
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99 { |
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100 TUint irq = __SPIN_LOCK_IRQSAVE(AsspLock); |
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101 TUint64 value = DoRead64(aAddr); |
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102 value &= ~aClearMask; |
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103 value |= aSetMask; |
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104 DoWrite64(aAddr, value); |
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105 __SPIN_UNLOCK_IRQRESTORE(AsspLock,irq); |
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106 } |
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107 |