omap3530/omap3530_drivers/spi/master.cpp
branchBeagle_BSP_dev
changeset 112 fdfa12d9a47a
parent 85 d93b485c1325
equal deleted inserted replaced
111:35fb7dda225a 112:fdfa12d9a47a
    13 //
    13 //
    14 // Description:
    14 // Description:
    15 // Implementation of IIC master channel for a SPI bus.
    15 // Implementation of IIC master channel for a SPI bus.
    16 //
    16 //
    17 
    17 
    18 #define DBGPRINT(x)
    18 
       
    19 
       
    20 #ifdef _DEBUG
       
    21 #define DBGPRINT(x) //x
       
    22 #define DEBUG_ONLY(x) //x
    19 #define DBG_ERR(x) x
    23 #define DBG_ERR(x) x
    20 
       
    21 
       
    22 #ifdef _DEBUG
       
    23 #define DEBUG_ONLY(x) //x
       
    24 #else
    24 #else
    25 #define DEBUG_ONLY(x)
    25 #define DEBUG_ONLY(x)
       
    26 #define DBGPRINT(x)
       
    27 #define DBG_ERR(x)
    26 #endif
    28 #endif
    27 
    29 
    28 
    30 
    29 // DO NOT CHANGE THESE- trying to tune the driver (unless you really know what you're doing)
    31 // DO NOT CHANGE THESE- trying to tune the driver (unless you really know what you're doing)
    30 // as this this is only for development purpose to tune the driver. Fifo mode is not yet enabled, but this
    32 // as this this is only for development purpose to tune the driver. Fifo mode is not yet enabled, but this
   186 		}
   188 		}
   187 
   189 
   188 	// reconfigure pins if needed..
   190 	// reconfigure pins if needed..
   189 	if(slavePinSet != iCurrSlavePinSet)
   191 	if(slavePinSet != iCurrSlavePinSet)
   190 		{
   192 		{
       
   193 		DeactivateSpiPins(iChannelNumber, iCurrSlavePinSet);
       
   194 		SetupSpiPins(iChannelNumber, slavePinSet);
   191 		iCurrSlavePinSet = slavePinSet;
   195 		iCurrSlavePinSet = slavePinSet;
   192 		SetupSpiPins(iChannelNumber, iCurrSlavePinSet);
       
   193 		}
   196 		}
   194 
   197 
   195 	// store configuration parameters
   198 	// store configuration parameters
   196 	iCurrSS          = slaveAddr;
   199 	iCurrSS          = slaveAddr;
   197 	iCurrHeader      = newHeader; //copy the header..
   200 	iCurrHeader      = newHeader; //copy the header..
   408 			DBGPRINT(Kern::Printf("Length %d, iWordSize %d", desBufPtr->Length(), iWordSize));
   411 			DBGPRINT(Kern::Printf("Length %d, iWordSize %d", desBufPtr->Length(), iWordSize));
   409 
   412 
   410 			// Store the current address and ending address for Transmission - they are required by the ISR and DFC
   413 			// Store the current address and ending address for Transmission - they are required by the ISR and DFC
   411 			iTxData    = (TInt8*)  desBufPtr->Ptr();
   414 			iTxData    = (TInt8*)  desBufPtr->Ptr();
   412 			iTxDataEnd = (TInt8*) (iTxData + desBufPtr->Length());
   415 			iTxDataEnd = (TInt8*) (iTxData + desBufPtr->Length());
   413 			if ((TInt)iTxDataEnd % iWordSize)
   416 			if (((TInt)iTxDataEnd == (TInt)iTxData) ||  // buffer empty
   414 				{
   417 			     (TInt)iTxDataEnd % iWordSize) // or wrong size / word length combination
   415 				DBG_ERR(Kern::Printf("Wrong configuration - word size does not match buffer length"));
   418 				{
       
   419 				DBG_ERR(if ((TInt)iTxDataEnd == (TInt)iTxData) Kern::Printf("Zero-length buffer used for transfer.."));
       
   420 				DBG_ERR(if ((TInt)iTxDataEnd % iWordSize) Kern::Printf("Wrong configuration - word size does not match buffer length"));
       
   421 				ExitComplete(KErrArgument, EFalse);
   416 				return KErrArgument;
   422 				return KErrArgument;
   417 				}
   423 				}
   418 
   424 
   419 			DBGPRINT(Kern::Printf("Tx: Start: %x, End %x, bytes %d", iTxData, iTxDataEnd, desBufPtr->Length()));
   425 			DBGPRINT(Kern::Printf("Tx: Start: %x, End %x, bytes %d", iTxData, iTxDataEnd, desBufPtr->Length()));
   420 
   426 
   438 			const TDes8* aBufPtr = GetTferBuffer(aTransferPtr);
   444 			const TDes8* aBufPtr = GetTferBuffer(aTransferPtr);
   439 
   445 
   440 			// Store the current address and ending address for Reception - they are required by the ISR and DFC
   446 			// Store the current address and ending address for Reception - they are required by the ISR and DFC
   441 			iRxData = (TInt8*) aBufPtr->Ptr();
   447 			iRxData = (TInt8*) aBufPtr->Ptr();
   442 			iRxDataEnd = (TInt8*) (iRxData + aBufPtr->Length());
   448 			iRxDataEnd = (TInt8*) (iRxData + aBufPtr->Length());
       
   449 			if (((TInt)iRxDataEnd == (TInt)iRxData) ||  // buffer empty
       
   450 			     (TInt)iRxDataEnd % iWordSize) // or wrong size / word length combination
       
   451 				{
       
   452 				DBG_ERR(if ((TInt)iRxDataEnd == (TInt)iRxData) Kern::Printf("Zero-length buffer used for transfer.."));
       
   453 				DBG_ERR(if ((TInt)iRxDataEnd % iWordSize) Kern::Printf("Wrong configuration - word size does not match buffer length"));
       
   454 				ExitComplete(KErrArgument, EFalse);
       
   455 				return KErrArgument;
       
   456 				}
   443 
   457 
   444 			DBGPRINT(Kern::Printf("Rx: Start: %x, End %x, bytes %d", iRxData, iRxDataEnd, aBufPtr->Length()));
   458 			DBGPRINT(Kern::Printf("Rx: Start: %x, End %x, bytes %d", iRxData, iRxDataEnd, aBufPtr->Length()));
   445 
   459 
   446 			// Set the flag to indicate that we'll be receiving data
   460 			// Set the flag to indicate that we'll be receiving data
   447 			iOperation.iOp.iIsReceiving = ETrue;
   461 			iOperation.iOp.iIsReceiving = ETrue;