1 // Copyright (c) 2010 Nokia Corporation and/or its subsidiary(-ies). |
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2 // All rights reserved. |
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3 // This component and the accompanying materials are made available |
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4 // under the terms of "Eclipse Public License v1.0" |
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5 // which accompanies this distribution, and is available |
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6 // at the URL "http://www.eclipse.org/legal/epl-v10.html". |
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7 // |
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8 // Initial Contributors: |
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9 // Nokia Corporation - initial contribution. |
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10 // |
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11 // Contributors: |
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12 // |
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13 // Description: |
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14 // Implementation of Virtual Video Hardware Interface |
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15 |
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16 |
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17 // INCLUDE FILES |
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18 #include <platform.h> |
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19 #include <kern_priv.h> |
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20 |
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21 #include <graphics/guestvideodriverinterfaceconstants.h> |
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22 #include <graphics/virtualvideohwinterface.h> |
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23 #include <graphics/virtualvideotracing.h> |
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24 #include "syborg.h" |
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25 |
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26 // CONSTANTS |
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27 |
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28 #ifdef PLATSIM_CONFIG |
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29 _LIT( KVirtualVideoHwInterfacePanic, "DVirtualVideoHwInterface" ); |
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30 #endif |
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31 |
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32 // ============================ LOCAL DATA TYPES =============================== |
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33 |
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34 TPhysAddr DVirtualVideoHwInterface::iVideoRamBasePhys = NULL; |
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35 |
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36 // Register offsets for playback and recording channels |
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37 // Note: The orders of these must match the order of enumarations |
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38 const TLinAddr KRegisterOffsets[] = |
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39 { |
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40 VVI_R_ID, |
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41 VVI_R_IRQ_ENABLE, |
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42 VVI_R_IRQ_STATUS, |
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43 VVI_R_COMMAND, |
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44 VVI_R_PARAMETER_LOAD, |
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45 VVI_R_ERROR, |
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46 VVI_R_INPUT_BUFFER_TAIL, |
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47 VVI_R_INPUT_BUFFER_HEAD, |
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48 VVI_R_INPUT_BUFFER_READ_COUNT, |
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49 VVI_R_INPUT_BUFFER_WRITE_COUNT, |
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50 VVI_R_INPUT_BUFFER_MAX_TAIL, |
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51 VVI_R_REQUEST_ID, |
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52 VVI_R_SHARED_CMD_MEMORY_BASE, |
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53 VVI_R_SHARED_SURFACEBUFFER_MEMORY_BASE |
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54 }; |
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55 #define ASSERT_PANIC(c,p) __ASSERT_DEBUG(c,Kern::PanicCurrentThread(KVirtualVideoHwInterfacePanic,p)); |
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56 |
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57 // ============================ LOCAL FUNCTIONS ================================ |
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58 |
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59 // Get register offset for certain register range and register |
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60 inline TLinAddr RegisterOffset( DVirtualVideoHwInterface::TRegister aRegister ) |
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61 { |
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62 return KRegisterOffsets[aRegister]; |
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63 } |
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64 |
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65 // ============================ MEMBER FUNCTIONS =============================== |
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66 |
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67 // ----------------------------------------------------------------------------- |
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68 // DVirtualVideoHwInterface::DVirtualVideoHwInterface |
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69 // ----------------------------------------------------------------------------- |
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70 // |
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71 DVirtualVideoHwInterface::DVirtualVideoHwInterface() |
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72 { |
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73 VVHW_TRACE("DVirtualVideoHwInterface::DVirtualVideoHwInterface()>"); |
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74 iInputParametersMemoryChunk = NULL; |
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75 iOutputParametersMemoryChunk = NULL; |
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76 iRegisterMemoryChunk = NULL; |
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77 |
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78 #ifdef PLATSIM_CONFIG |
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79 iVideoRamBasePhys = VVI_BASE; |
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80 #else |
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81 // Reserve a contiguous memory chunk for graphics usage |
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82 TUint32 ramSize = VVI_PARAMETERS_INPUT_MEMORY_SIZE + |
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83 VVI_PARAMETERS_OUTPUT_MEMORY_SIZE + |
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84 VVI_SURFACEBUFFER_MEMORY_SIZE; |
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85 TInt r = Epoc::AllocPhysicalRam( ramSize, iVideoRamBasePhys ); |
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86 VVHW_TRACE("DVirtualVideoHwInterface::DVirtualVideoHwInterface() AllocPhysicalRam %d", r); |
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87 if (r != KErrNone) |
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88 { |
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89 NKern::ThreadLeaveCS(); |
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90 Kern::Fault("DVirtualVideoHwInterface Allocate Ram %d",r); |
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91 } |
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92 SetSharedCmdMemBase( iVideoRamBasePhys + VVI_PARAMETERS_INPUT_BASE_ADDRESS ); |
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93 SetSharedSurfacebufferMemBase( iVideoRamBasePhys + VVI_SURFACEBUFFER_BASE_ADDRESS ); |
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94 |
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95 #endif // PLATSIM_CONFIG |
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96 VVHW_TRACE("DVirtualVideoHwInterface::DVirtualVideoHwInterface()<"); |
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97 } |
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98 |
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99 |
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100 // ----------------------------------------------------------------------------- |
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101 // DVirtualVideoHwInterface::~DVirtualVideoHwInterface |
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102 // ----------------------------------------------------------------------------- |
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103 // |
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104 DVirtualVideoHwInterface::~DVirtualVideoHwInterface() |
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105 { |
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106 // Enter critical section |
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107 NKern::ThreadEnterCS(); |
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108 |
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109 if ( iInputParametersMemoryChunk ) |
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110 { |
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111 Kern::ChunkClose( iInputParametersMemoryChunk ); |
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112 } |
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113 |
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114 if ( iOutputParametersMemoryChunk ) |
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115 { |
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116 Kern::ChunkClose( iOutputParametersMemoryChunk ); |
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117 } |
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118 |
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119 if ( iRegisterMemoryChunk ) |
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120 { |
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121 Kern::ChunkClose( iRegisterMemoryChunk ); |
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122 } |
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123 |
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124 iInputParametersMemoryChunk = NULL; |
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125 iOutputParametersMemoryChunk = NULL; |
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126 iRegisterMemoryChunk = NULL; |
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127 |
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128 // Leave critical section |
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129 NKern::ThreadLeaveCS(); |
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130 } |
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131 |
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132 TInt DVirtualVideoHwInterface::InitParametersInputMemory() |
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133 { |
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134 return InitPhysicalMemory( iVideoRamBasePhys + VVI_PARAMETERS_INPUT_BASE_ADDRESS, |
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135 VVI_PARAMETERS_INPUT_MEMORY_SIZE, iInputParametersMemoryChunk, |
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136 iInputParametersChunkKernelAddress ); |
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137 } |
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138 |
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139 TInt DVirtualVideoHwInterface::InitParametersOutputMemory() |
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140 { |
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141 return InitPhysicalMemory( iVideoRamBasePhys + VVI_PARAMETERS_OUTPUT_BASE_ADDRESS, |
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142 VVI_PARAMETERS_OUTPUT_MEMORY_SIZE, iOutputParametersMemoryChunk, |
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143 iOutputParametersChunkKernelAddress ); |
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144 } |
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145 |
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146 TInt DVirtualVideoHwInterface::InitRegisterMemory() |
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147 { |
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148 #ifdef PLATSIM_CONFIG |
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149 return InitPhysicalMemory( VVI_REGISTERS_BASE_ADDRESS, |
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150 VVI_REGISTERS_MEMORY_SIZE, iRegisterMemoryChunk, |
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151 iRegisterChunkKernelAddress ); |
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152 #else |
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153 return KErrNone; |
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154 #endif // PLATSIM_CONFIG |
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155 } |
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156 |
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157 // ----------------------------------------------------------------------------- |
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158 // DVirtualVideoHwInterface::InitPhysicalMemory |
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159 // ----------------------------------------------------------------------------- |
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160 // |
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161 TInt DVirtualVideoHwInterface::InitPhysicalMemory( TUint32 aPhysicalAddress, |
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162 TInt aMaxSize, DChunk*& aChunk, TLinAddr& aLinAddr ) |
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163 { |
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164 TInt error = KErrNoMemory; |
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165 TChunkCreateInfo info; |
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166 info.iType = TChunkCreateInfo::ESharedKernelSingle; |
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167 info.iMaxSize = aMaxSize; |
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168 info.iMapAttr = EMapAttrFullyBlocking; |
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169 info.iOwnsMemory = EFalse; |
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170 info.iDestroyedDfc = NULL; |
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171 DChunk* chunk = NULL; |
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172 TUint32 mapAttr = 0; |
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173 TLinAddr chunkKernelAddress = 0; |
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174 |
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175 // Enter critical section while creating the chunk and commiting memory |
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176 NKern::ThreadEnterCS(); |
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177 |
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178 error = Kern::ChunkCreate( info, chunk, chunkKernelAddress, mapAttr ); |
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179 if ( !error ) |
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180 { |
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181 error = Kern::ChunkCommitPhysical( |
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182 chunk, 0, aMaxSize, aPhysicalAddress ); |
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183 if ( error ) |
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184 { |
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185 Kern::ChunkClose( chunk ); |
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186 } |
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187 else |
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188 { |
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189 // Physical memory has been successfully committed to chunk |
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190 aChunk = chunk; |
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191 aLinAddr = chunkKernelAddress; |
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192 } |
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193 } |
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194 chunk = NULL; |
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195 |
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196 // Leave critical section |
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197 NKern::ThreadLeaveCS(); |
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198 |
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199 VVHW_TRACE("DVirtualVideoHwInterface::InitPhysicalMemory return %d", error); |
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200 return error; |
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201 } |
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202 |
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203 // ----------------------------------------------------------------------------- |
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204 // ----------------------------------------------------------------------------- |
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205 // DVirtualVideoHwInterface::EnableInterrupts |
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206 // ----------------------------------------------------------------------------- |
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207 // |
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208 void DVirtualVideoHwInterface::EnableInterrupts( TUint32 aInterruptBitField ) |
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209 { |
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210 SetRegisterValue( ERegIrqEnable, aInterruptBitField ); |
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211 } |
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212 |
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213 |
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214 // ----------------------------------------------------------------------------- |
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215 // DVirtualVideoHwInterface::GetInterruptEnabledState |
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216 // ----------------------------------------------------------------------------- |
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217 // |
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218 void DVirtualVideoHwInterface::GetInterruptEnabledState( TUint32& aInterruptBitField ) |
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219 { |
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220 GetRegisterValue( ERegIrqEnable, aInterruptBitField ); |
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221 } |
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222 |
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223 |
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224 // ----------------------------------------------------------------------------- |
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225 // DVirtualVideoHwInterface::GetInterruptStatus |
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226 // ----------------------------------------------------------------------------- |
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227 // |
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228 void DVirtualVideoHwInterface::GetInterruptStatus( TUint32& aInterruptBitField ) |
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229 { |
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230 GetRegisterValue( ERegIrqStatus, aInterruptBitField ); |
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231 } |
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232 |
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233 |
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234 // ----------------------------------------------------------------------------- |
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235 // DVirtualVideoHwInterface::ResetInterruptStatus |
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236 // ----------------------------------------------------------------------------- |
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237 // |
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238 void DVirtualVideoHwInterface::ResetInterruptStatus( TUint32 aInterruptBitField ) |
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239 { |
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240 SetRegisterValue( ERegIrqStatus, aInterruptBitField ); |
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241 } |
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242 |
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243 |
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244 // DVirtualVideoHwInterface::IssueCommand |
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245 // ----------------------------------------------------------------------------- |
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246 // |
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247 void DVirtualVideoHwInterface::IssueCommand( TUint32 aCommand ) |
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248 { |
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249 SetRegisterValue( ERegCommand, aCommand ); |
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250 } |
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251 |
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252 // DVirtualVideoHwInterface::SetSharedCmdMemBase |
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253 // ----------------------------------------------------------------------------- |
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254 // |
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255 void DVirtualVideoHwInterface::SetSharedCmdMemBase( TUint32 aPhysicalAddress ) |
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256 { |
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257 VVHW_TRACE("DVirtualVideoHwInterface::SetSharedCmdMemBase 0x%08x", aPhysicalAddress); |
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258 SetRegisterValue( ERegSharedCmdMemBase, aPhysicalAddress ); |
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259 } |
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260 |
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261 void DVirtualVideoHwInterface::SetSharedSurfacebufferMemBase( TUint32 aPhysicalAddress ) |
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262 { |
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263 VVHW_TRACE("DVirtualVideoHwInterface::SetSharedSurfacebufferMemBase 0x%08x", aPhysicalAddress); |
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264 SetRegisterValue( ERegSharedSurfacebufferMemBase, aPhysicalAddress ); |
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265 } |
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266 |
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267 // ----------------------------------------------------------------------------- |
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268 // DVirtualVideoHwInterface::GetRegisterValue |
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269 // ----------------------------------------------------------------------------- |
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270 // |
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271 void DVirtualVideoHwInterface::GetRegisterValue( |
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272 TRegister aRegister, |
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273 TUint32& aValue ) |
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274 { |
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275 if ( iRegisterMemoryChunk ) |
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276 { |
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277 TLinAddr offset = RegisterOffset( aRegister ); |
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278 TUint32* ptr = reinterpret_cast<TUint32*>( iRegisterChunkKernelAddress + offset ); |
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279 aValue = *ptr; |
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280 } |
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281 else |
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282 { |
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283 #ifdef PLATSIM_CONFIG |
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284 Kern::PanicCurrentThread( KVirtualVideoHwInterfacePanic, KErrNotReady ); |
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285 #else |
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286 TLinAddr offset = RegisterOffset( aRegister ); |
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287 aValue = ReadReg( KHwGraphicsRegBase, offset ); |
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288 #endif // PLATSIM_CONFIG |
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289 } |
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290 } |
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291 |
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292 |
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293 // ----------------------------------------------------------------------------- |
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294 // DVirtualVideoHwInterface::SetRegisterValue |
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295 // ----------------------------------------------------------------------------- |
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296 // |
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297 void DVirtualVideoHwInterface::SetRegisterValue( |
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298 TRegister aRegister, |
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299 TUint32 aValue ) |
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300 { |
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301 if ( iRegisterMemoryChunk ) |
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302 { |
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303 TLinAddr offset = RegisterOffset( aRegister ); |
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304 TUint32* ptr = reinterpret_cast<TUint32*>( iRegisterChunkKernelAddress + offset ); |
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305 *ptr = aValue; |
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306 } |
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307 else |
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308 { |
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309 #ifdef PLATSIM_CONFIG |
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310 Kern::PanicCurrentThread( KVirtualVideoHwInterfacePanic, KErrNotReady ); |
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311 #else |
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312 TLinAddr offset = RegisterOffset( aRegister ); |
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313 WriteReg( KHwGraphicsRegBase, offset, aValue ); |
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314 #endif // PLATSIM_CONFIG |
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315 } |
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316 } |
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317 |
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318 EXPORT_C TPhysAddr DVirtualVideoHwInterface::GetSurfaceBufferBase() |
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319 { |
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320 TPhysAddr ret = 0; |
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321 if( iVideoRamBasePhys != 0 ) |
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322 { |
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323 ret = iVideoRamBasePhys + VVI_SURFACEBUFFER_BASE_ADDRESS; |
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324 } |
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325 return ret; |
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326 } |
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327 |
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