navienginebsp/naviengine_assp/pci/pci.h
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     1 /*
       
     2 * Copyright (c) 2008-2009 Nokia Corporation and/or its subsidiary(-ies).
       
     3 * All rights reserved.
       
     4 * This component and the accompanying materials are made available
       
     5 * under the terms of "Eclipse Public License v1.0"
       
     6 * which accompanies this distribution, and is available
       
     7 * at the URL "http://www.eclipse.org/legal/epl-v10.html".
       
     8 *
       
     9 * Initial Contributors:
       
    10 * Nokia Corporation - initial contribution.
       
    11 *
       
    12 * Contributors:
       
    13 *
       
    14 * Description:  
       
    15 *
       
    16 */
       
    17 
       
    18 
       
    19 
       
    20 /**
       
    21  @file
       
    22  @publishedPartner
       
    23  @test
       
    24 */
       
    25 
       
    26 #ifndef _PCI_H
       
    27 #define _PCI_H
       
    28 
       
    29 #include <e32cmn.h>
       
    30 
       
    31 typedef TUint16 TPciVendorId;
       
    32 typedef TUint16 TDeviceId;
       
    33 typedef TUint16 TSubSysId;
       
    34 typedef TUint16 TSubSysVendorId;
       
    35 
       
    36 const TUint KCfgSpaceSize = 256; // bytes
       
    37 
       
    38 const TInt KPciMaxBusses = 1; //This can be 256, but this driver doesn't need to support subordinate busses yet
       
    39 const TInt KPciMaxDevices = 32;
       
    40 const TInt KPciMaxFunctions = 8;
       
    41 
       
    42 const TInt KPciNumberOfBars=6;
       
    43 const TUint KPciBar0 = 0x10;
       
    44 const TUint KPciHeaderType = 0xE;
       
    45 
       
    46 /**
       
    47 Bitmasks for standard PCI Base address register.
       
    48 */
       
    49 namespace Bar
       
    50 	{
       
    51 	const TUint32 KHtMemSpaceType	= KBit0; // Mem or Io address space
       
    52 	const TUint32 KHmType			= KBit1|KBit2; //32 bit or 64 bit bar
       
    53 	const TUint32 KHtPreFetchable	= KBit3; // Set if memspace is prefetchable
       
    54 	}
       
    55 
       
    56 /**
       
    57 Bitmask for standard PCI header register
       
    58 */
       
    59 namespace HeaderType
       
    60 	{
       
    61 	const TUint32 KHtMultiFunction	= KBit7; //True if the device is multifunction
       
    62 	}
       
    63 
       
    64 class TAddrSpace;
       
    65 class TPciFunction;
       
    66 class TChunkCleanup;
       
    67 class DPciBridge;
       
    68 class DChunk;
       
    69 class DPlatChunkHw;
       
    70 struct TChunkCreateInfo;
       
    71 
       
    72 /**
       
    73 A static class initialised in the kernel extension
       
    74 to enumerate the system's PCI buses and grant access to
       
    75 PCI functions.
       
    76 */
       
    77 class Pci
       
    78 	{
       
    79 public:
       
    80 	IMPORT_C static TInt Probe(RArray<TInt>& aListOfFunctions, TPciVendorId aVid, TDeviceId aDid);
       
    81 	IMPORT_C static TAddrSpace* GetMemorySpace(TInt aFunction, TInt aBarIndex=0);
       
    82 	IMPORT_C static TAddrSpace* GetConfigSpace(TInt aFunction);
       
    83 	IMPORT_C static TInt CreateChunk(TInt aFunction, DPlatChunkHw*& aChunk, TInt aSize, 
       
    84 		TUint aAttributes, TUint32& aPciAddress);
       
    85 	IMPORT_C static TInt CreateChunk(TInt aFunction, DChunk*& aChunk, TChunkCreateInfo &aAttributes, 
       
    86 		TUint aOffset, TUint aSize, TUint32& aPciAddress);
       
    87 	IMPORT_C static TInt RemoveChunk(TInt aFunction, DPlatChunkHw* aChunk);
       
    88 	IMPORT_C static TInt CreateMapping(TInt aFunction, TUint32 aPhysicalAddress, TInt aSize, 
       
    89 		TUint32& aPciAddress);
       
    90 	IMPORT_C static TInt RemoveMapping(TInt aFunction, TUint32 aPhysicalAddress);
       
    91 	IMPORT_C static TInt GetPciAddress(TInt aFunction, TUint32& aAddress);
       
    92 	IMPORT_C static TInt GetPhysicalAddress(TInt aFunction, TUint32& aAddress);
       
    93 
       
    94 
       
    95 	static TInt Enumerate();
       
    96 protected:
       
    97 	friend class DPciBridge;
       
    98 	static TInt AddBridge(DPciBridge* aBridge);
       
    99 
       
   100 	friend class TChunkCleanup; //!< Allow Cleanup object to use callback
       
   101 	IMPORT_C static void ChunkCleanupCallback(TChunkCleanup* aCleanup);
       
   102 	
       
   103 	static TBool iEnumerated;						//!< Is toggled after enummeration
       
   104 	static RPointerArray<DPciBridge> iPciBridges;			//!< All the bridges on the system
       
   105 	static RPointerArray<TPciFunction> iFunctions;	//!< A system wide list of available PCI functions
       
   106 	};
       
   107 
       
   108 
       
   109 #define READ(n) virtual TUint##n Read##n(TUint32 aOffset)
       
   110 #define WRITE(n) virtual void Write##n(TUint32 aOffset, TUint##n aValue)
       
   111 #define MODIFY(n) virtual void Modify##n(TUint32 aOffset, TUint##n aClearMask, TUint##n aSetMask)
       
   112 /**
       
   113 Allows reads and writes to a section of address space.
       
   114 */
       
   115 class TAddrSpace
       
   116 	{
       
   117 public:
       
   118 	IMPORT_C TUint Size();
       
   119 
       
   120 	IMPORT_C READ(8) =0;
       
   121 	IMPORT_C READ(16) =0;
       
   122 	IMPORT_C READ(32) =0;
       
   123 
       
   124 	IMPORT_C WRITE(8) =0;
       
   125 	IMPORT_C WRITE(16) =0;
       
   126 	IMPORT_C WRITE(32) =0;
       
   127 
       
   128 	IMPORT_C MODIFY(8) =0;
       
   129 	IMPORT_C MODIFY(16) =0;
       
   130 	IMPORT_C MODIFY(32) =0;
       
   131 protected:
       
   132 	enum TNumberOfBytes {E1Byte=1, E2Byte=2, E4Byte=4};
       
   133 	void CheckAccess(TNumberOfBytes aNumberOfBytes, TUint aByteOffset);
       
   134 
       
   135 	TAddrSpace(TUint aSize, const TDesC& aName);
       
   136 	const TUint iSize; //!< Size of address space in bytes
       
   137 	const TDesC& iName; //!< Used in trace messages
       
   138 	};
       
   139 #endif //_PCI_H