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1 /* |
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2 * Copyright (c) 2008-2009 Nokia Corporation and/or its subsidiary(-ies). |
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3 * All rights reserved. |
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4 * This component and the accompanying materials are made available |
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5 * under the terms of "Eclipse Public License v1.0" |
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6 * which accompanies this distribution, and is available |
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7 * at the URL "http://www.eclipse.org/legal/epl-v10.html". |
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8 * |
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9 * Initial Contributors: |
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10 * Nokia Corporation - initial contribution. |
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11 * |
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12 * Contributors: |
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13 * |
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14 * Description: |
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15 * |
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16 */ |
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17 |
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18 |
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19 |
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20 #include <pci.h> |
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21 #include <naviengine_priv.h> |
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22 #include <naviengine.h> |
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23 #include <kernel/cache.h> |
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24 #include "allocator.h" |
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25 #include "pci-ne.h" |
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26 |
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27 #define TEST(X) __NK_ASSERT_ALWAYS(X) |
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28 #define TEST_KERRNONE(X) TEST((X)==KErrNone) |
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29 |
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30 /** |
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31 Make sure that I can read and write some values as expected |
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32 */ |
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33 void TestConfigAccess(TAddrSpace& aCfgSpc) |
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34 { |
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35 TEST(aCfgSpc.Size()==0x100); |
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36 |
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37 TEST(aCfgSpc.Read32(0x0)==0x00351033); |
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38 |
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39 TEST(aCfgSpc.Read16(0x0)==0x1033); |
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40 |
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41 TEST(aCfgSpc.Read16(0x2)==0x0035); |
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42 |
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43 TEST(aCfgSpc.Read8(0x0)==0x33); |
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44 |
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45 TEST(aCfgSpc.Read8(0x1)==0x10); |
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46 |
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47 TEST(aCfgSpc.Read8(0x02)==0x35); |
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48 |
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49 TEST(aCfgSpc.Read8(0x3)==0x00); |
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50 |
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51 //test writes (there aren't that many contiguous blocks of writable bits in config space, but the BAR will do) |
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52 const TUint32 original= aCfgSpc.Read32(KPciBar0); |
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53 |
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54 aCfgSpc.Write32(KPciBar0,0xFFFFFFFF); |
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55 const TUint32 filled = aCfgSpc.Read32(KPciBar0); |
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56 TEST(filled==0xFFFFF000); //not all of register is writable |
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57 |
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58 aCfgSpc.Write8(KPciBar0+0x3,0xBA); |
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59 TEST(aCfgSpc.Read8(KPciBar0+0x3)== 0xBA); |
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60 TEST(aCfgSpc.Read32(KPciBar0)== 0xBAFFF000); |
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61 |
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62 aCfgSpc.Write8(KPciBar0+0x2,0x55); |
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63 TEST(aCfgSpc.Read8(KPciBar0+0x2)== 0x55); |
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64 TEST(aCfgSpc.Read32(KPciBar0)== 0xBA55F000); |
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65 |
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66 aCfgSpc.Write8(KPciBar0+0x1,0x42); |
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67 TEST(aCfgSpc.Read8(KPciBar0+0x1)== 0x40); //lower nibble unwriteable |
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68 TEST(aCfgSpc.Read32(KPciBar0)== 0xBA554000); |
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69 |
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70 aCfgSpc.Write16(KPciBar0+0x0,0x5000); |
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71 TEST(aCfgSpc.Read16(KPciBar0+0x0)== 0x5000); |
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72 TEST(aCfgSpc.Read32(KPciBar0)== 0xBA555000); |
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73 |
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74 aCfgSpc.Write16(KPciBar0+0x2,0xAAAA); |
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75 TEST(aCfgSpc.Read16(KPciBar0+0x2)== 0xAAAA); |
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76 TEST(aCfgSpc.Read32(KPciBar0)== 0xAAAA5000); |
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77 |
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78 |
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79 //test modifies |
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80 aCfgSpc.Modify8(KPciBar0+0x3, 0xFF, 0x3C); |
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81 TEST(aCfgSpc.Read8(KPciBar0+0x3) == 0x3C); |
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82 |
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83 aCfgSpc.Modify8(KPciBar0+0x2, 0xFF, 0x3C); |
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84 TEST(aCfgSpc.Read8(KPciBar0+0x2) == 0x3C); |
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85 |
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86 //restore original value. |
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87 aCfgSpc.Write32(KPciBar0, original); |
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88 TEST(aCfgSpc.Read32(KPciBar0)==original); |
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89 } |
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90 |
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91 |
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92 TBool TestMemoryAccess(TAddrSpace& memSpace) |
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93 { |
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94 TEST(memSpace.Size()==0x1000); |
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95 |
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96 //try some writes to the HcControlHeadED register - bits 31:4 are writeable |
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97 const TUint KReg=0x20; |
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98 const TUint32 initial = memSpace.Read32(KReg); |
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99 |
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100 memSpace.Write32(KReg, 0x0); |
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101 TEST(memSpace.Read32(KReg)==0x0); |
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102 |
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103 memSpace.Write32(KReg, 0xFFFFFFFF); |
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104 TEST(memSpace.Read32(KReg)==0xFFFFFFF0); //nibble0 read-only |
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105 |
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106 memSpace.Write16(KReg+2, 0xDEAD); |
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107 TEST(memSpace.Read32(KReg)==0xDEADFFF0); |
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108 |
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109 memSpace.Write16(KReg, 0xABCD); |
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110 TEST(memSpace.Read16(KReg)==0xABC0); |
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111 TEST(memSpace.Read16(KReg+2)==0xDEAD); |
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112 |
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113 memSpace.Modify32(KReg, 0x0000FFFF, 0x0F0F0000); |
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114 TEST(memSpace.Read32(KReg)==0xDFAF0000); |
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115 TEST(memSpace.Read8(KReg+3)==0xDF); |
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116 |
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117 memSpace.Write8(KReg+1,0x42); |
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118 TEST(memSpace.Read8(KReg+0)==0x00); |
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119 TEST(memSpace.Read8(KReg+1)==0x42); |
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120 TEST(memSpace.Read8(KReg+2)==0xAF); |
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121 TEST(memSpace.Read8(KReg+3)==0xDF); |
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122 TEST(memSpace.Read32(KReg)==0xDFAF4200); |
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123 |
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124 memSpace.Modify8(KReg+3,0xFF,0x10); |
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125 TEST(memSpace.Read32(KReg)==0x10AF4200); |
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126 |
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127 //reset to inital value |
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128 memSpace.Write32(KReg, initial); |
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129 TEST(memSpace.Read32(KReg)==initial); |
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130 |
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131 return ETrue; |
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132 } |
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133 |
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134 void TestAllocator() |
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135 { |
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136 __KTRACE_OPT(KPCI, Kern::Printf("Testing address allocator")); |
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137 TAddressAllocator allocator(0x80000000); //2 GB |
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138 TLinAddr rcvdAddr=NULL; |
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139 TEST_KERRNONE(allocator.Allocate(rcvdAddr,0x10) ); |
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140 TEST(0x0 ==rcvdAddr); |
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141 TEST_KERRNONE(allocator.Allocate(rcvdAddr,0x100) ); |
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142 TEST(0x100 ==rcvdAddr); |
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143 TEST_KERRNONE(allocator.Allocate(rcvdAddr,0x10) ); |
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144 TEST(0x10 ==rcvdAddr); |
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145 TEST_KERRNONE(allocator.Allocate(rcvdAddr,0x10) ); |
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146 TEST(0x20 ==rcvdAddr); |
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147 //test deallocating |
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148 TEST_KERRNONE(allocator.DeAllocate(0x0)); |
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149 TEST_KERRNONE(allocator.Allocate(rcvdAddr,0x10) ); |
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150 TEST(0x000 ==rcvdAddr); |
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151 |
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152 TEST_KERRNONE(allocator.DeAllocate(0x100)); |
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153 TEST_KERRNONE(allocator.Allocate(rcvdAddr,0x100) ); |
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154 TEST(0x100 ==rcvdAddr); |
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155 |
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156 TEST_KERRNONE(allocator.DeAllocate(0x10)); |
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157 TEST_KERRNONE(allocator.Allocate(rcvdAddr,0x10) ); |
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158 TEST(0x10 ==rcvdAddr); |
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159 |
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160 TEST_KERRNONE(allocator.DeAllocate(0x20)); |
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161 TEST_KERRNONE(allocator.Allocate(rcvdAddr,0x20) ); |
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162 TEST(0x20 ==rcvdAddr); |
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163 |
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164 TEST(allocator.DeAllocate(0x40)==KErrNotFound); |
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165 TEST_KERRNONE(allocator.DeAllocate(0x100)); |
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166 TEST_KERRNONE(allocator.DeAllocate(0x20)); |
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167 TEST_KERRNONE(allocator.DeAllocate(0x0)); |
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168 TEST_KERRNONE(allocator.DeAllocate(0x10)); |
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169 } |
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170 |
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171 /** |
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172 Wrapper to get chunk and its virtual address |
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173 */ |
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174 TInt CreatePciChunk(TInt aFunc, TInt& aSize, TUint32 aAttributes, DPlatChunkHw*& aChunk, TUint32& aPci, TLinAddr& aVirt) |
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175 { |
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176 TInt r = Pci::CreateChunk(aFunc, aChunk, aSize, aAttributes, aPci); |
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177 if(r!=KErrNone) |
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178 return r; |
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179 |
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180 aVirt=aChunk->LinearAddress(); |
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181 |
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182 return r; |
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183 } |
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184 |
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185 /** |
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186 Wrapper to create chunk and append to array |
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187 */ |
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188 TInt CreatePciChunkAppend(TInt aFunc, TInt aSize, TUint32 aAttributes, RPointerArray<DPlatChunkHw>& aChunks) |
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189 { |
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190 DPlatChunkHw* chunk=NULL; |
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191 TUint32 pci=NULL; |
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192 TInt r = Pci::CreateChunk(aFunc, chunk, aSize, aAttributes, pci); |
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193 if(KErrNone==r) |
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194 { |
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195 TEST_KERRNONE(aChunks.Append(chunk)); |
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196 } |
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197 return r; |
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198 } |
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199 |
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200 TInt CreateSharedChunk(TInt aSize, TUint32& aAttributes, DChunk*& aChunk, TLinAddr& aVirt, TPhysAddr& aPhysicalAddress) |
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201 { |
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202 TEST(aChunk==NULL); |
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203 aSize = Kern::RoundToPageSize(aSize); |
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204 TChunkCreateInfo info; |
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205 info.iType=TChunkCreateInfo::ESharedKernelSingle; |
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206 info.iMaxSize=aSize; |
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207 info.iMapAttr=aAttributes; |
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208 info.iOwnsMemory=ETrue; |
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209 |
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210 DChunk* pC=NULL; |
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211 |
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212 NKern::ThreadEnterCS(); |
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213 TInt r=Kern::ChunkCreate(info, pC, aVirt, aAttributes); |
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214 if(r!=KErrNone) |
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215 { |
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216 NKern::ThreadLeaveCS(); |
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217 return r; |
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218 } |
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219 |
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220 r = Kern::ChunkCommitContiguous(pC, 0, aSize, aPhysicalAddress); |
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221 |
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222 if(r==KErrNone) |
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223 { |
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224 aChunk=pC; |
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225 } |
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226 else |
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227 { |
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228 Kern::ChunkClose(pC); |
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229 } |
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230 |
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231 NKern::ThreadLeaveCS(); |
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232 __KTRACE_OPT(KPCI, Kern::Printf("Created SC: size=0x%08x, virtual= 0x%08x, phys=0x%08x", aSize, aVirt, aPhysicalAddress)); |
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233 return r; |
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234 } |
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235 |
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236 TInt UnmapAndCloseSC(TInt aFunc, DChunk* aChunk, TPhysAddr aPhysicalAddress) |
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237 { |
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238 TInt r = Pci::RemoveMapping(aFunc, aPhysicalAddress); |
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239 TEST_KERRNONE(r); |
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240 NKern::ThreadEnterCS(); |
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241 TEST(Kern::ChunkClose(aChunk)); //test that ref count has gone to zero |
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242 NKern::ThreadLeaveCS(); |
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243 return r; |
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244 } |
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245 |
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246 TInt CreateAndMapSC(TInt aFunc, TInt aSize, TUint32 aAttributes, DChunk*& aChunk, TUint32& aPci, TLinAddr& aVirt, TPhysAddr& aPhysicalAddress) |
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247 { |
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248 TInt r = CreateSharedChunk(aSize, aAttributes, aChunk, aVirt, aPhysicalAddress); |
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249 TEST_KERRNONE(r); |
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250 TEST(aChunk); |
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251 TEST_KERRNONE(r); |
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252 r=Pci::CreateMapping(aFunc, aPhysicalAddress, aSize, aPci); |
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253 TEST_KERRNONE(r); |
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254 return r; |
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255 } |
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256 |
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257 void TestChunkAllocation(TInt func) |
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258 { |
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259 __KTRACE_OPT(KPCI, Kern::Printf("test allocating chunks")); |
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260 const TUint32 attributes= EMapAttrSupRw|EMapAttrFullyBlocking; |
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261 |
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262 //keep track of the chunks so i can delete them afterwards |
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263 RPointerArray<DPlatChunkHw> chunkList(12); |
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264 |
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265 TEST_KERRNONE(CreatePciChunkAppend(func, 0x1000, attributes, chunkList)); |
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266 TEST_KERRNONE(CreatePciChunkAppend(func, 0x4000, attributes, chunkList)); |
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267 TEST_KERRNONE(CreatePciChunkAppend(func, 0x1000, attributes, chunkList)); |
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268 TEST_KERRNONE(CreatePciChunkAppend(func, 0x2000, attributes, chunkList)); |
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269 TEST_KERRNONE(CreatePciChunkAppend(func, 0x8000, attributes, chunkList)); |
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270 TEST_KERRNONE(CreatePciChunkAppend(func, 0x10000, attributes, chunkList)); |
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271 |
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272 TEST_KERRNONE(CreatePciChunkAppend(func, 0x8000, attributes, chunkList)); |
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273 TEST_KERRNONE(CreatePciChunkAppend(func, 0x1000, attributes, chunkList)); |
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274 TEST_KERRNONE(CreatePciChunkAppend(func, 0x4000, attributes, chunkList)); |
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275 TEST_KERRNONE(CreatePciChunkAppend(func, 0x1000, attributes, chunkList)); |
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276 TEST_KERRNONE(CreatePciChunkAppend(func, 0x2000, attributes, chunkList)); |
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277 TEST_KERRNONE(CreatePciChunkAppend(func, 0x80000, attributes, chunkList)); |
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278 |
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279 //try to allocate more chunks than there are BARS |
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280 TEST(CreatePciChunkAppend(func, 0x1000, attributes, chunkList)==KErrNotFound); |
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281 //try to allocate chunk with size less than 1 |
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282 TEST(CreatePciChunkAppend(func, 0x0, attributes, chunkList)==KErrArgument); |
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283 |
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284 __KTRACE_OPT(KPCI, Kern::Printf("Delete all chunks")); |
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285 const TInt count=chunkList.Count(); |
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286 for(TInt i=0; i<count; ++i) |
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287 { |
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288 TEST_KERRNONE(Pci::RemoveChunk(func, chunkList[i])); |
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289 } |
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290 chunkList.Close(); |
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291 } |
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292 |
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293 void TestPciMemoryAccess(TLinAddr aVirt, TUint32 aPciAddress, TUint aSize, TUint32 aAttributes) |
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294 { |
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295 __KTRACE_OPT(KPCI, Kern::Printf("\nTest accessing memory via PCI: attrs=0x%08x\n", aAttributes)); |
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296 |
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297 TEST(aPciAddress<=(0x2000-aSize)); //we need to fit within the first 8k of pci space or we'll be beyond the access window |
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298 |
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299 __KTRACE_OPT(KPCI, Kern::Printf("write chunk from software")); |
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300 TUint8* const vByte=(TUint8*)aVirt; |
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301 memset(vByte, 0x5A, aSize); |
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302 |
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303 __KTRACE_OPT(KPCI, Kern::Printf("confirm values")); |
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304 for(TUint i=0; i<aSize; ++i) |
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305 { |
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306 const TUint8 result=vByte[i]; |
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307 TEST(result==0x5A); |
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308 } |
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309 |
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310 __KTRACE_OPT(KPCI, Kern::Printf("read back chunk via PCI")); |
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311 //A standard DMA write would read from memory and *write* to peripheral |
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312 //in this case the PCI is doing a DMA read from memory. |
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313 Cache::SyncMemoryBeforeDmaWrite(aVirt, aSize, aAttributes); |
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314 TUint8* const pByte = (TUint8*)(KHwUsbHWindow+aPciAddress); |
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315 TEST(memcompare(vByte, aSize, pByte, aSize)==0); |
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316 |
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317 //A standard DMA read would *read* from peripheral and write to memory. |
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318 Cache::SyncMemoryBeforeDmaRead(aVirt, aSize, aAttributes); |
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319 __KTRACE_OPT(KPCI, Kern::Printf("write chunk via PCI")); |
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320 memset(pByte,0xA5,aSize); |
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321 |
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322 __KTRACE_OPT(KPCI, Kern::Printf("read back chunk via PCI")); |
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323 for(TUint i=0; i<aSize; ++i) |
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324 { |
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325 const TUint8 result=pByte[i]; |
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326 TEST(result==0xA5); |
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327 } |
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328 Cache::SyncMemoryAfterDmaRead(aVirt, aSize); |
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329 __KTRACE_OPT(KPCI, Kern::Printf("read back chunk from software")); |
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330 TEST(memcompare(vByte, aSize, pByte, aSize)==0); |
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331 } |
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332 |
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333 void TestAddressConversion(TInt aFunc, TUint32 aPciAddr, TUint32 aPhysAddr, TInt32 aSize) |
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334 { |
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335 //round up size of region to what its equivilent pci region would be |
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336 if(aSize<KMinOutboundWindow) |
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337 aSize=KMinOutboundWindow; |
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338 else |
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339 aSize=Clp2(aSize); //round up to next Power of 2. |
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340 |
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341 |
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342 __KTRACE_OPT(KPCI, Kern::Printf("testing Pci<-->Phys address conversions: func %d, pci 0x%08x, physical 0x%08x, size 0x%08x ", aFunc, aPciAddr, aPhysAddr, aSize)); |
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343 for(TInt offset=-1; offset<=aSize; ++offset) |
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344 { |
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345 const TUint32 expectedPci=aPciAddr+TInt(offset); |
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346 TUint32 address=aPhysAddr+TInt(offset); |
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347 TInt r=Pci::GetPciAddress(aFunc,address); |
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348 //__KTRACE_OPT(KPCI, Kern::Printf("GetPciAddress: offset=0x%08x, r=%d, physical=0x%08x, pci=0x%08x,expectedPci=0x%08x", |
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349 // offset, r, aPhysAddr+offset, address, expectedPci)); |
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350 if(offset==-1||offset==aSize) |
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351 { |
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352 TEST(r==KErrNotFound); //test going beyond either side of the memory region |
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353 } |
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354 else |
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355 { |
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356 TEST_KERRNONE(r); |
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357 TEST(address==expectedPci); |
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358 } |
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359 |
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360 const TUint32 expectedPhys=aPhysAddr+offset; |
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361 address=aPciAddr+offset; |
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362 r=Pci::GetPhysicalAddress(aFunc, address); |
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363 //__KTRACE_OPT(KPCI, Kern::Printf("GetPhysicalAddress: offset=0x%08x, r=%d, pci=0x%08x, physical=0x%08x, expectedPhysical=0x%08x", |
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364 // offset, r, aPciAddr+offset, address, expectedPhys)); |
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365 if(offset==-1||offset==aSize) |
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366 { |
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367 TEST(r==KErrNotFound); |
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368 } |
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369 else |
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370 { |
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371 TEST_KERRNONE(r); |
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372 TEST(address==expectedPhys); |
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373 } |
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374 } |
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375 } |
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376 |
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377 void TestPciChunkAccesses(TInt aFunc) |
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378 { |
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379 const TInt sizes[] = {0x1, 0x400, 0x800}; |
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380 const TUint32 attrs[] = {EMapAttrSupRw|EMapAttrFullyBlocking, EMapAttrSupRw|EMapAttrCachedMax}; |
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381 |
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382 __KTRACE_OPT(KPCI, Kern::Printf("Testing PCI chunk access")); |
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383 for(TInt i=0; i<3; ++i) |
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384 { |
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385 for(TInt j=0; j<2; ++j) |
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386 { |
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387 __KTRACE_OPT(KPCI, Kern::Printf("\nSize=0x%08x, attrs=0x%08x", sizes[i], attrs[j])); |
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388 TLinAddr virt=NULL; |
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389 TUint32 pci=NULL; |
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390 DPlatChunkHw* chunk=NULL; |
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391 TInt size=sizes[i];//size may be altered by CreatePciChunk if it is rounded |
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392 TInt r = CreatePciChunk(aFunc, size, attrs[j], chunk, pci, virt); |
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393 TEST_KERRNONE(r); |
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394 TestPciMemoryAccess(virt, pci, size, attrs[j]); |
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395 TestAddressConversion(aFunc, pci, chunk->PhysicalAddress(), sizes[i]); |
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396 |
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397 r = Pci::RemoveChunk(aFunc, chunk); |
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398 TEST_KERRNONE(r); |
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399 |
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400 } |
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401 } |
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402 } |
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403 |
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404 void TestWindowAccesses(TInt aFunc) |
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405 { |
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406 const TInt sizes[] = {0x1, 0x400, 0x800}; |
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407 const TUint32 attrs[] = {EMapAttrSupRw|EMapAttrFullyBlocking, EMapAttrSupRw|EMapAttrCachedMax}; |
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408 |
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409 __KTRACE_OPT(KPCI, Kern::Printf("Testing PCI access to externally allocated shared chunks")); |
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410 for(TInt i=0; i<3; ++i) |
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411 { |
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412 for(TInt j=0; j<2; ++j) |
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413 { |
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414 __KTRACE_OPT(KPCI, Kern::Printf("\nSize=0x%08x, attrs=0x%08x", sizes[i], attrs[j])); |
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415 TLinAddr virt=NULL; |
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416 TUint32 pci=NULL; |
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417 TPhysAddr phys=NULL; |
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418 DChunk* chunk=NULL; |
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419 TInt r = CreateAndMapSC(aFunc, sizes[i], attrs[j], chunk, pci, virt, phys); |
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420 TEST_KERRNONE(r); |
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421 TestPciMemoryAccess(virt, pci, sizes[i], attrs[j]); |
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422 TestAddressConversion(aFunc, pci, phys, sizes[i]); |
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423 |
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424 r = UnmapAndCloseSC(aFunc, chunk, phys); |
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425 TEST_KERRNONE(r); |
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426 |
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427 } |
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428 } |
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429 |
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430 |
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431 } |
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432 |
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433 DECLARE_STANDARD_EXTENSION() |
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434 { |
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435 TInt r=KErrNone; |
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436 __KTRACE_OPT(KEXTENSION,Kern::Printf("Starting PCI test extension")); |
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437 |
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438 RArray<TInt> indicies; |
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439 TEST(Pci::Probe(indicies, KNecVendorId, KInternalPciBridgeId) == KErrNotFound); |
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440 TEST(Pci::Probe(indicies, KNecVendorId, KExternalPciBridgeId) == KErrNotFound); |
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441 |
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442 TEST(Pci::Probe(indicies,0x1033, 0x35) == KErrNone); |
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443 TEST(indicies.Count()==1); //only expecting one match |
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444 const TInt ohciFunc=indicies[0]; |
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445 indicies.Close(); |
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446 |
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447 TAddrSpace& cs = *Pci::GetConfigSpace(ohciFunc); |
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448 TAddrSpace& ms = *Pci::GetMemorySpace(ohciFunc); |
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449 |
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450 TestMemoryAccess(ms); |
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451 TestConfigAccess(cs); |
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452 TestAllocator(); |
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453 TestChunkAllocation(ohciFunc); |
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454 TestPciChunkAccesses(ohciFunc); |
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455 TestWindowAccesses(ohciFunc); |
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456 |
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457 __KTRACE_OPT(KPCI, Kern::Printf("DNaviEnginePci: Dumping OHCI config space")); |
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458 TUint size=cs.Size(); |
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459 for(TUint i=0; i<size; i+=4) |
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460 { |
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461 __KTRACE_OPT(KPCI, Kern::Printf("%08x %02xH", cs.Read32(i), i)); |
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462 } |
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463 |
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464 __KTRACE_OPT(KPCI, Kern::Printf("DNaviEnginePci: Dumping OHCI memory space")); |
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465 size=ms.Size(); |
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466 for(TUint i=0; i<size; i+=4) |
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467 { |
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468 __KTRACE_OPT(KPCI, Kern::Printf("%08x %02xH", ms.Read32(i), i)); |
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469 } |
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470 |
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471 //this will cause a master abort if it touches any unallocated PCI memory, which is likely. |
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472 #ifdef CAUSE_ERROR |
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473 __KTRACE_OPT(KPCI, Kern::Printf("Dump all of PCI space")); |
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474 TUint32* pciSpace=(TUint32*)KHwUsbHWindow; |
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475 for(TInt i=0; i<0x2000; ++i) |
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476 { |
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477 __KTRACE_OPT(KPCI, Kern::Printf("%08x %02xH", pciSpace[i], i)); |
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478 } |
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479 #endif |
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480 Kern::Printf("Dump PCI bridge registers"); |
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481 for(TInt i=0; i<0x100; i+=4) |
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482 { |
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483 __KTRACE_OPT(KPCI, Kern::Printf("%08x %02xH", reinterpret_cast<TUint32*>(KHwPciBridgeUsb)[i], i)); |
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484 } |
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485 return r; |
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486 } |
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487 |