|
1 /* |
|
2 * Copyright (c) 2008-2009 Nokia Corporation and/or its subsidiary(-ies). |
|
3 * All rights reserved. |
|
4 * This component and the accompanying materials are made available |
|
5 * under the terms of "Eclipse Public License v1.0" |
|
6 * which accompanies this distribution, and is available |
|
7 * at the URL "http://www.eclipse.org/legal/epl-v10.html". |
|
8 * |
|
9 * Initial Contributors: |
|
10 * Nokia Corporation - initial contribution. |
|
11 * |
|
12 * Contributors: |
|
13 * |
|
14 * Description: |
|
15 * This file is part of the NE1_TB Variant Base Port |
|
16 * Hardware Configuration Respoitory compiled repository in-line cpp. |
|
17 * |
|
18 */ |
|
19 |
|
20 |
|
21 /** |
|
22 @file hcr_psl_config_mha.inl |
|
23 File provides setting definitions for the MHA setting values applicable to the |
|
24 NEC NaviEngine base port. These definitions also contain the setting value where |
|
25 the setting value is no larger than a 32-bit integer. The values for |
|
26 larger settings can be found in the peer file hcr_psl_config_mha_lsd.inl. |
|
27 |
|
28 @internalTechnology |
|
29 */ |
|
30 |
|
31 |
|
32 #ifndef HCR_PSL_CONFIG_MHA_INL |
|
33 #define HCR_PSL_CONFIG_MHA_INL |
|
34 |
|
35 |
|
36 // SSettingC gSettingsList[] = |
|
37 // { |
|
38 // |
|
39 |
|
40 |
|
41 /** |
|
42 HCR Settings identifing the assignment of Interrrupt lines. |
|
43 |
|
44 These element keys are used along with the KHcrCat_MHA_Interrupt category UID |
|
45 to identify and read the HCR setting. |
|
46 */ |
|
47 { { { KHcrCat_MHA_Interrupt, KHcrKey_Interrupt_ExBus}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(32)}}}, |
|
48 |
|
49 { { { KHcrCat_MHA_Interrupt, KHcrKey_Interrupt_I2C}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(33)}}}, |
|
50 |
|
51 { { { KHcrCat_MHA_Interrupt, KHcrKey_Interrupt_CSI0}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(KIntCsi0)}}}, |
|
52 { { { KHcrCat_MHA_Interrupt, KHcrKey_Interrupt_CSI1}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(KIntCsi1)}}}, |
|
53 |
|
54 { { { KHcrCat_MHA_Interrupt, KHcrKey_Interrupt_Timer0}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(KIntIdOstMatchMsTimer)}}}, |
|
55 { { { KHcrCat_MHA_Interrupt, KHcrKey_Interrupt_Timer1}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(KIntId1stMatchMsTimer)}}}, |
|
56 { { { KHcrCat_MHA_Interrupt, KHcrKey_Interrupt_Timer2}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(KIntId2stMatchMsTimer)}}}, |
|
57 { { { KHcrCat_MHA_Interrupt, KHcrKey_Interrupt_Timer3}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(KIntId3stMatchMsTimer)}}}, |
|
58 { { { KHcrCat_MHA_Interrupt, KHcrKey_Interrupt_Timer4}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(KIntId4stMatchMsTimer)}}}, |
|
59 { { { KHcrCat_MHA_Interrupt, KHcrKey_Interrupt_Timer5}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(KIntId5stMatchMsTimer)}}}, |
|
60 |
|
61 { { { KHcrCat_MHA_Interrupt, KHcrKey_Interrupt_PWM}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(42)}}}, |
|
62 |
|
63 { { { KHcrCat_MHA_Interrupt, KHcrKey_Interrupt_SD0}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(EIntSd0)}}}, |
|
64 { { { KHcrCat_MHA_Interrupt, KHcrKey_Interrupt_SD1}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(EIntSd1)}}}, |
|
65 |
|
66 { { { KHcrCat_MHA_Interrupt, KHcrKey_Interrupt_CF}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(45)}}}, |
|
67 { { { KHcrCat_MHA_Interrupt, KHcrKey_Interrupt_NAND}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(EIntNandCtrl)}}}, |
|
68 { { { KHcrCat_MHA_Interrupt, KHcrKey_Interrupt_MIF}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(47)}}}, |
|
69 { { { KHcrCat_MHA_Interrupt, KHcrKey_Interrupt_DTV}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(48)}}}, |
|
70 { { { KHcrCat_MHA_Interrupt, KHcrKey_Interrupt_SGX}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(49)}}}, |
|
71 |
|
72 { { { KHcrCat_MHA_Interrupt, KHcrKey_Interrupt_DISP0}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(EIntDisp0)}}}, |
|
73 { { { KHcrCat_MHA_Interrupt, KHcrKey_Interrupt_DISP1}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(51)}}}, |
|
74 { { { KHcrCat_MHA_Interrupt, KHcrKey_Interrupt_DISP2}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(52)}}}, |
|
75 |
|
76 { { { KHcrCat_MHA_Interrupt, KHcrKey_Interrupt_Video}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(53)}}}, |
|
77 { { { KHcrCat_MHA_Interrupt, KHcrKey_Interrupt_SPDIF0}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(54)}}}, |
|
78 { { { KHcrCat_MHA_Interrupt, KHcrKey_Interrupt_SPDIF1}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(55)}}}, |
|
79 |
|
80 { { { KHcrCat_MHA_Interrupt, KHcrKey_Interrupt_I2S0}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(KIntI2S0)}}}, |
|
81 { { { KHcrCat_MHA_Interrupt, KHcrKey_Interrupt_I2S1}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(57)}}}, |
|
82 { { { KHcrCat_MHA_Interrupt, KHcrKey_Interrupt_I2S2}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(58)}}}, |
|
83 { { { KHcrCat_MHA_Interrupt, KHcrKey_Interrupt_I2S3}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(59)}}}, |
|
84 |
|
85 { { { KHcrCat_MHA_Interrupt, KHcrKey_Interrupt_APB}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(60)}}}, |
|
86 { { { KHcrCat_MHA_Interrupt, KHcrKey_Interrupt_AHB0}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(61)}}}, |
|
87 { { { KHcrCat_MHA_Interrupt, KHcrKey_Interrupt_AHB1}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(62)}}}, |
|
88 { { { KHcrCat_MHA_Interrupt, KHcrKey_Interrupt_AHB2}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(63)}}}, |
|
89 |
|
90 { { { KHcrCat_MHA_Interrupt, KHcrKey_Interrupt_AXI}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(64)}}}, |
|
91 |
|
92 { { { KHcrCat_MHA_Interrupt, KHcrKey_Interrupt_PCIint}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(EIntPciInt)}}}, |
|
93 { { { KHcrCat_MHA_Interrupt, KHcrKey_Interrupt_PCIserrb}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(EIntPciSErrB)}}}, |
|
94 { { { KHcrCat_MHA_Interrupt, KHcrKey_Interrupt_PCIperrb}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(EIntPciPErrB)}}}, |
|
95 { { { KHcrCat_MHA_Interrupt, KHcrKey_Interrupt_PCIExInt}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(68)}}}, |
|
96 { { { KHcrCat_MHA_Interrupt, KHcrKey_Interrupt_PCIExSerrb}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(69)}}}, |
|
97 { { { KHcrCat_MHA_Interrupt, KHcrKey_Interrupt_PCIExPerrb}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(70)}}}, |
|
98 |
|
99 { { { KHcrCat_MHA_Interrupt, KHcrKey_Interrupt_USBHintA}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(EIntUsbHIntA)}}}, |
|
100 { { { KHcrCat_MHA_Interrupt, KHcrKey_Interrupt_USBHintB}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(EIntUsbHIntB)}}}, |
|
101 { { { KHcrCat_MHA_Interrupt, KHcrKey_Interrupt_USBHsmi}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(EIntUsbHSmi)}}}, |
|
102 { { { KHcrCat_MHA_Interrupt, KHcrKey_Interrupt_USBHpme}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(EIntUsbHPme)}}}, |
|
103 |
|
104 { { { KHcrCat_MHA_Interrupt, KHcrKey_Interrupt_ATA6}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(75)}}}, |
|
105 |
|
106 { { { KHcrCat_MHA_Interrupt, KHcrKey_Interrupt_DMAC32_0end}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(KIntDMAC32_0_End)}}}, |
|
107 { { { KHcrCat_MHA_Interrupt, KHcrKey_Interrupt_DMAC32_0err}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(KIntDMAC32_0_End)}}}, |
|
108 { { { KHcrCat_MHA_Interrupt, KHcrKey_Interrupt_DMAC32_1end}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(KIntDMAC32_1_End)}}}, |
|
109 { { { KHcrCat_MHA_Interrupt, KHcrKey_Interrupt_DMAC32_1err}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(KIntDMAC32_1_Err)}}}, |
|
110 { { { KHcrCat_MHA_Interrupt, KHcrKey_Interrupt_DMAC32_2end}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(KIntDMAC32_2_End)}}}, |
|
111 { { { KHcrCat_MHA_Interrupt, KHcrKey_Interrupt_DMAC32_2err}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(KIntDMAC32_2_Err)}}}, |
|
112 { { { KHcrCat_MHA_Interrupt, KHcrKey_Interrupt_DMAC32_3end}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(KIntDMAC32_3_End)}}}, |
|
113 { { { KHcrCat_MHA_Interrupt, KHcrKey_Interrupt_DMAC32_3err}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(KIntDMAC32_3_Err)}}}, |
|
114 { { { KHcrCat_MHA_Interrupt, KHcrKey_Interrupt_DMAC32_4end}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(KIntDMAC32_4_End)}}}, |
|
115 { { { KHcrCat_MHA_Interrupt, KHcrKey_Interrupt_DMAC32_4err}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(KIntDMAC32_4_Err)}}}, |
|
116 |
|
117 { { { KHcrCat_MHA_Interrupt, KHcrKey_Interrupt_UART0}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(KIntIdUart0)}}}, |
|
118 { { { KHcrCat_MHA_Interrupt, KHcrKey_Interrupt_UART1}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(KIntIdUart1)}}}, |
|
119 { { { KHcrCat_MHA_Interrupt, KHcrKey_Interrupt_UART2}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(KIntIdUart2)}}}, |
|
120 { { { KHcrCat_MHA_Interrupt, KHcrKey_Interrupt_UART3}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(89)}}}, |
|
121 { { { KHcrCat_MHA_Interrupt, KHcrKey_Interrupt_UART4}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(90)}}}, |
|
122 { { { KHcrCat_MHA_Interrupt, KHcrKey_Interrupt_UART5}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(91)}}}, |
|
123 { { { KHcrCat_MHA_Interrupt, KHcrKey_Interrupt_UART6}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(92)}}}, |
|
124 { { { KHcrCat_MHA_Interrupt, KHcrKey_Interrupt_UART7}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(93)}}}, |
|
125 |
|
126 { { { KHcrCat_MHA_Interrupt, KHcrKey_Interrupt_GPIO}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(KIntIdGpio)}}}, |
|
127 { { { KHcrCat_MHA_Interrupt, KHcrKey_Interrupt_eWDT}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(KIntDMAC64_End)}}}, |
|
128 { { { KHcrCat_MHA_Interrupt, KHcrKey_Interrupt_SATA}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(KIntDMAC64_Err)}}}, |
|
129 |
|
130 { { { KHcrCat_MHA_Interrupt, KHcrKey_Interrupt_DMACaxi_End}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(97)}}}, |
|
131 { { { KHcrCat_MHA_Interrupt, KHcrKey_Interrupt_DMACaxi_Err}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(98)}}}, |
|
132 |
|
133 { { { KHcrCat_MHA_Interrupt, KHcrKey_Interrupt_PMUIRG0}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(100)}}}, |
|
134 { { { KHcrCat_MHA_Interrupt, KHcrKey_Interrupt_PMUIRG1}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(101)}}}, |
|
135 { { { KHcrCat_MHA_Interrupt, KHcrKey_Interrupt_PMUIRG2}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(102)}}}, |
|
136 { { { KHcrCat_MHA_Interrupt, KHcrKey_Interrupt_PMUIRG3}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(103)}}}, |
|
137 { { { KHcrCat_MHA_Interrupt, KHcrKey_Interrupt_PMUIRG4}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(104)}}}, |
|
138 { { { KHcrCat_MHA_Interrupt, KHcrKey_Interrupt_PMUIRG5}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(105)}}}, |
|
139 { { { KHcrCat_MHA_Interrupt, KHcrKey_Interrupt_PMUIRG6}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(106)}}}, |
|
140 { { { KHcrCat_MHA_Interrupt, KHcrKey_Interrupt_PMUIRG7}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(107)}}}, |
|
141 { { { KHcrCat_MHA_Interrupt, KHcrKey_Interrupt_PMUIRG8}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(108)}}}, |
|
142 { { { KHcrCat_MHA_Interrupt, KHcrKey_Interrupt_PMUIRG9}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(109)}}}, |
|
143 { { { KHcrCat_MHA_Interrupt, KHcrKey_Interrupt_PMUIRG10}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(110)}}}, |
|
144 { { { KHcrCat_MHA_Interrupt, KHcrKey_Interrupt_PMUIRG11}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(111)}}}, |
|
145 |
|
146 { { { KHcrCat_MHA_Interrupt, KHcrKey_Interrupt_COMMRX0}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(112)}}}, |
|
147 { { { KHcrCat_MHA_Interrupt, KHcrKey_Interrupt_COMMRX1}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(113)}}}, |
|
148 { { { KHcrCat_MHA_Interrupt, KHcrKey_Interrupt_COMMRX2}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(114)}}}, |
|
149 { { { KHcrCat_MHA_Interrupt, KHcrKey_Interrupt_COMMRX3}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(115)}}}, |
|
150 { { { KHcrCat_MHA_Interrupt, KHcrKey_Interrupt_COMMTX0}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(116)}}}, |
|
151 { { { KHcrCat_MHA_Interrupt, KHcrKey_Interrupt_COMMTX1}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(117)}}}, |
|
152 { { { KHcrCat_MHA_Interrupt, KHcrKey_Interrupt_COMMTX2}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(118)}}}, |
|
153 { { { KHcrCat_MHA_Interrupt, KHcrKey_Interrupt_COMMTX3}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(119)}}}, |
|
154 |
|
155 { { { KHcrCat_MHA_Interrupt, KHcrKey_Interrupt_PWRCTLO0}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(120)}}}, |
|
156 { { { KHcrCat_MHA_Interrupt, KHcrKey_Interrupt_PWRCTLO1}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(121)}}}, |
|
157 { { { KHcrCat_MHA_Interrupt, KHcrKey_Interrupt_PWRCTLO2}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(122)}}}, |
|
158 { { { KHcrCat_MHA_Interrupt, KHcrKey_Interrupt_PWRCTLO3}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(123)}}}, |
|
159 |
|
160 { { { KHcrCat_MHA_Interrupt, KHcrKey_Interrupt_DMACexbus_End}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(KIntDMAExBus_End)}}}, |
|
161 { { { KHcrCat_MHA_Interrupt, KHcrKey_Interrupt_DMACexbus_Err}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(KIntDMAExBus_Err)}}}, |
|
162 |
|
163 { { { KHcrCat_MHA_Interrupt, KHcrKey_Interrupt_AHBbridge3}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(126)}}}, |
|
164 |
|
165 |
|
166 /** |
|
167 HCR Settings identifing the GPIO pin assignments. |
|
168 |
|
169 These element keys are used along with the KHcrCat_MHA_GPIO category UID |
|
170 to identify and read the HCR setting. |
|
171 */ |
|
172 { { {KHcrCat_MHA_GPIO, KHcrKey_GpioPin_UART1_DSR}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(8)}}}, |
|
173 { { {KHcrCat_MHA_GPIO, KHcrKey_GpioPin_UART1_DTR}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(9)}}}, |
|
174 { { {KHcrCat_MHA_GPIO, KHcrKey_GpioPin_UART1_DCD}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(10)}}}, |
|
175 |
|
176 { { {KHcrCat_MHA_GPIO, KHcrKey_GpioPin_CKERST}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(11)}}}, |
|
177 |
|
178 { { {KHcrCat_MHA_GPIO, KHcrKey_GpioPin_CSI_CS42L51}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(12)}}}, |
|
179 { { {KHcrCat_MHA_GPIO, KHcrKey_GpioPin_CSIa}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(13)}}}, |
|
180 { { {KHcrCat_MHA_GPIO, KHcrKey_GpioPin_CSIb}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(14)}}}, |
|
181 { { {KHcrCat_MHA_GPIO, KHcrKey_GpioPin_CSIc}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(15)}}}, |
|
182 |
|
183 { { {KHcrCat_MHA_GPIO, KHcrKey_GpioPin_PCIa}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(18)}}}, |
|
184 { { {KHcrCat_MHA_GPIO, KHcrKey_GpioPin_PCIb}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(17)}}}, |
|
185 { { {KHcrCat_MHA_GPIO, KHcrKey_GpioPin_PCIc}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(16)}}}, |
|
186 |
|
187 { { {KHcrCat_MHA_GPIO, KHcrKey_GpioPin_RGB}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(20)}}}, |
|
188 |
|
189 { { {KHcrCat_MHA_GPIO, KHcrKey_GpioPin_eTRON}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(21)}}}, |
|
190 |
|
191 { { {KHcrCat_MHA_GPIO, KHcrKey_GpioPin_LCDl}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(22)}}}, |
|
192 |
|
193 { { {KHcrCat_MHA_GPIO, KHcrKey_GpioPin_RTC}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(23)}}}, |
|
194 |
|
195 { { {KHcrCat_MHA_GPIO, KHcrKey_GpioPin_LINT20}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(24)}}}, |
|
196 |
|
197 { { {KHcrCat_MHA_GPIO, KHcrKey_GpioPin_AUDIO_RESET}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(25)}}}, |
|
198 |
|
199 { { {KHcrCat_MHA_GPIO, KHcrKey_GpioPin_SWb0}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(27)}}}, |
|
200 { { {KHcrCat_MHA_GPIO, KHcrKey_GpioPin_SWb1}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(28)}}}, |
|
201 |
|
202 |
|
203 /** |
|
204 HCR Settings identifing the I2S Bus Channels. |
|
205 |
|
206 These element keys are used along with the KHcrCat_MHA_I2S category UID |
|
207 to identify and read the HCR setting. |
|
208 */ |
|
209 |
|
210 { { {KHcrCat_MHA_I2S, KHcrKey_I2S_CS42L51}, ETypeInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(0)}}}, |
|
211 { { {KHcrCat_MHA_I2S, KHcrKey_I2S_Reserved1}, ETypeUndefined, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(0xFFFFFFFF)}}}, |
|
212 { { {KHcrCat_MHA_I2S, KHcrKey_I2S_Reserved2}, ETypeUndefined, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(0xFFFFFFFF)}}}, |
|
213 { { {KHcrCat_MHA_I2S, KHcrKey_I2S_Reserved3}, ETypeUndefined, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(0xFFFFFFFF)}}}, |
|
214 |
|
215 |
|
216 /** |
|
217 HCR Settings identifing the I2C Bus IDs. |
|
218 |
|
219 These element keys are used along with the KHcrCat_MHA_I2C category UID |
|
220 to identify and read the HCR setting. |
|
221 */ |
|
222 |
|
223 { { {KHcrCat_MHA_I2C, KHcrKey_I2C_ReservedA}, ETypeUndefined, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(0xFFFFFFFF)}}}, |
|
224 { { {KHcrCat_MHA_I2C, KHcrKey_I2C_ReservedB}, ETypeUndefined, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(0xFFFFFFFF)}}}, |
|
225 |
|
226 |
|
227 /** |
|
228 HCR Settings identifing the SPI/CSI Bus Channels. |
|
229 |
|
230 These element keys are used along with the KHcrCat_MHA_SPI_CSI category UID |
|
231 to identify and read the HCR setting. |
|
232 */ |
|
233 { { {KHcrCat_MHA_SPICSI, KHcrKey_CSI_CS42L51}, ETypeUInt32, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(0x0010000C)}}}, |
|
234 { { {KHcrCat_MHA_SPICSI, KHcrKey_CSI_ReservedB}, ETypeUndefined, HCR_FLAGS_NONE, HCR_LEN_NA}, { {HCR_WVALUE(0xFFFFFFFF)}}} |
|
235 |
|
236 |
|
237 |
|
238 // |
|
239 // Last entry must not end in a ',' as it is present in the enclosing file. |
|
240 // }; |
|
241 |
|
242 |
|
243 #endif // HCR_PSL_CONFIG_MHA_INL |
|
244 |
|
245 |