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1 /* |
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2 * Copyright (c) 2008-2009 Nokia Corporation and/or its subsidiary(-ies). |
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3 * All rights reserved. |
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4 * This component and the accompanying materials are made available |
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5 * under the terms of "Eclipse Public License v1.0" |
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6 * which accompanies this distribution, and is available |
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7 * at the URL "http://www.eclipse.org/legal/epl-v10.html". |
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8 * |
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9 * Initial Contributors: |
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10 * Nokia Corporation - initial contribution. |
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11 * |
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12 * Contributors: |
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13 * |
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14 * Description: |
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15 * boardsupport/naviengine/navienginebsp/ne1_tb/rom/header.iby |
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16 * TO DO: (mandatory) |
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17 * This file provides the ROM header information for your variant |
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18 * |
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19 */ |
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20 |
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21 #define USE_CUSTOM_MMC_PARTITION |
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22 |
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23 #if defined(XABI_ARM4SMP) || defined(XABI_ARMV5SMP) || defined(XABI_ARMV6SMP) || defined(XABI_ARMV7SMP) |
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24 #define SMP |
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25 #endif |
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26 |
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27 #define VARIANT_PATH ../adapt/naviengine.nec/navienginebsp/ne1_tb |
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28 |
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29 #define HEAPMAX(x) |
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30 |
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31 // |
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32 // The Variant ID |
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33 // |
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34 #define VARID 0x09080001 |
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35 #define MAGIC 0x09080001 |
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36 #define ALL 0x09080001 |
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37 #define FIXED |
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38 |
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39 #ifdef WITH_DIRECT_MM |
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40 // Direct MM |
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41 |
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42 #define MEMMODEL_VARIANT S##VARIANT## |
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43 |
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44 kerneltrace 0x80000000 |
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45 |
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46 memmodel direct 0x1000 |
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47 |
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48 trace 0x10 |
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49 multikernel |
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50 |
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51 nowrapper |
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52 |
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53 version=0.01 |
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54 bootbinary=\Epoc32\Release\##KMAIN##\_sne1_tb_bootrom.bin |
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55 |
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56 #ifdef DEBUGPORT |
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57 debugport DEBUGPORT |
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58 #else |
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59 debugport 0 |
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60 #endif |
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61 |
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62 romsize=0x2000000 |
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63 romlinearbase=0x88000000 |
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64 romalign=0x1000 |
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65 |
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66 #ifdef SMP |
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67 kerneldataaddress=0x70014000 |
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68 #else |
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69 kerneldataaddress=0x70005000 |
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70 #endif |
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71 |
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72 #ifdef NKERN_ONLY_ROM |
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73 dataaddress=0xD0000000 // not used |
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74 kernelheapmin=0x00B00000 // must have max=min |
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75 kernelheapmax=0x00B00000 |
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76 #else |
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77 dataaddress=0x71000000 |
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78 kernelheapmin=0x100000 // must have max=min |
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79 kernelheapmax=0x100000 |
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80 #endif |
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81 |
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82 defaultstackreserve=0x200000 |
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83 romchecksum=0x12345678 |
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84 |
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85 //#define WITH_LFFS |
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86 //#define WITH_EXTENSION |
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87 //#define WITH_ROFS |
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88 //#define WITH_COMP |
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89 //#define NAVIENGINE_USE_VGA |
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90 |
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91 #undef __USB |
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92 #define USE_CUSTOM_MMC_PARTITION |
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93 |
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94 #ifdef UNICODE |
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95 unicode |
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96 #endif |
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97 |
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98 #else |
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99 // Flexible or Multiple MM |
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100 |
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101 #if (defined(CRAZYSCHEDDELAY) || defined(CRAZYSCHEDPRIO)) && defined(SMP) |
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102 #error The crazy scheduler cannot be used with SMP! |
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103 #endif |
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104 |
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105 #include <rom/include/kernel.hby> |
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106 #ifdef CRAZYSCHEDDELAY |
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107 kerneltrace 0x80000000 0 0x20 |
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108 #else |
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109 kerneltrace 0x80000000 |
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110 #endif |
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111 #ifdef CRAZYSCHEDPRIO |
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112 CRAZYSCHEDULING(on) |
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113 #endif |
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114 |
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115 #ifdef SMP |
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116 #if defined(SMPCOMPATMODE) && defined(SMPCOMPATCPU0) |
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117 #error "Can't have SMPCOMPATMODE and SMPCOMPATCPU0 at once!" |
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118 #endif |
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119 #ifdef SMPCOMPATMODE |
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120 SMPUNSAFECOMPAT(on) |
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121 #endif |
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122 #ifdef SMPCOMPATCPU0 |
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123 SMPUNSAFECPU0(on) |
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124 #endif |
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125 #ifdef SMPCRAZYINTS |
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126 CRAZYINTERRUPTS(on) |
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127 #endif |
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128 #ifndef SMPUNLOCKTHREADSCORE0 |
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129 SMPLOCKKERNELTHREADSCPU0(on) |
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130 #endif |
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131 #endif //SMP |
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132 |
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133 #ifdef WITH_FLEXIBLE_MM |
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134 memmodel flexible 0x100000 0x1000 -0x4000 |
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135 dlldatatop 0x7f000000 |
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136 #define MEMMODEL_VARIANT F##VARIANT## |
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137 bootbinary=\Epoc32\Release\##KMAIN##\_fne1_tb_bootrom.bin |
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138 #else |
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139 memmodel multiple 0x100000 |
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140 #define MEMMODEL_VARIANT VARIANT |
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141 bootbinary=\Epoc32\Release\##MAIN##\_ne1_tb_bootrom.bin |
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142 #endif |
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143 |
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144 trace 0x10 |
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145 collapse arm gcc 0 |
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146 multikernel |
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147 |
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148 nowrapper |
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149 |
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150 version=0.01 |
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151 |
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152 #ifdef DEBUGPORT |
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153 debugport DEBUGPORT |
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154 #else |
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155 debugport 0 |
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156 #endif |
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157 |
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158 #ifdef UBOOTLDR_ROM |
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159 |
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160 // for Bootloader remove components not required |
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161 #undef __USB |
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162 #define SYMBIAN_EXCLUDE_RUNTESTS |
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163 |
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164 #endif |
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165 |
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166 romsize=0x2000000 |
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167 romlinearbase=0x80000000 |
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168 romalign=0x10 |
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169 kerneldataaddress=0xC8000000 |
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170 kernelheapmin=0x1000 // calculated at boot time |
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171 kernelheapmax=0x00FFF000 |
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172 dataaddress=0x400000 |
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173 defaultstackreserve=0x200000 |
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174 romchecksum=0x12345678 |
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175 |
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176 //#define WITH_LFFS |
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177 //#define WITH_EXTENSION |
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178 //#define WITH_ROFS |
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179 //#define WITH_COMP |
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180 //#define NAVIENGINE_USE_VGA |
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181 |
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182 #ifdef UNICODE |
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183 unicode |
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184 #endif |
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185 |
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186 #if defined(_NAND2) || defined(_NANDTEST2) |
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187 // Pick up ROFS components |
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188 #define WITH_ROFS |
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189 #define LARGE_BLOCK |
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190 #define MULTIPLEROFS |
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191 #endif |
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192 |
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193 // Pick up the composite filesystem if NAND is required |
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194 #if defined(_NAND) || defined(_NAND2) || defined(_NANDTEST2) || defined(_NANDTEST) |
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195 #define WITH_COMP // Include ecomp.fsy |
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196 #endif |
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197 |
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198 #define CUSTOM_ESTART |
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199 |
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200 #ifndef INST_ARM4 |
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201 // Enable VFP |
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202 #define VFPHELPERS |
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203 #endif |
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204 |
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205 #endif |