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1 /* |
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2 * Copyright (c) 2008-2009 Nokia Corporation and/or its subsidiary(-ies). |
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3 * All rights reserved. |
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4 * This component and the accompanying materials are made available |
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5 * under the terms of "Eclipse Public License v1.0" |
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6 * which accompanies this distribution, and is available |
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7 * at the URL "http://www.eclipse.org/legal/epl-v10.html". |
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8 * |
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9 * Initial Contributors: |
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10 * Nokia Corporation - initial contribution. |
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11 * |
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12 * Contributors: |
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13 * |
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14 * Description: |
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15 * ne1_tb\specific\cs42l51.cpp |
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16 * |
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17 */ |
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18 |
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19 |
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20 |
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21 #include <kernel/kern_priv.h> |
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22 #include <naviengine.h> |
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23 #include <naviengine_priv.h> |
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24 #include <gpio.h> |
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25 #include "cs42l51.h" |
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26 |
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27 #define __THREAD_AND_CPU Kern::Printf("(Thread %T, CPU: %d)\n", NKern::CurrentThread(), NKern::CurrentCpu()) |
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28 //#define __KTRACE_SCODEC(s) s |
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29 #define __KTRACE_SCODEC(s) __KTRACE_OPT(KSOUND1, s) |
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30 |
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31 |
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32 #if _DEBUG |
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33 static const char KCodecPanicCat[] = "AUDIO CODEC, line:"; |
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34 #endif |
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35 |
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36 // other constants |
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37 const TUint KCodecCSIChannel = 0; |
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38 const TInt8 KBufGranularity = 8; // width of a transfer word in bits |
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39 |
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40 // CSI configuration parameters for the data transmission to the Codec. |
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41 const TConfigSpiV01 KCodecSpiV01Config = |
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42 { |
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43 ESpiWordWidth_8, //iWordWidth |
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44 260000, //iClkSpeed |
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45 ESpiPolarityHighFallingEdge, //iClkMode |
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46 40, // iTimeoutPeriod |
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47 EBigEndian, // iEndianness |
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48 EMsbFirst, // iBitOrder |
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49 0, // iTransactionWaitCycles |
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50 ESpiCSPinActiveLow //iCsPinActiveMode |
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51 }; |
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52 |
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53 // static members |
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54 RCS42AudioCodec* RCS42AudioCodec::iSelf = 0; |
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55 TInt RCS42AudioCodec::iRefCnt = 0; |
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56 |
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57 // default constructor |
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58 RCS42AudioCodec::RCS42AudioCodec() : |
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59 iHeaderBuff(KCodecSpiV01Config) |
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60 { |
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61 } |
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62 |
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63 TInt RCS42AudioCodec::Create() |
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64 { |
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65 __KTRACE_SCODEC(Kern::Printf("\n\nRCS42AudioCodec::Create()")); |
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66 if (!iSelf) |
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67 { |
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68 iSelf = new RCS42AudioCodec; |
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69 if(!iSelf) |
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70 { |
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71 return KErrNoMemory; |
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72 } |
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73 } |
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74 return KErrNone; |
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75 } |
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76 |
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77 // free resources when the driver is beeing closed. |
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78 void RCS42AudioCodec::Destroy() |
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79 { |
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80 __KTRACE_SCODEC(Kern::Printf("RCS42AudioCodec::Destroy()")); |
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81 __ASSERT_DEBUG(iSelf, Kern::Fault(KCodecPanicCat, __LINE__)); |
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82 |
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83 delete iSelf; |
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84 iSelf = 0; // static member |
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85 } |
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86 |
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87 // this static method is called from DNE1_TBSoundScPddChannel::PowerUp() |
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88 // to open an instance to the codec. If this is the first instance |
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89 // beeing opened - the codec is initialized. |
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90 TInt RCS42AudioCodec::Open(RCS42AudioCodec* &aSelf) |
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91 { |
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92 __KTRACE_SCODEC(Kern::Printf("RCS42AudioCodec::Open()")); |
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93 |
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94 TInt r = KErrNone; |
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95 if(!iSelf) |
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96 { |
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97 r = Create(); |
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98 if(r != KErrNone) |
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99 { |
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100 return r; |
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101 } |
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102 } |
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103 |
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104 if (iRefCnt == 0) |
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105 { |
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106 r = iSelf->Init(); |
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107 if (r != KErrNone) |
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108 { |
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109 iSelf->PowerDown(); |
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110 return r; |
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111 } |
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112 } |
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113 // increment the reference counter |
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114 ++iRefCnt; |
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115 |
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116 // copy object address back to the client |
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117 aSelf = iSelf; |
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118 |
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119 return KErrNone; |
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120 } |
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121 |
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122 // this static method is called from DNE1_TBSoundScPddChannel::PowerDown() |
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123 // to close the reference and power down the codec if the last reference is beeing closed. |
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124 void RCS42AudioCodec::Close(RCS42AudioCodec* &aSelf) |
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125 { |
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126 __KTRACE_SCODEC(Kern::Printf("RCS42AudioCodec::Close()")) ; |
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127 |
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128 if (!aSelf || aSelf != iSelf) |
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129 { |
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130 return; |
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131 } |
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132 |
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133 // decrement the reference counter |
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134 --iRefCnt; |
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135 |
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136 // if closing the last instance - power down the codec |
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137 if (iRefCnt == 0) |
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138 { |
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139 iSelf->PowerDown(); |
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140 aSelf = 0; |
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141 Destroy(); |
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142 } |
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143 } |
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144 |
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145 // this method powers down the codec |
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146 void RCS42AudioCodec::PowerDown() |
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147 { |
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148 if (iSelf) |
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149 { |
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150 iSelf->StartWrite(); |
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151 iSelf->Write(KHwCS42L51DACOutputControl, |
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152 KHtCS42L51DACOutputControl_DACAB_MUTE); |
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153 |
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154 // - set PDN bit |
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155 iSelf->Write(KHwCS42L51PwrCtrl, KHtCS42L51PwrCtrl_PDN); |
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156 |
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157 #ifdef _DEBUG |
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158 TInt r = iSelf->StopWrite(); |
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159 __ASSERT_DEBUG(r == KErrNone, Kern::Printf("Coulnd't power down the CODEC r=%d ", r)); |
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160 __ASSERT_DEBUG(r == KErrNone, Kern::Fault(KCodecPanicCat, __LINE__)); |
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161 #else |
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162 iSelf->StopWrite(); |
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163 #endif |
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164 |
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165 // put !reset back to low.. |
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166 GPIO::SetOutputState(KCodecResetPin, GPIO::ELow); |
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167 } |
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168 } |
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169 |
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170 |
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171 // this is an internal method - to synchronously write the data to the bus. It sets up the transfer |
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172 // and waits for Interrupt - which puts back the CS (Chip Select) pin - to low after the |
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173 // data was sent out of the bus. |
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174 TInt RCS42AudioCodec::DoWrite(TUint16 aRegAddr, TUint16 aData) |
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175 { |
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176 __KTRACE_SCODEC(Kern::Printf("RCS42AudioCodec::DoWrite()")); |
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177 TInt r = KErrNone; |
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178 |
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179 iTransBuff().iRegister = aRegAddr; |
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180 iTransBuff().iData = aData; |
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181 |
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182 // create a transfer object.. |
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183 TIicBusTransfer transfer(TIicBusTransfer::EMasterWrite, KBufGranularity, &iTransBuff); |
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184 |
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185 // Create transaction |
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186 TIicBusTransaction transaction(&iHeaderBuff, &transfer); |
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187 |
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188 // synchronously queue the write transaction |
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189 r = IicBus::QueueTransaction(iCsiBusConfig, &transaction); |
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190 return r; |
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191 } |
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192 |
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193 // to avoid multiple checking for each Write() call - if they are called in a row, |
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194 // precede each block of writes to be checked with StartWrite() which clears the iResult. |
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195 void RCS42AudioCodec::StartWrite() |
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196 { |
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197 #if _DEBUG |
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198 iStartWriteCalled = ETrue; |
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199 #endif |
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200 iResult = KErrNone; |
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201 } |
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202 |
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203 // After each block calls to Write() check the global status of them by calling this method. |
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204 TInt RCS42AudioCodec::StopWrite() |
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205 { |
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206 #if _DEBUG |
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207 iStartWriteCalled = EFalse; |
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208 #endif |
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209 return iResult; |
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210 } |
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211 |
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212 // this is an internal method - used to configure the codec. It can be called |
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213 // multiple times - whithout checkin for results. Precondition is - to call StartWrite() |
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214 // and the overall result of multiple calls to this method are gathered using StopWrite() |
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215 void RCS42AudioCodec::Write(TUint16 aRegAddr, TUint16 aData) |
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216 { |
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217 __ASSERT_DEBUG(iStartWriteCalled, Kern::Printf("block of multiple Write() calls should be preceded with StartWrite()")); |
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218 __ASSERT_DEBUG(iStartWriteCalled, Kern::Fault(KCodecPanicCat, __LINE__)); |
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219 |
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220 if (iResult != KErrNone) |
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221 { |
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222 return; // there was an error during one of previous write calls, just return |
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223 } |
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224 // if all calls proceeding StartWrite() were successful, continue to call the proper write |
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225 iResult = DoWrite(aRegAddr, aData); |
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226 } |
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227 |
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228 // This method is used to configure the CSI interface and then - the Codec. |
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229 TInt RCS42AudioCodec::Init() |
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230 { |
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231 __KTRACE_SCODEC(Kern::Printf("RCS42AudioCodec::Init()")); |
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232 TUint32 val; |
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233 |
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234 // First byte for the Cocec's write request on the CSI bus: (first seven bits-address, 8th-Write idication) |
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235 iTransBuff().iAddress = KCodecWriteCommand; |
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236 |
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237 // Enter the BusRealisation config specific to CSI |
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238 SET_BUS_TYPE(iCsiBusConfig,DIicBusChannel::ESpi); //Bus Type |
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239 SET_CHAN_NUM(iCsiBusConfig,(TUint8)KCodecCSIChannel); // SPI uses channel numbers 1,2 (CSI0 and CSI1) |
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240 SET_SLAVE_ADDR(iCsiBusConfig,KCodecCSPin); // Codec Pin Number |
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241 |
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242 // enable and configure pin 25 - it is connected to the chip's reset line |
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243 GPIO::SetPinMode(KCodecResetPin, GPIO::EEnabled); |
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244 GPIO::SetPinDirection(KCodecResetPin, GPIO::EOutput); |
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245 GPIO::SetDebounceTime(KCodecResetPin, 0); |
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246 |
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247 //==================================== |
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248 //configure the CODEC: |
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249 // put !reset line high to start the power-up sequence.. |
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250 GPIO::SetOutputState(KCodecResetPin, GPIO::EHigh); |
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251 |
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252 // start multiple Write() block here |
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253 StartWrite(); |
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254 |
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255 // Write are used here.. |
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256 // power-up sequence.. |
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257 Write(KHwCS42L51PwrCtrl, KHtCS42L51PwrCtrl_PDN); |
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258 Write(KHwCS42L51PwrCtrl, KHtCS42L51PwrCtrl_PDN_ALL); |
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259 |
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260 // freeze all registers.. until are set-up.. |
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261 Write(KHwCS42L51DACControl, KHtCS42L51DACControl_FREEZE); |
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262 |
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263 // Mic power control and speed control (0x03) |
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264 Write(KHwCS42L51MicPwrSpeed, KHtCS42L51MicPwrSpeed_AUTO |
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265 | KHtCS42L51MicPwrSpeed_MCLKDIV2); // auto, |
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266 |
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267 // interface control (0x04) // serial port settings.. |
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268 // I2s, Slave, SDOUT->SDIN internally connected.. Digimix->ON? |
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269 |
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270 // use I2S format, Slave |
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271 iInterfaceCtrlVal = KHCS42L51CtrlI2sUpto24bit << KHsCS42L51CtrlFormat; |
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272 |
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273 // Digital & Mic mix |
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274 iInterfaceCtrlVal |= KHtCS42L51Ctrl_DIGMIX | KHtCS42L51Ctrl_MICMIX; |
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275 Write(KHwCS42L51Ctrl, iInterfaceCtrlVal); |
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276 |
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277 // MIC Control - enable mic pre-amplifierboost (there is also ADC digital boost) |
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278 // which we can use in addition to this one - but it would- work fine whitout any. |
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279 val = KHtCS42L51MicCtrl_MICA_BOOST; |
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280 Write(KHwCS42L51MicCtrl, val); |
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281 |
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282 // ADCx Input Select, Invert & Mute |
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283 /* |
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284 PDN_PGAx AINx_MUX[1:0] Selected Path to ADC |
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285 0 00 AIN1x-->PGAx |
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286 0 01 AIN2x-->PGAx |
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287 0 10 AIN3x/MICINx-->PGAx |
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288 0 11 AIN3x/MICINx-->Pre-Amp(+16/+32 dB Gain)-->PGAx |
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289 1 00 AIN1x |
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290 1 01 AIN2x |
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291 1 10 AIN3x/MICINx |
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292 1 11 Reserved */ |
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293 |
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294 val = 3 << KHsCS42L51ADCInputMute_AINA_MUX; |
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295 val |= 3 << KHsCS42L51ADCInputMute_AINB_MUX; |
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296 Write(KHwCS42L51ADCInputMute, val); |
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297 |
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298 // DAC output select (0x08) |
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299 // HP_GAIN2 HP_GAIN1 HP_GAIN0 DAC_SNGVOL INV_PCMB INV_PCMA DACB_MUTE DACA_MUTE |
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300 Write(KHwCS42L51DACOutputControl, KHtCS42L51DACOutputControl_DAC_SNGVOL); |
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301 |
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302 // ALCX & PGAX ctrl, A(0x0A), B (0x0B) |
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303 Write(KHwCS42L51ALC_PGA_A_Control, 0); |
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304 Write(KHwCS42L51ALC_PGA_B_Control, 0); |
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305 |
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306 // ADCx Mixer Volume Ctrl A(0x0E), B (0x0F) |
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307 Write(KHwCS42L51ALC_ADC_A_MixVolume, KHbCS42L51ALC_Volume_Min); |
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308 Write(KHwCS42L51ALC_ADC_B_MixVolume, KHbCS42L51ALC_Volume_Min); |
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309 |
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310 // PCMx Volume Ctrl A(0x10), B (0x11) |
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311 Write(KHwCS42L51ALC_PCM_A_MixVolume, 0x18); |
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312 Write(KHwCS42L51ALC_PCM_B_MixVolume, 0x18); |
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313 |
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314 // Volume Control: AOUTA (Address 16h) & AOUTB (Address 17h) |
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315 Write(KHwCS42L51ALC_Out_A_Volume, KHbCS42L51ALC_Volume_Min); |
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316 Write(KHwCS42L51ALC_Out_B_Volume, KHbCS42L51ALC_Volume_Min); |
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317 |
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318 // DAC Control (Address 09h) |
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319 // 7 6 5 4 3 2 1 0 |
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320 // DATA_SEL1 DATA_SEL0 FREEZE Reserved DEEMPH AMUTE DAC_SZC1 DAC_SZC0 |
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321 // DATA_SEL1 DATA_SEL0: |
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322 // 00 - PCM Serial Port to DAC |
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323 // 01 - Signal Processing Engine to DAC |
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324 // 10 - ADC Serial Port to DAC (11 - Reserved) |
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325 Write(KHwCS42L51DACControl, 1<<KHsCS42L51DACControl_DATA_SEL); // also clearing freeze bit will update settings.. |
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326 |
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327 // let's rock!! - boost bass and treble a bit ;) |
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328 // values for nibbles change from 0: +12dB (maximum) boost, |
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329 // to 15:(minimum) -10.5dB boost. 8: 0dB - play 'as it is' |
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330 val = (5 << KHsCS42L51ALC_ToneCtrl_TREB) | (6 |
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331 << KHsCS42L51ALC_ToneCtrl_BASS); |
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332 Write(KHwCS42L51ALC_ToneCtrl, val); |
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333 |
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334 // power-up sequence.. - clear PDN ..after loading register settings.. |
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335 Write(KHwCS42L51PwrCtrl, 0); |
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336 |
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337 // This will return the error status, if any of Write() was not successful or KErrNone otherwise |
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338 return StopWrite(); |
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339 } |
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340 |
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341 // this method is called from the sound-driver thread context to set the requested playback volume |
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342 TInt RCS42AudioCodec::SetPlayVolume(TInt aVolume) |
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343 { |
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344 __KTRACE_SCODEC(Kern::Printf("RCS42AudioCodec::SetPlayVolume(%d)")); |
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345 // +12 db = 0001 1000 (24) |
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346 // 0db = 0000 0000 (0) |
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347 //-0.5db = 1111 1111 (255) |
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348 //-102db = 0001 1001 (25) |
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349 TUint8 volume = 0xff & (aVolume + KHbCS42L51ALC_Volume_Min); |
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350 |
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351 StartWrite(); |
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352 Write(KHwCS42L51ALC_Out_A_Volume, volume); |
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353 Write(KHwCS42L51ALC_Out_B_Volume, volume); |
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354 TInt r = StopWrite(); |
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355 |
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356 return r; |
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357 } |
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358 |
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359 // this method is called from the sound-driver thread context to set the requested record volume |
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360 TInt RCS42AudioCodec::SetRecordVolume(TInt aVolume) |
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361 { |
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362 __KTRACE_SCODEC(Kern::Printf("RCS42AudioCodec::SetRecordVolume(%d)")); |
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363 // +12 db = 0001 1000 (24) |
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364 // 0db = 0000 0000 (0) |
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365 //-0.5db = 1111 1111 (255) |
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366 //-102db = 0001 1001 (25) |
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367 TUint8 volume = 0xff & (aVolume + KHbCS42L51ALC_Volume_Min); |
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368 |
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369 StartWrite(); |
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370 Write(KHwCS42L51ALC_ADC_A_MixVolume, volume); |
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371 Write(KHwCS42L51ALC_ADC_B_MixVolume, volume); |
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372 TInt r = StopWrite(); |
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373 |
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374 return r; |
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375 } |