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1 /* |
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2 * Copyright (c) 2008-2010 Nokia Corporation and/or its subsidiary(-ies). |
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3 * All rights reserved. |
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4 * This component and the accompanying materials are made available |
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5 * under the terms of "Eclipse Public License v1.0" |
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6 * which accompanies this distribution, and is available |
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7 * at the URL "http://www.eclipse.org/legal/epl-v10.html". |
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8 * |
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9 * Initial Contributors: |
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10 * Nokia Corporation - initial contribution. |
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11 * |
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12 * Contributors: |
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13 * |
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14 * Description: |
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15 * ne1_tb\specific\variant.cpp |
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16 * |
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17 */ |
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18 |
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19 |
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20 |
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21 #include "variant.h" |
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22 #include "mconf.h" |
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23 #include <videodriver.h> |
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24 #include <xyin.h> |
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25 #include "ne1_tb_power.h" |
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26 #include <naviengine_lcd.h> |
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27 #include <d32ethernet.h> |
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28 |
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29 //These constants define Custom Restart Reasons in SuperPage::iHwStartupReason |
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30 const TUint KHtCustomRestartMax = 0xff; |
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31 const TUint KHtCustomRestartShift = 8; |
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32 const TUint KHtCustomRestartMask = KHtCustomRestartMax << KHtCustomRestartShift; |
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33 |
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34 const TUint KHtRestartStartupModesMax = 0xf; // Variable, platform dependant |
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35 //const TUint KHtRestartStartupModesShift = 16; // Variable, platform dependant |
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36 //const TUint KHtRestartStartupModesMask = KHtRestartStartupModesMax << KHtRestartStartupModesShift; |
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37 |
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38 void NE1_TBVariantFault(TInt aLine) |
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39 { |
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40 Kern::Fault("NE1_TBVariant",aLine); |
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41 } |
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42 |
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43 #define V_FAULT() NE1_TBVariantFault(__LINE__) |
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44 |
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45 // Debug output |
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46 #define XON 17 |
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47 #define XOFF 19 |
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48 #define DEBUG_XON_XOFF 0 // Non-zero if we want XON-XOFF handshaking |
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49 |
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50 GLDEF_D NE1_TBVariant TheVariant; |
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51 TUint32 Variant::iBaseAddress=0; |
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52 |
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53 TUint32 NE1_TBVariant::HandlerData[3]; |
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54 SInterruptHandler NE1_TBVariant::Handlers[ENumXInts]; |
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55 |
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56 extern void XIntDispatch(TAny*); |
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57 |
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58 #ifdef __SMP__ |
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59 |
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60 extern void PowerUpCpu(TInt aCpu, SPerCpuUncached* aU); |
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61 extern void PowerDownCpu(TInt aCpu, SPerCpuUncached* aU); |
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62 |
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63 extern "C" { |
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64 SVariantInterfaceBlock VIB; |
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65 |
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66 SVariantInterfaceBlock* InitVIB() |
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67 { |
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68 SVariantInterfaceBlock* v = &VIB; |
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69 v->iVer = 0; |
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70 v->iSize = sizeof(VIB); |
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71 v->iMaxCpuClock = UI64LIT(400000000); // 400MHz |
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72 v->iMaxTimerClock = 200000000u; // 200MHz = CPU CLK / 2 |
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73 v->iScuAddr = KHwBaseSCU; |
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74 v->iGicDistAddr = KHwBaseGlobalIntDist; |
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75 v->iGicCpuIfcAddr = KHwBaseIntIf; |
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76 v->iLocalTimerAddr = KHwBaseSCU + 0x600u; |
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77 v->iCpuPowerUpFn = &PowerUpCpu; |
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78 v->iCpuPowerDownFn = &PowerDownCpu; |
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79 return v; |
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80 } |
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81 } |
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82 |
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83 #endif |
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84 |
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85 extern "C" EXPORT_C TAny* VariantInitialise(TInt a) |
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86 { |
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87 switch(a) |
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88 { |
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89 case 0: return &TheVariant; |
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90 #ifdef __SMP__ |
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91 case 1: return InitVIB(); |
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92 #endif |
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93 default: return 0; |
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94 } |
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95 } |
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96 |
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97 NE1_TBVariant::NE1_TBVariant() |
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98 { |
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99 #ifdef __SMP__ |
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100 __VARIANT_SUPPORTS_NANOKERNEL_INTERFACE_BLOCK__(); |
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101 #endif |
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102 iDebugInitialised=EFalse; |
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103 } |
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104 |
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105 // |
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106 // TO DO: (optional) |
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107 // |
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108 // Specify the RAM zone configuration. |
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109 // |
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110 // The lowest addressed zone must have the highest preference as the bootstrap |
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111 // will always allocate from the lowest address up. Once the kernel has initialised |
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112 // then the zone preferences will decide from which RAM zone memory is allocated. |
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113 // |
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114 // const TUint KVariantRamZoneCount = ?; |
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115 // static const SRamZone KRamZoneConfig[KVariantRamZoneCount+1] = |
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116 // iBase iSize iID iPref iFlags |
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117 // { |
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118 // __SRAM_ZONE(0x????????, 0x???????, ?, ?, ?), |
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119 // ... |
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120 // __SRAM_ZONE(0x????????, 0x???????, ?, ?, ?), |
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121 // __SRAM_ZONE_END, // end of zone list |
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122 // }; |
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123 // |
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124 |
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125 TInt NE1_TBVariant::RamZoneCallback(TRamZoneOp aOp, TAny* aId, const TAny* aMasks) |
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126 { |
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127 // |
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128 // TO DO: (optional) |
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129 // |
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130 // Handle RAM zone operations requested by the kernel. |
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131 // |
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132 return TheVariant.DoRamZoneCallback(aOp, (TUint)aId, (const TUint*)aMasks); |
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133 } |
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134 |
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135 |
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136 TInt NE1_TBVariant::DoRamZoneCallback(TRamZoneOp aOp, TUint aId, const TUint* aMasks) |
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137 { |
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138 // |
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139 // TO DO: (optional) |
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140 // |
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141 // Handle RAM zone operations requested by the kernel. |
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142 // |
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143 // Three types of operation need to be supported: |
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144 // ERamZoneOp_Init: Update power state of the RAM zones after the |
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145 // kernel has initialised. |
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146 // ERamZoneOp_PowerUp: A RAM zone changing from used to empty. |
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147 // ERamZoneOp_PowerDown: A RAM zone changing from empty to used. |
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148 // |
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149 |
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150 switch (aOp) |
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151 { |
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152 case ERamZoneOp_Init: |
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153 break; |
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154 case ERamZoneOp_PowerUp: |
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155 break; |
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156 case ERamZoneOp_PowerDown: |
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157 break; |
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158 default: |
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159 return KErrNotSupported; |
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160 } |
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161 return KErrNone; |
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162 } |
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163 |
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164 |
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165 void NE1_TBVariant::Init1() |
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166 { |
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167 __KTRACE_OPT(KBOOT,Kern::Printf("NE1_TBVariant::Init1()")); |
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168 |
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169 // |
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170 // TO DO: (mandatory) |
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171 // |
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172 // Configure Memory controller and Memrory Bus parameters (in addition to what was done in the Bootstrap) |
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173 // |
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174 __KTRACE_OPT(KBOOT,Kern::Printf("Memory Configuration done")); |
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175 |
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176 // |
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177 // TO DO: (optional) |
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178 // |
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179 // Inform the kernel of the RAM zone configuration via Epoc::SetRamZoneConfig(). |
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180 // For devices that wish to reduce power consumption of the RAM IC(s) the callback functions |
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181 // RamZoneCallback() and DoRamZoneCallback() will need to be implemented and passed |
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182 // to Epoc::SetRamZoneConfig() as the parameter aCallback. |
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183 // The kernel will assume that all RAM ICs are fully intialised and ready for use from boot. |
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184 // |
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185 |
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186 // |
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187 // TO DO: (optional) |
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188 // |
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189 // Initialise other critical hardware functions such as I/O interfaces, etc, not done by Bootstrap |
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190 // |
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191 // if CPU is Sleep-capable, and requires some preparation to be put in that state (code provided in Bootstrap), |
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192 // the address of the idle code is writen at this location by the Bootstrap |
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193 // e.g. |
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194 // iIdleFunction=*(TLinAddr*)((TUint8*)&Kern::SuperPage()+0x1000); |
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195 // |
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196 NaviEngineAssp::Init1(); |
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197 |
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198 } |
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199 |
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200 #ifdef __SMP__ |
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201 void NE1_TBVariant::Init2AP() |
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202 { |
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203 __KTRACE_OPT(KBOOT,Kern::Printf("NE1_TBVariant::Init2AP()")); |
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204 } |
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205 #endif |
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206 |
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207 void NE1_TBVariant::Init3() |
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208 { |
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209 __KTRACE_OPT(KBOOT,Kern::Printf(">NE1_TBVariant::Init3()")); |
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210 |
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211 NaviEngineAssp::Init3(); |
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212 |
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213 Variant::Init3(); |
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214 // |
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215 // TO DO: (optional) |
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216 // |
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217 // Initialise other accessor classes, if required |
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218 // |
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219 |
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220 InitInterrupts(); |
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221 __KTRACE_OPT(KBOOT,Kern::Printf("<NE1_TBVariant::Init3()")); |
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222 } |
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223 |
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224 void Variant::Init3() |
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225 // |
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226 // Phase 3 initialisation |
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227 // |
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228 { |
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229 __KTRACE_OPT(KHARDWARE, Kern::Printf(">Variant::Init3")); |
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230 |
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231 // |
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232 // TO DO: (optional) |
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233 // |
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234 // Initialise any Variant class data members here, map in Variant and external hardware addresses |
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235 // |
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236 DPlatChunkHw* pC=NULL; |
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237 TInt r=DPlatChunkHw::New(pC,KHwVariantPhysBase,0x2000,EMapAttrSupRw|EMapAttrFullyBlocking); |
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238 __KTRACE_OPT(KHARDWARE, Kern::Printf("r=%d", r)); |
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239 __ASSERT_ALWAYS(r==KErrNone,V_FAULT()); |
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240 iBaseAddress=pC->LinearAddress(); |
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241 __KTRACE_OPT(KHARDWARE, Kern::Printf("iBaseAddress=%08x", iBaseAddress)); |
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242 __KTRACE_OPT(KHARDWARE, Kern::Printf("<Variant::Init3")); |
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243 } |
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244 |
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245 EXPORT_C TUint Variant::BaseLinAddress() |
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246 { |
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247 return((TUint)iBaseAddress); |
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248 } |
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249 |
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250 EXPORT_C void Variant::MarkDebugPortOff() |
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251 { |
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252 TheVariant.iDebugInitialised=EFalse; |
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253 } |
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254 |
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255 void NE1_TBVariant::Idle() |
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256 // |
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257 // The NULL thread idle loop |
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258 // |
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259 { |
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260 // Idle the CPU, suppressing the system tick if possible |
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261 |
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262 // |
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263 // TO DO: (optional) |
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264 // |
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265 // Idle Tick supression: |
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266 // 1- obtain the number of idle Ticks before the next NTimer expiration (NTimerQ::IdleTime()) |
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267 // 2- if the number of Ticks is large enough (criteria to be defined) reset the Hardware Timer |
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268 // to only interrupt again when the corresponding time has expired. |
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269 // 2.1- the calculation of the new value to program the Hardware Timer with should take in |
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270 // consideration the rounding value (NTimerQ::iRounding) |
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271 // 3- call the low level Sleep function (e'g. Bootstrap: address in iIdleFunction) |
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272 // 4- on coming back from Idle need to read the Hardware Timer and determine if woken up due to |
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273 // timer expiration (system time for new match<=current system time<system time for new match-tick period) |
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274 // or some other Interrupt. |
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275 // 4.1- if timer expiration, adjust System Time by adding the number of Ticks suppressed to NTimerQ::iMsCount |
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276 // 4.2- if other interrupt, calculate the number of Ticks skipped until woken up and adjust the System Time as |
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277 // above |
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278 // |
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279 // Support for different Sleep Modes: |
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280 // Often the Sleep mode a platform can go to depends on how many resources such as clocks/voltages can be |
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281 // turned Off or lowered to a suitable level. If different Sleep modes are supported this code may need |
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282 // to be able to find out what power resources are On or Off or used to what level. This could be achieved by |
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283 // enquiring the Resource Manager (see \ne1_tb\inc\ne1_tb_power.h). |
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284 // Then a decision could be made to what Sleep level we go to. |
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285 // |
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286 // Example calls: |
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287 // Obtain the number of Idle Ticks before the next NTimer expiration |
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288 // TInt aTicksLeft = NTimerQ::IdleTime(); |
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289 // ... |
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290 // Find out the deepest Sleep mode available for current resource usage and sleeping time |
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291 // NE1_TBResourceManager* aManager = TNE1_TBPowerController::ResourceManager(); |
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292 // NE1_TBResourceManager::TSleepModes aMode = aManager -> MapSleepMode(aTicksLeft*MsTickPeriod()); |
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293 // ... |
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294 // Find out the state of some particular resources |
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295 // TBool aResourceState = aManager -> GetResourceState(NE1_TBResourceManager::AsynchBinResourceUsedByZOnly); |
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296 // TUint aResourceLevel = aManager -> GetResourceLevel(NE1_TBResourceManager::SynchMlResourceUsedByXOnly); |
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297 // ... |
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298 |
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299 extern void __cpu_idle(); |
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300 |
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301 __cpu_idle(); |
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302 } |
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303 |
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304 TInt NE1_TBVariant::VariantHal(TInt aFunction, TAny* a1, TAny* a2) |
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305 { |
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306 TInt r=KErrNone; |
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307 switch(aFunction) |
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308 { |
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309 case EVariantHalCurrentNumberOfScreens: |
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310 { |
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311 TInt numScreens = 1; // Number of screens is fixed to 1 on the NaviEngine |
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312 kumemput(a1,&numScreens,sizeof(numScreens)); |
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313 break; |
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314 } |
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315 |
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316 case EVariantHalVariantInfo: |
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317 { |
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318 TVariantInfoV01Buf infoBuf; |
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319 TVariantInfoV01& info=infoBuf(); |
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320 info.iRomVersion=Epoc::RomHeader().iVersion; |
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321 info.iMachineUniqueId.iData[0] = 0x4956414E; |
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322 info.iMachineUniqueId.iData[1] = 0x474E4520; |
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323 info.iLedCapabilities = 0; |
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324 info.iProcessorClockInKHz = 400000; |
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325 |
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326 // ratio of 'speed' to 'speed' of a Psion Series 5 ... |
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327 // ... no I'm not joking! |
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328 info.iSpeedFactor = 20; |
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329 |
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330 Kern::InfoCopy(*(TDes8*)a1,infoBuf); |
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331 break; |
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332 } |
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333 case EVariantHalDebugPortSet: |
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334 { |
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335 // |
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336 // TO DO: (mandatory) |
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337 // |
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338 // Write the iDebugPort field of the SuperPage, as in the following EXAMPLE ONLY: |
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339 // |
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340 TUint32 thePort = (TUint32)a1; |
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341 switch(thePort) |
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342 { |
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343 case 0: // port 0 at 115200bps |
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344 case 0x100: // port 0 at 230400bps |
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345 case 1: // port 1 at 115200bps |
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346 case 0x101: // port 1 at 230400bps |
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347 case 2: // port 2 at 115200bps |
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348 case 3: // ??same as 0?? |
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349 TheVariant.iDebugInitialised=EFalse; |
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350 case (TUint32)KNullDebugPort: |
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351 Kern::SuperPage().iDebugPort = thePort; |
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352 break; |
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353 default: |
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354 r=KErrNotSupported; |
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355 } |
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356 break; |
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357 } |
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358 case EVariantHalDebugPortGet: |
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359 { |
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360 // |
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361 // TO DO: (mandatory) |
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362 // |
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363 // Obtain the Linear address of the Uart used for outputting Debug strings as in the following EXAMPLE ONLY: |
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364 // |
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365 |
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366 TUint32 thePort = TNaviEngine::DebugPortAddr(); |
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367 kumemput32(a1, &thePort, sizeof(TUint32)); |
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368 break; |
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369 } |
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370 case EVariantHalSwitches: |
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371 { |
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372 // |
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373 // TO DO: (optional) |
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374 // |
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375 // Read the state of any switches, as in the following EXAMPLE ONLY: |
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376 // |
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377 TUint32 x = Variant::Switches(); |
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378 kumemput32(a1, &x, sizeof(x)); |
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379 break; |
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380 } |
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381 case EVariantHalLedMaskSet: |
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382 { |
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383 // |
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384 // TO DO: (optional) |
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385 // |
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386 // Set the state of any on-board LEDs, e.g: |
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387 // TUint32 aLedMask=(TUint32)a1; |
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388 // Variant::ModifyLedState(~aLedMask,aLedMask); |
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389 // |
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390 break; |
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391 } |
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392 case EVariantHalLedMaskGet: |
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393 { |
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394 // |
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395 // TO DO: (optional) |
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396 // |
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397 // Read the state of any on-board LEDs, e.g: |
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398 // TUint32 x = Variant::LedState(); |
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399 // kumemput32(a1, &x, sizeof(x)); |
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400 // |
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401 break; |
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402 } |
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403 |
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404 case EVariantHalCustomRestartReason: |
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405 { |
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406 //Restart reason is stored in super page |
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407 TInt x = (Kern::SuperPage().iHwStartupReason & KHtCustomRestartMask) >> KHtCustomRestartShift ; |
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408 kumemput32(a1, &x, sizeof(TInt)); |
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409 break; |
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410 } |
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411 |
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412 case EVariantHalCustomRestart: |
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413 { |
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414 if(!Kern::CurrentThreadHasCapability(ECapabilityPowerMgmt,__PLATSEC_DIAGNOSTIC_STRING("Checked by Hal function EVariantHalCustomRestart"))) |
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415 return KErrPermissionDenied; |
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416 if ((TUint)a1 > KHtCustomRestartMax) |
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417 return KErrArgument; |
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418 Kern::Restart((TInt)a1 << KHtCustomRestartShift); |
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419 } |
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420 break; |
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421 |
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422 case EVariantHalCaseState: |
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423 { |
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424 // |
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425 // TO DO: (optional) |
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426 // |
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427 // Read the state of the case, e.g: |
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428 // TUint32 x = Variant::CaseState(); |
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429 // kumemput32(a1, &x, sizeof(x)); |
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430 // |
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431 break; |
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432 } |
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433 |
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434 case EVariantHalPersistStartupMode: |
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435 { |
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436 if (!Kern::CurrentThreadHasCapability(ECapabilityWriteDeviceData,__PLATSEC_DIAGNOSTIC_STRING("Checked by Hal function EDisplayHalSetBacklightOn"))) |
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437 return KErrPermissionDenied; |
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438 |
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439 if ((TUint)a1 > KHtRestartStartupModesMax ) // Restart startup mode max value |
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440 return KErrArgument; |
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441 // |
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442 // TO DO: (optional) |
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443 // |
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444 // Store the restart reason locally, |
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445 // which will eventually be picked up by |
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446 // the power controller, e.g: |
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447 // iCustomRestartReason = (TUint)a1; |
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448 break; |
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449 } |
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450 |
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451 |
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452 case EVariantHalGetPersistedStartupMode: |
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453 { |
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454 // |
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455 // TO DO: (optional) |
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456 // |
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457 // Read the restart startup mode, e.g: |
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458 // TInt startup = (Kern::SuperPage().iHwStartupReason & KHtRestartStartupModesMask) >> KHtRestartStartupModesShift; |
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459 // kumemput32(a1, &startup, sizeof(TInt)); |
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460 break; |
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461 } |
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462 |
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463 case EVariantHalGetMaximumCustomRestartReasons: |
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464 { |
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465 // |
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466 // TO DO: (optional) |
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467 // |
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468 // Read the maximum custom restart reason, e.g: |
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469 // kumemput32(a1, &KHtCustomRestartMax, sizeof(TUint)); |
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470 break; |
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471 } |
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472 |
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473 |
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474 case EVariantHalGetMaximumRestartStartupModes: |
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475 { |
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476 // |
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477 // TO DO: (optional) |
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478 // |
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479 // Read the maximum restart startup mode, e.g: |
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480 // kumemput32(a1, &KHtRestartStartupModesMax, sizeof(TUint)); |
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481 break; |
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482 } |
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483 |
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484 case EVariantHalSerialNumber: |
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485 { |
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486 TInt serialNumber = NE1_TBVariant::GetSerialNumber(); |
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487 kumemput(a1,&serialNumber,sizeof(serialNumber)); |
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488 break; |
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489 } |
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490 |
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491 case EVariantHalProfilingDefaultInterruptBase: |
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492 { |
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493 TInt interruptNumber = KIntCpuProfilingDefaultInterruptBase; |
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494 kumemput(a1,&interruptNumber,sizeof(interruptNumber)); |
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495 break; |
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496 } |
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497 |
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498 default: |
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499 r=KErrNotSupported; |
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500 break; |
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501 } |
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502 return r; |
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503 } |
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504 |
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505 TPtr8 NE1_TBVariant::MachineConfiguration() |
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506 { |
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507 return TPtr8((TUint8*)&Kern::MachineConfig(),sizeof(TActualMachineConfig),sizeof(TActualMachineConfig)); |
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508 } |
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509 |
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510 TInt NE1_TBVariant::VideoRamSize() |
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511 { |
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512 // |
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513 // Return the size of the area of RAM used to store the Video Buffer, as in the following EXAMPLE ONLY: |
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514 return FRAME_BUFFER_SIZE(32, 800, 480);//32 bits per pixel |
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515 } |
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516 |
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517 EXPORT_C void Variant::PowerReset() |
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518 { |
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519 // |
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520 // TO DO: (optional) |
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521 // |
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522 // Reset all power supplies |
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523 // |
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524 } |
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525 |
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526 EXPORT_C TUint Variant::Switches() |
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527 { |
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528 // |
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529 // TO DO: (optional) |
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530 // |
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531 // Read the state of on-board switches |
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532 // |
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533 return 0; // EXAMPLE ONLY |
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534 } |
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535 |
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536 /****************************************************************************** |
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537 * Interrupt handling/dispatch |
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538 ******************************************************************************/ |
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539 TInt NE1_TBVariant::InterruptBind(TInt anId, TIsr anIsr, TAny* aPtr) |
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540 { |
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541 TUint id=anId&0x7fffffff; // mask off second-level interrupt mask |
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542 if (id>=ENumXInts) |
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543 return KErrArgument; |
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544 TInt r=KErrNone; |
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545 SInterruptHandler& h=Handlers[id]; |
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546 TInt irq=NKern::DisableAllInterrupts(); |
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547 if (h.iIsr!=Spurious) |
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548 r=KErrInUse; |
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549 else |
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550 { |
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551 h.iIsr=anIsr; |
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552 h.iPtr=aPtr; |
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553 } |
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554 NKern::RestoreInterrupts(irq); |
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555 return r; |
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556 } |
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557 |
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558 TInt NE1_TBVariant::InterruptUnbind(TInt anId) |
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559 { |
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560 TUint id=anId&0x7fffffff; // mask off second-level interrupt mask |
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561 if (id>=ENumXInts) |
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562 return KErrArgument; |
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563 InterruptDisable(anId); |
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564 InterruptClear(anId); |
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565 TInt r=KErrNone; |
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566 SInterruptHandler& h=Handlers[id]; |
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567 TInt irq=NKern::DisableAllInterrupts(); |
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568 if (h.iIsr!=Spurious) |
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569 { |
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570 h.iIsr=Spurious; |
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571 h.iPtr=(TAny*)id; |
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572 } |
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573 NKern::RestoreInterrupts(irq); |
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574 return r; |
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575 } |
|
576 |
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577 TInt NE1_TBVariant::InterruptEnable(TInt anId) |
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578 { |
|
579 TUint id=anId&0x7fffffff; // mask off second-level interrupt mask |
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580 if (id>=ENumXInts) |
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581 return KErrArgument; |
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582 TInt r=KErrNone; |
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583 SInterruptHandler& h=Handlers[id]; |
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584 TInt irq=NKern::DisableAllInterrupts(); |
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585 if (h.iIsr==Spurious) |
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586 r=KErrNotReady; |
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587 else |
|
588 { |
|
589 // |
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590 // TO DO: (mandatory) |
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591 // |
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592 // Enable the hardware interrupt in the source, e.g. |
|
593 // Variant::EnableInt(anId); |
|
594 // |
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595 } |
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596 NKern::RestoreInterrupts(irq); |
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597 return r; |
|
598 } |
|
599 |
|
600 TInt NE1_TBVariant::InterruptDisable(TInt anId) |
|
601 { |
|
602 TUint id=anId&0x7fffffff; // mask off second-level interrupt mask |
|
603 if (id>=ENumXInts) |
|
604 return KErrArgument; |
|
605 // |
|
606 // TO DO: (mandatory) |
|
607 // |
|
608 // Disable the hardware interrupt in the source, e.g. |
|
609 // Variant::DisableInt(anId); |
|
610 // |
|
611 return KErrNone; |
|
612 } |
|
613 |
|
614 TInt NE1_TBVariant::InterruptClear(TInt anId) |
|
615 { |
|
616 TUint id=anId&0x7fffffff; |
|
617 if (id>=ENumXInts) |
|
618 return KErrArgument; |
|
619 // |
|
620 // TO DO: (mandatory) |
|
621 // |
|
622 // Clear the hardware interrupt in the source, e.g. |
|
623 // Variant::ClearInt(anId); |
|
624 // |
|
625 return KErrNone; |
|
626 } |
|
627 |
|
628 void NE1_TBVariant::InitInterrupts() |
|
629 { |
|
630 if (0) return; |
|
631 // Set up the variant interrupt dispatcher |
|
632 |
|
633 // all interrupts initially unbound |
|
634 TInt i; |
|
635 for (i=0; i<(TInt)ENumXInts; i++) |
|
636 { |
|
637 Handlers[i].iPtr=(TAny*)i; |
|
638 Handlers[i].iIsr=Spurious; |
|
639 } |
|
640 |
|
641 // Set up data for 2nd level interrupt dispatcher |
|
642 HandlerData[0]=Variant::BaseLinAddress(); // Linear Base address of 2nd level Int Controller |
|
643 HandlerData[1]=(TUint32)&Handlers[0]; // Pointer to handler array |
|
644 HandlerData[2]=0; // |
|
645 |
|
646 // |
|
647 // TO DO: (mandatory) (NOT MANDATORY - DOESN'T EXIST ON NAVIENGINE) |
|
648 // |
|
649 // set up ASSP expansion interrupt to generate interrupts whenever a 2nd level interrupt occurrs |
|
650 // |
|
651 |
|
652 // bind NE1_TBVariant ASSP expansion interrupt input to our interrupt dispatcher |
|
653 // TInt r=Interrupt::Bind(KIntIdExpansion, XIntDispatch, HandlerData); |
|
654 // __ASSERT_ALWAYS(r>=0,V_FAULT()); |
|
655 // Interrupt::Enable(KIntIdExpansion); // enable expansion interrupt |
|
656 } |
|
657 |
|
658 void NE1_TBVariant::Spurious(TAny* aId) |
|
659 { |
|
660 TUint32 id=((TUint32)aId)|0x80000000u; |
|
661 Kern::Fault("SpuriousInt",id); |
|
662 } |
|
663 |
|
664 |
|
665 // USB Client controller |
|
666 |
|
667 TBool NE1_TBVariant::UsbClientConnectorDetectable() |
|
668 { |
|
669 __KTRACE_OPT(KHARDWARE, Kern::Printf("NE1_TBVariant::UsbClientConnectorDetectable")); |
|
670 |
|
671 // TO DO: The return value should reflect the actual situation. |
|
672 return ETrue; |
|
673 } |
|
674 |
|
675 |
|
676 TBool NE1_TBVariant::UsbClientConnectorInserted() |
|
677 { |
|
678 __KTRACE_OPT(KHARDWARE, Kern::Printf("NE1_TBVariant::UsbClientConnectorInserted")); |
|
679 |
|
680 // TO DO: Query cable status here. The return value should reflect the actual current state. |
|
681 return ETrue; |
|
682 } |
|
683 |
|
684 |
|
685 TInt NE1_TBVariant::RegisterUsbClientConnectorCallback(TInt (*aCallback)(TAny*), TAny* aPtr) |
|
686 { |
|
687 __KTRACE_OPT(KHARDWARE, Kern::Printf("NE1_TBVariant::RegisterUsbClientConnectorCallback")); |
|
688 |
|
689 iUsbClientConnectorCallback = aCallback; |
|
690 iUsbClientConnectorCallbackArg = aPtr; |
|
691 |
|
692 // TO DO: Register and enable the interrupt(s) for detecting USB cable insertion/removal here. |
|
693 // (Register UsbClientConnectorIsr.) |
|
694 |
|
695 // TO DO: The return value should reflect the actual situation. |
|
696 return KErrNone; |
|
697 } |
|
698 |
|
699 |
|
700 void NE1_TBVariant::UnregisterUsbClientConnectorCallback() |
|
701 { |
|
702 __KTRACE_OPT(KHARDWARE, Kern::Printf("NE1_TBVariant::UnregisterUsbClientConnectorCallback")); |
|
703 |
|
704 // TO DO: Disable and unbind the interrupt(s) for detecting USB cable insertion/removal here. |
|
705 |
|
706 iUsbClientConnectorCallback = NULL; |
|
707 iUsbClientConnectorCallbackArg = NULL; |
|
708 } |
|
709 |
|
710 |
|
711 TBool NE1_TBVariant::UsbSoftwareConnectable() |
|
712 { |
|
713 __KTRACE_OPT(KHARDWARE, Kern::Printf("NE1_TBVariant::UsbSoftwareConnectable")); |
|
714 |
|
715 // TO DO: The return value should reflect the actual situation. |
|
716 return ETrue; |
|
717 } |
|
718 |
|
719 |
|
720 TInt NE1_TBVariant::UsbConnect() |
|
721 { |
|
722 __KTRACE_OPT(KHARDWARE, Kern::Printf("NE1_TBVariant::UsbConnect")); |
|
723 |
|
724 // TO DO: Do here whatever is necessary for the UDC to appear on the bus (and thus to the host). |
|
725 |
|
726 return KErrNone; |
|
727 } |
|
728 |
|
729 |
|
730 TInt NE1_TBVariant::UsbDisconnect() |
|
731 { |
|
732 __KTRACE_OPT(KHARDWARE, Kern::Printf("NE1_TBVariant::UsbDisconnect")); |
|
733 |
|
734 // TO DO: Do here whatever is necessary for the UDC to appear disconnected from the bus (and thus from the |
|
735 // host). |
|
736 |
|
737 return KErrNone; |
|
738 } |
|
739 |
|
740 |
|
741 void NE1_TBVariant::UsbClientConnectorIsr(TAny *aPtr) |
|
742 // |
|
743 // Services the USB cable interrupt. |
|
744 // |
|
745 { |
|
746 __KTRACE_OPT(KHARDWARE, Kern::Printf("NE1_TBVariant::UsbClientConnectorIsr()")); |
|
747 |
|
748 NE1_TBVariant* tm = static_cast<NE1_TBVariant*>(aPtr); |
|
749 |
|
750 // TO DO: Service interrupt here: determmine cause, clear condition flag (if applicable), etc. |
|
751 |
|
752 if (tm->UsbClientConnectorInserted()) |
|
753 { |
|
754 __KTRACE_OPT(KHARDWARE, Kern::Printf(" > USB cable now inserted.")); |
|
755 } |
|
756 else |
|
757 { |
|
758 __KTRACE_OPT(KHARDWARE, Kern::Printf(" > USB cable now removed.")); |
|
759 } |
|
760 |
|
761 // Important: Inform the USB stack. |
|
762 if (tm->iUsbClientConnectorCallback) |
|
763 { |
|
764 (*tm->iUsbClientConnectorCallback)(tm->iUsbClientConnectorCallbackArg); |
|
765 } |
|
766 } |
|
767 |
|
768 // Set the board serial number |
|
769 EXPORT_C TUint16 NE1_TBVariant::SetSerialNumber( TUint32 aSerialNum ) |
|
770 { |
|
771 TheVariant.iSerialNumber = aSerialNum; |
|
772 return KErrNone; |
|
773 } |
|
774 |
|
775 // Get the board serial number |
|
776 EXPORT_C TUint32 NE1_TBVariant::GetSerialNumber( ) |
|
777 { |
|
778 return TheVariant.iSerialNumber; |
|
779 } |
|
780 |
|
781 |
|
782 #ifdef __SMP__ |
|
783 |
|
784 void PowerUpCpu(TInt aCpu, SPerCpuUncached* aU) |
|
785 { |
|
786 __KTRACE_OPT(KHARDWARE,Kern::Printf("PowerUpCpu %d %08x", aCpu, aU)); |
|
787 aU->iPowerOnReq = 0xF000000Fu; // special value |
|
788 __e32_io_completion_barrier(); |
|
789 __holler(); |
|
790 } |
|
791 |
|
792 void PowerDownCpu(TInt aCpu, SPerCpuUncached* aU) |
|
793 { |
|
794 __KTRACE_OPT(KHARDWARE,Kern::Printf("PowerDownCpu %d %08x", aCpu, aU)); |
|
795 } |
|
796 |
|
797 #endif |
|
798 |
|
799 //---eof |