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1 /* |
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2 * Copyright (c) 2009 Nokia Corporation and/or its subsidiary(-ies). |
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3 * All rights reserved. |
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4 * This component and the accompanying materials are made available |
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5 * under the terms of "Eclipse Public License v1.0" |
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6 * which accompanies this distribution, and is available |
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7 * at the URL "http://www.eclipse.org/legal/epl-v10.html". |
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8 * |
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9 * Initial Contributors: |
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10 * Nokia Corporation - initial contribution. |
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11 * |
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12 * Contributors: |
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13 * |
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14 * Description: |
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15 * memory space. |
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16 * - RPciChunk which is derived from and RChunk and corresponds to |
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17 * a kernel-side DChunk, which in turn corresponds to a PCI chunk or |
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18 * buffer. The test driver uses these for all PCI chunk types (a |
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19 * "wrapper" DChunk is used to map the memory of a PCI DPlatHwChunk |
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20 * to user side). |
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21 * |
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22 */ |
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23 |
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24 |
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25 #include <e32std.h> |
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26 #define __E32TEST_EXTENSION__ |
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27 #include <e32test.h> |
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28 #include "t_pci.h" |
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29 #include <assp/naviengine/pci.h> |
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30 |
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31 class RPci; |
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32 /** |
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33 Extends RChunk to hold the PCI address |
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34 associated with a chunk. |
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35 */ |
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36 class RPciChunk: public RChunk |
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37 { |
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38 public: |
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39 TUint PciBase() |
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40 { |
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41 return iPciBaseAddr; |
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42 } |
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43 |
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44 /** |
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45 Return the PCI accessible size |
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46 */ |
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47 TInt Size() const |
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48 { |
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49 return iPciSize; |
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50 } |
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51 |
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52 private: |
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53 friend class RPci; |
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54 TUint iPciBaseAddr; |
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55 TInt iPciSize; //size of the region mapped into PCI |
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56 }; |
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57 |
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58 typedef TInt (RPci::*ChunkOpenFn)(RPciChunk&, TInt, TRequestStatus*); |
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59 |
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60 class RPci : public RBusLogicalChannel |
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61 { |
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62 public: |
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63 TInt Open(); |
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64 TInt GetTestInfo(TPciTestInfo& aTestInfo); |
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65 |
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66 TInt Open(const TPciDevice&); |
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67 |
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68 TUint AccessConfigSpace(const TUserConfigSpace& aCs); |
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69 TUint AccessMemorySpace(const TUserMemorySpace& aMs); |
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70 TInt OpenPciDChunk(RPciChunk& aPciChunk,TInt aPciChunkSize, TRequestStatus* aStatus=0); |
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71 TInt OpenPciPlatHwChunk(RPciChunk& aPciHwChunk,TInt aPciChunkSize, TRequestStatus* aStatus=0); |
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72 TInt OpenPciMappedChunk(RPciChunk& aPciMappedChunk,TInt aPciChunkSize, TRequestStatus* aStatus=0); |
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73 TInt OpenPciWindowChunk(RChunk& aPciWindowChunk); |
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74 TInt RunUnitTests(); |
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75 private: |
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76 TInt DoOpenPciChunk(RPciChunk& aPciChunk, TInt aPciChunkSize, TPciTestCmd aCmd, TRequestStatus* aStatus); |
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77 }; |
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78 |
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79 inline TInt RPci::Open() |
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80 { |
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81 return DoCreate(KPciLddFactory, TVersion(), KNullUnit, NULL, NULL); |
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82 } |
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83 |
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84 inline TInt RPci::Open(const TPciDevice& aDevice) |
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85 { |
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86 TPckgC<TPciDevice> devicePkg(aDevice); |
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87 return DoCreate(KPciLddFactory, TVersion(), KNullUnit, NULL, &devicePkg); |
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88 } |
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89 |
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90 inline TInt RPci::GetTestInfo(TPciTestInfo& aTestInfo) |
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91 { |
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92 TPckg<TPciTestInfo> info(aTestInfo); |
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93 return DoControl(EGetTestInfo, &info); |
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94 } |
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95 |
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96 inline TInt RPci::RunUnitTests() |
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97 { |
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98 return DoControl(ERunUnitTests); |
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99 } |
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100 |
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101 TUint RPci::AccessConfigSpace(const TUserConfigSpace& aCs) |
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102 { |
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103 TPckgC<TUserConfigSpace> pkg(aCs); |
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104 return DoControl(EAccessConfigSpace, &pkg); |
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105 } |
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106 |
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107 TUint RPci::AccessMemorySpace(const TUserMemorySpace& aMs) |
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108 { |
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109 TPckgC<TUserMemorySpace> pkg(aMs); |
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110 return DoControl(EAccessMemorySpace, &pkg); |
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111 } |
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112 |
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113 TInt RPci::OpenPciDChunk(RPciChunk& aPciChunk,TInt aPciChunkSize, TRequestStatus* aStatus) |
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114 { |
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115 return DoOpenPciChunk(aPciChunk, aPciChunkSize, EOpenPciDChunk, aStatus); |
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116 } |
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117 |
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118 TInt RPci::OpenPciPlatHwChunk(RPciChunk& aPciHwChunk,TInt aPciChunkSize, TRequestStatus* aStatus) |
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119 { |
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120 return DoOpenPciChunk(aPciHwChunk, aPciChunkSize, EOpenPciPlatHwChunk, aStatus); |
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121 } |
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122 |
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123 TInt RPci::OpenPciMappedChunk(RPciChunk& aPciMappedChunk,TInt aPciChunkSize, TRequestStatus* aStatus) |
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124 { |
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125 return DoOpenPciChunk(aPciMappedChunk, aPciChunkSize, EOpenPciMappedChunk, aStatus); |
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126 } |
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127 |
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128 TInt RPci::OpenPciWindowChunk(RChunk& aPciWindowChunk) |
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129 { |
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130 TUint chunkHandle = DoControl(EOpenPciWindowChunk); |
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131 return aPciWindowChunk.SetReturnedHandle(chunkHandle); |
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132 } |
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133 |
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134 TInt RPci::DoOpenPciChunk(RPciChunk& aPciChunk, TInt aPciChunkSize, TPciTestCmd aCmd, TRequestStatus* aStatus) |
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135 { |
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136 const TInt constPciChunkSize = aPciChunkSize; |
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137 TPciChunkCreateInfo info(constPciChunkSize, aPciChunk.iPciBaseAddr, aStatus); |
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138 TPckgC<TPciChunkCreateInfo> pkg(info); |
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139 |
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140 TUint chunkHandle = DoControl(aCmd, &pkg); |
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141 |
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142 const TInt r = aPciChunk.SetReturnedHandle(chunkHandle); |
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143 if(r == KErrNone) |
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144 { |
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145 aPciChunk.iPciSize = constPciChunkSize; |
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146 } |
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147 return r; |
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148 } |
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149 |
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150 TUserPciSpace::TUserPciSpace(RPci& aPci) |
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151 :iPci(&aPci) |
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152 {} |
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153 |
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154 TUserConfigSpace::TUserConfigSpace(RPci& aPci) |
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155 :TUserPciSpace(aPci) |
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156 {} |
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157 |
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158 TUint TUserConfigSpace::Call() |
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159 { |
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160 return iPci->AccessConfigSpace(*this); |
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161 } |
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162 |
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163 TUserPciSpace* TUserConfigSpace::Clone() const |
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164 { |
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165 return new TUserConfigSpace(*this); |
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166 } |
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167 |
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168 TUserMemorySpace::TUserMemorySpace(RPci& aPci, TInt aBarIndex) |
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169 :TUserPciSpace(aPci), iBarIndex(aBarIndex) |
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170 {} |
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171 |
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172 TUint TUserMemorySpace::Call() |
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173 { |
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174 return iPci->AccessMemorySpace(*this); |
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175 } |
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176 |
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177 TUserPciSpace* TUserMemorySpace::Clone() const |
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178 { |
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179 return new TUserMemorySpace(*this); |
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180 } |
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181 |
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182 /** |
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183 Test address allocator |
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184 */ |
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185 TInt TestRunPciUnitTest(RPci& pci) |
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186 { |
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187 return pci.RunUnitTests(); |
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188 } |
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189 |
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190 |
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191 /** |
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192 Read from a defined address in memory or config space, compare against expected values. |
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193 8,16, and 32 bit accesses performed. |
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194 |
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195 @param aSpace Object gving access to either the config or memory space of a PCI device |
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196 @param aInfo Contains the address and expected value of a dword |
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197 */ |
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198 void TestReadAddressSpace(TUserPciSpace& aSpace, const TPciTestInfo::TAddrSpaceTest& aInfo, RTest& test, TBool aVerbose=EFalse) |
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199 { |
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200 const TUint os = aInfo.iOffset; |
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201 //Iterate over different widths, and possible |
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202 //subfields of 32 bit word |
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203 for(TInt bitWidth=32; bitWidth>=8; bitWidth>>=1) |
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204 { |
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205 const TInt numberOfFields = (32/bitWidth); |
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206 for(TInt i=0; i< numberOfFields; i++) |
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207 { |
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208 const TInt extraByteOffset = i * (bitWidth >> 3); |
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209 const TInt byteOffset = os + extraByteOffset; |
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210 if(aVerbose) |
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211 test.Printf(_L("Access bitWidth=%d byte offset=%d\n"), bitWidth, byteOffset); |
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212 |
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213 const TUint expected = aInfo.Expected(bitWidth, byteOffset); |
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214 const TUint read = aSpace.Read(bitWidth, byteOffset); |
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215 if(aVerbose) |
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216 test.Printf(_L("expect 0x%08x, read 0x%08x\n"), expected, read); |
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217 test_Equal(expected, read); |
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218 } |
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219 } |
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220 } |
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221 |
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222 /** |
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223 Verify writes and modifications to a defined address in memory or config space. 8,16, and 32 bit |
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224 accesses performed. |
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225 |
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226 @param aSpace Object gving access to either the config or memory space of a PCI device |
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227 @param aInfo Contains the address of a (at least partially) writable dword |
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228 */ |
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229 void TestWriteAddressSpace(TUserPciSpace& aSpace, TPciTestInfo::TAddrSpaceTest& aInfo, RTest& test, TBool aVerbose=EFalse) |
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230 { |
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231 const TUint original = aSpace.Read(32, aInfo.iOffset); |
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232 const TUint os = aInfo.iOffset; |
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233 TUint mask = ~aInfo.iReadOnlyMask; |
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234 |
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235 //The pattern will be truncated when used with bit widths |
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236 //less than 32. |
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237 const TUint initPattern = 0xFFFFFFFF; |
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238 |
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239 for(TInt bitWidth=32; bitWidth>=8; bitWidth>>=1) |
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240 { |
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241 const TUint pattern = initPattern >> (32-bitWidth); |
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242 const TInt numberOfFields = (32/bitWidth); |
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243 for(TInt i=0; i< numberOfFields; i++) |
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244 { |
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245 const TInt extraByteOffset = i * (bitWidth >> 3); |
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246 const TInt byteOffset = os + extraByteOffset; |
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247 if(aVerbose) |
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248 test.Printf(_L("Access bitWidth=%d byte offset=%d\n"), bitWidth, byteOffset); |
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249 //the full dword we expect |
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250 //currently assume that the unwritable bits will be 0 |
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251 const TUint writeExpect = (pattern << (bitWidth * i) ) & mask; |
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252 const TUint clearExpect = 0; |
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253 |
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254 //do write followed by clear |
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255 const TUint expect[] = {writeExpect, clearExpect}; |
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256 const TUint write[] = {pattern, 0}; |
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257 for(TInt n = 0; n < 2; n++) |
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258 { |
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259 aSpace.Write(bitWidth, byteOffset, write[n]); |
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260 TUint result = aSpace.Read(32, os); |
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261 |
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262 if(aVerbose) |
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263 test.Printf(_L("wrote 0x%08x, expect 0x%08x, read 0x%08x\n"), |
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264 write[n], expect[n], result); |
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265 test_Equal(expect[n], result); |
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266 } |
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267 |
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268 //test Modify calls. Set then clear pattern |
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269 TUint set[] = {pattern, 0}; |
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270 TUint clear[] = {0, pattern}; |
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271 |
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272 for(TInt m = 0; m < 2; m++) |
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273 { |
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274 aSpace.Modify(bitWidth, byteOffset, clear[m], set[m]); |
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275 TUint result = aSpace.Read(32, os); |
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276 |
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277 if(aVerbose) |
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278 test.Printf(_L("clear 0x%08x, set 0x%08x, expect 0x%08x, read 0x%08x\n"), clear[m], set[m], expect[m], result); |
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279 test_Equal(expect[m], result); |
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280 } |
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281 } |
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282 } |
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283 |
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284 //restore orginal value or we will not be able to access device |
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285 aSpace.Write(32, os, original); |
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286 } |
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287 |
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288 |
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289 /** |
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290 Verify that a PCI DChunk can be opened and closed from user side |
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291 |
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292 @param pci The RPci object to use |
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293 @param test The RTest object to use |
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294 @param aPciChunkSize The size of the DChunk which would be created |
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295 */ |
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296 void TestOpenAndCloseDChunk(RPci& pci,RTest& test,TInt aPciChunkSize) |
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297 { |
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298 RPciChunk testPciDChunk; |
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299 |
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300 // Create and open Chunk |
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301 TRequestStatus status; |
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302 TInt r = pci.OpenPciDChunk(testPciDChunk,aPciChunkSize, &status); |
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303 test_KErrNone(r); |
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304 |
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305 test(testPciDChunk.IsWritable()); |
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306 test(testPciDChunk.IsReadable()); |
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307 |
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308 test.Printf(_L("PCI Chunk base = 0x%08x\n"), testPciDChunk.Base()); |
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309 test.Printf(_L("PCI Chunk size = %d\n"), testPciDChunk.Size()); |
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310 test.Printf(_L("PCI Address = 0x%08x\n"), testPciDChunk.PciBase()); |
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311 |
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312 //Close Chunk |
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313 test.Next(_L("Close PCI Chunk handle")); |
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314 |
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315 RTest::CloseHandleAndWaitForDestruction(testPciDChunk); |
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316 User::WaitForRequest(status); |
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317 } |
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318 |
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319 /** |
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320 Verify that a PCI PlatHwChunk can be opened and closed from user side |
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321 |
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322 |
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323 @param pci The RPci object to use |
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324 @param test The RTest object to use |
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325 @param aPciChunkSize The size of the PlatHwChunk which would be created |
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326 */ |
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327 void TestOpenAndClosePciPlatHwChunk(RPci& pci,RTest& test,TInt aPciChunkSize) |
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328 { |
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329 RPciChunk testPciPlatHwChunk; |
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330 |
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331 // Create and open Chunk |
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332 TRequestStatus status; |
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333 TInt r = pci.OpenPciPlatHwChunk(testPciPlatHwChunk,aPciChunkSize, &status); |
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334 test_KErrNone(r); |
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335 |
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336 test(testPciPlatHwChunk.IsWritable()); |
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337 test(testPciPlatHwChunk.IsReadable()); |
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338 |
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339 test.Printf(_L("PCI Chunk base = 0x%08x\n"), testPciPlatHwChunk.Base()); |
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340 test.Printf(_L("PCI Chunk size = %d\n"), testPciPlatHwChunk.Size()); |
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341 test.Printf(_L("PCI Address = 0x%08x\n"), testPciPlatHwChunk.PciBase()); |
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342 |
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343 //Close Chunk |
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344 testPciPlatHwChunk.Close(); |
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345 User::WaitForRequest(status); |
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346 test.Next(_L("Closed PCI PlatHwChunk handle")); |
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347 } |
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348 |
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349 /** |
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350 Verify that pci-mapped DChunk can be opended and closed form user side |
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351 |
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352 @param pci The RPci object to use |
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353 @param test The RTest object to use |
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354 @param aPciChunkSize The size of the pci-mapped DChunk which would be created |
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355 */ |
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356 void TestPciMapppedChunk(RPci& pci,RTest& test,TInt aPciChunkSize) |
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357 { |
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358 RPciChunk testPciMappedChunk; |
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359 |
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360 // Create and open Chunk |
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361 TRequestStatus status; |
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362 TInt r = pci.OpenPciMappedChunk(testPciMappedChunk,aPciChunkSize, &status); |
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363 test_KErrNone(r); |
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364 |
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365 test(testPciMappedChunk.IsWritable()); |
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366 test(testPciMappedChunk.IsReadable()); |
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367 |
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368 test.Printf(_L("PCI Chunk base = 0x%08x\n"), testPciMappedChunk.Base()); |
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369 test.Printf(_L("PCI Chunk size = %d\n"), testPciMappedChunk.Size()); |
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370 test.Printf(_L("PCI Address = 0x%08x\n"), testPciMappedChunk.PciBase()); |
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371 |
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372 //Close Chunk |
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373 testPciMappedChunk.Close(); |
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374 User::WaitForRequest(status); |
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375 test.Next(_L("Closed PCI Mapped Chunk handle")); |
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376 } |
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377 |
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378 /** |
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379 Verify that an RChunk can be open to grant access to the internal PCI window from the user side |
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380 |
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381 @param pci The RPci object to use |
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382 @param test The RTest object to use |
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383 */ |
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384 void TestPciWindowChunk(RPci& pci,RTest& test) |
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385 { |
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386 RChunk testPciWindowChunk; |
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387 |
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388 // Create and open DChunk |
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389 TInt r = pci.OpenPciWindowChunk(testPciWindowChunk); |
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390 test_KErrNone(r); |
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391 |
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392 test(testPciWindowChunk.IsWritable()); |
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393 test(testPciWindowChunk.IsReadable()); |
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394 |
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395 test.Printf(_L("PCI Window Chunk base = 0x%08x\n"), testPciWindowChunk.Base()); |
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396 test.Printf(_L("PCI Window Chunk size = %d\n"), testPciWindowChunk.Size()); |
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397 |
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398 //Close Chunk |
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399 testPciWindowChunk.Close(); |
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400 test.Next(_L("Closed PCI Window Chunk handle")); |
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401 } |
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402 |
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403 |
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404 class CPciTest : public CTest |
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405 { |
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406 protected: |
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407 CPciTest(const TDesC& aName, TInt aIterations, RPci& aDevice) |
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408 : CTest(aName, aIterations), iDevice(aDevice) |
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409 {} |
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410 |
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411 RPci iDevice; |
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412 }; |
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413 |
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414 /** |
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415 Each instance of test will open a chunk, using the function specified in |
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416 the template argument, FUNC. |
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417 |
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418 The total number of chunks that can be opened by all instances is limited |
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419 by iMaxCount. |
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420 |
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421 All intances of the test will hold their chunk open until iMaxCount has |
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422 been reached. |
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423 */ |
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424 template<ChunkOpenFn FUNC> |
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425 class CPciOpenChunkTest : public CPciTest |
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426 { |
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427 public: |
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428 CPciOpenChunkTest(const TDesC& aName, TInt aIterations, RPci& aDevice, |
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429 RSemaphore aSemOpen, RSemaphore aSemClose, RFastLock aLock, TInt aMaxCount) |
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430 :CPciTest(aName, aIterations, aDevice), |
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431 iSemOpen(aSemOpen), iSemClose(aSemClose), iLock(aLock), iMaxCount(aMaxCount) |
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432 { |
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433 } |
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434 |
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435 virtual void RunTest() |
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436 { |
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437 RTest test(iName); |
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438 RPciChunk chunk; |
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439 |
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440 iSemOpen.Wait(); |
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441 TRequestStatus status; |
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442 const TInt chunkSize = 0x400; |
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443 //open chunk by calling FUNC |
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444 TInt r = ((iDevice).*(FUNC))(chunk, chunkSize, &status); |
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445 test_KErrNone(r); |
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446 |
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447 iLock.Wait(); |
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448 iOpenCount++; |
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449 test.Printf(_L("Opened chunk %d\n"), iOpenCount); |
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450 if(iOpenCount == iMaxCount) |
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451 { |
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452 test.Printf(_L("Opened=%d, max=%d: Allow chunks to close\n"), iOpenCount, iMaxCount); |
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453 //release all waiting threads |
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454 //plus 1 preincrement so this |
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455 //thread also passes |
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456 iSemClose.Signal(iOpenCount); |
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457 iOpenCount = 0; |
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458 } |
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459 iLock.Signal(); |
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460 |
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461 |
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462 iSemClose.Wait(); |
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463 chunk.Close(); |
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464 User::WaitForRequest(status); |
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465 |
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466 // permit another chunk to be opened |
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467 iSemOpen.Signal(); |
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468 test.Close(); |
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469 } |
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470 |
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471 virtual CTest* Clone() const |
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472 { |
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473 //make shallow copy |
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474 return new CPciOpenChunkTest(*this); |
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475 } |
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476 |
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477 |
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478 private: |
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479 RSemaphore& iSemOpen; //!< Represents the number of available PCI mappings |
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480 RSemaphore& iSemClose; //!< Represents the number of threads waiting to close their chunk |
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481 RFastLock& iLock; |
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482 static TInt iOpenCount; |
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483 const TInt iMaxCount; |
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484 }; |
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485 |
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486 template<ChunkOpenFn FUNC> |
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487 TInt CPciOpenChunkTest<FUNC>::iOpenCount = 0; |
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488 |
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489 |
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490 /** |
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491 Test which will perform various reads from a PCI address |
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492 space (config or memory) and confirm that values are read |
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493 as expected |
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494 */ |
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495 class CPciAddressSpaceRead : public CPciTest |
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496 { |
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497 public: |
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498 CPciAddressSpaceRead(const TDesC& aName, TInt aIterations, RPci& aDevice, |
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499 const TUserPciSpace& aSpace, const TPciTestInfo::TAddrSpaceTest& aInfo) |
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500 :CPciTest(aName, aIterations, aDevice), |
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501 iAddressSpace(aSpace.Clone()), iSpaceTestInfo(aInfo) |
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502 { |
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503 } |
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504 |
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505 CPciAddressSpaceRead(const CPciAddressSpaceRead& aOther) |
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506 :CPciTest(aOther)/* TODO-REVIEW have object-sliced aOther - is this ok?*/, |
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507 iAddressSpace(aOther.iAddressSpace->Clone()), iSpaceTestInfo(aOther.iSpaceTestInfo) |
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508 { |
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509 } |
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510 |
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511 virtual ~CPciAddressSpaceRead() |
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512 { |
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513 delete iAddressSpace; |
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514 } |
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515 |
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516 virtual void RunTest() |
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517 { |
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518 __UHEAP_MARK; |
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519 RTest test(iName); |
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520 TestReadAddressSpace(*iAddressSpace, iSpaceTestInfo, test); |
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521 test.Close(); |
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522 __UHEAP_MARKEND; |
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523 } |
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524 |
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525 virtual CTest* Clone() const |
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526 { |
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527 //make shallow copy |
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528 return new CPciAddressSpaceRead(*this); |
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529 } |
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530 |
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531 private: |
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532 TUserPciSpace* iAddressSpace; |
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533 const TPciTestInfo::TAddrSpaceTest& iSpaceTestInfo; |
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534 }; |
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535 |
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536 /** |
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537 For aBuffer, test writing to it then reading back from aWindow |
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538 then write via window and read back from chunk |
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539 |
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540 @param test The RTest object to use |
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541 @param aBuffer RChunk corresponding to a PCI accessible buffer |
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542 @param aWindow RChunk coressponding an appropriate System-to-PCI memory window |
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543 It is presumed to start at PCI address 0 |
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544 */ |
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545 void DoLoopBackTest(RTest& test, RPciChunk aBuffer, RChunk aWindow) |
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546 { |
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547 test.Start(_L("Test accessing memory via PCI")); |
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548 |
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549 TUint8* const bufferBase = aBuffer.Base(); |
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550 const TUint bufferSize = aBuffer.Size(); |
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551 const TUint bufferPciBase = aBuffer.PciBase(); |
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552 |
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553 TUint8* const windowBase = aWindow.Base(); |
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554 const TUint windowSize = aWindow.Size(); |
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555 |
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556 #define PRINT(N) RDebug::Printf("%s = 0x%08x (%d)", #N, (N), (N)) |
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557 PRINT(bufferBase); |
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558 PRINT(bufferSize); |
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559 PRINT(bufferPciBase); |
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560 |
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561 PRINT(windowBase); |
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562 PRINT(windowSize); |
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563 |
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564 #undef PRINT |
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565 |
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566 //need to check that the end of the buffer |
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567 //is within the windowed region |
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568 test(bufferPciBase + bufferSize <= windowSize); |
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569 TUint8* const bufferBaseWithinWindow = windowBase + bufferPciBase; |
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570 |
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571 test.Next(_L("write chunk")); |
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572 for(TUint i = 0; i < bufferSize; ++i) |
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573 { |
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574 //each byte will hold its own offset modulo 256 |
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575 bufferBase[i] = (TUint8)i; |
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576 } |
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577 |
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578 test.Next(_L("read back via window")); |
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579 for(TUint j=0; j < bufferSize; ++j) |
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580 { |
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581 const TUint8 result = bufferBaseWithinWindow[j]; |
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582 test_Equal(j%256, result); |
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583 } |
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584 |
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585 //clear chunk |
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586 memclr(bufferBase, bufferSize); |
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587 test.Next(_L("write via window")); |
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588 for(TUint k=0; k < bufferSize; ++k) |
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589 { |
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590 //each byte will hold its own offset modulo 256 |
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591 bufferBaseWithinWindow[k] = (TUint8)k; |
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592 } |
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593 |
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594 test.Next(_L("read back from chunk")); |
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595 for(TUint l=0; l < bufferSize; ++l) |
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596 { |
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597 const TUint8 result = bufferBase[l]; |
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598 test_Equal(l%256, result); |
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599 } |
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600 |
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601 test.End(); |
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602 } |
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603 |
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604 /** |
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605 Take care of opening a chunk, running the test and closing |
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606 */ |
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607 template<ChunkOpenFn OPEN_FUNC> |
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608 inline void LoopBackTest(RPci& aPci, RTest& test, RChunk& aWindow) |
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609 { |
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610 RPciChunk pciChunk; |
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611 const TInt chunkSize = 0x400; //1k |
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612 |
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613 //call the specified chunk opening function |
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614 TRequestStatus status; |
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615 TInt r = ((aPci).*(OPEN_FUNC))(pciChunk, chunkSize, &status); |
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616 test_KErrNone(r); |
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617 DoLoopBackTest(test, pciChunk, aWindow); |
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618 pciChunk.Close(); |
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619 User::WaitForRequest(status); |
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620 } |
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621 |
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622 /** |
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623 Run the loopback test for the 3 types of buffer supported by the PCI driver. |
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624 DChunk |
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625 DPlatChunk |
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626 Mapped In external memory |
|
627 */ |
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628 void TestLoopBack(RPci& aPci, RTest& test) |
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629 { |
|
630 test.Next(_L("Open PCI window")); |
|
631 RChunk window; |
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632 |
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633 TInt r = aPci.OpenPciWindowChunk(window); |
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634 test_KErrNone(r); |
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635 |
|
636 test.Next(_L("DChunk")); |
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637 LoopBackTest<&RPci::OpenPciDChunk>(aPci, test, window); |
|
638 |
|
639 test.Next(_L("DPlatHwChunk")); |
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640 LoopBackTest<&RPci::OpenPciPlatHwChunk>(aPci, test, window); |
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641 |
|
642 test.Next(_L("DChunk (mapped in)")); |
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643 LoopBackTest<&RPci::OpenPciMappedChunk>(aPci, test, window); |
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644 |
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645 window.Close(); |
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646 } |
|
647 #ifndef __VC32__ //visual studio 6 doesn't approve of pointer to member function template parameters |
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648 /** |
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649 Run the CPciOpenChunkTest for each type of chunk. This function also creates (and destroys) the |
|
650 necessary semaphores and locks. |
|
651 CPciOpenChunkTest objects are run in multiple threads using MultipleTestRun(). |
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652 |
|
653 @param aDevice Handle to the test driver |
|
654 @param test RTest to use. |
|
655 @param aBufferLimit The maximum number of buffers which can be opened simultaneously |
|
656 */ |
|
657 void TestBufferOpenConcurrency(RPci& aDevice, RTest& test, TInt aBufferLimit) |
|
658 { |
|
659 RSemaphore semaphoreOpen; |
|
660 RSemaphore semaphoreClose; |
|
661 RFastLock lock; |
|
662 |
|
663 TInt r = semaphoreOpen.CreateLocal(aBufferLimit); |
|
664 test_KErrNone(r); |
|
665 |
|
666 r = semaphoreClose.CreateLocal(0); |
|
667 test_KErrNone(r); |
|
668 |
|
669 r = lock.CreateLocal(); |
|
670 test_KErrNone(r); |
|
671 |
|
672 const TInt iterations = 3; |
|
673 { |
|
674 test.Printf(_L("Opening %d PCI DChunks in %d threads\n"), aBufferLimit, aBufferLimit); |
|
675 CPciOpenChunkTest<&RPci::OpenPciDChunk> |
|
676 dChunkTest(_L("Concurrent-DChunk"), iterations, aDevice, semaphoreOpen, semaphoreClose, lock, aBufferLimit); |
|
677 |
|
678 MultipleTestRun(test, dChunkTest, aBufferLimit); |
|
679 } |
|
680 |
|
681 { |
|
682 test.Printf(_L("Opening %d PCI DPlatHwChunks in %d threads\n"), aBufferLimit, aBufferLimit); |
|
683 CPciOpenChunkTest<&RPci::OpenPciPlatHwChunk> |
|
684 platChunkTest(_L("Concurrent-DPlatHwChunk"), iterations, aDevice, semaphoreOpen, semaphoreClose, lock, aBufferLimit); |
|
685 |
|
686 MultipleTestRun(test, platChunkTest, aBufferLimit); |
|
687 } |
|
688 |
|
689 { |
|
690 test.Printf(_L("Opening %d PCI Mapped chunks in %d threads\n"), aBufferLimit, aBufferLimit); |
|
691 CPciOpenChunkTest<&RPci::OpenPciMappedChunk> |
|
692 mappedChunkTest(_L("Concurrent-DChunk(mapped)"), iterations, aDevice, semaphoreOpen, semaphoreClose, lock, aBufferLimit); |
|
693 |
|
694 MultipleTestRun(test, mappedChunkTest, aBufferLimit); |
|
695 } |
|
696 |
|
697 semaphoreOpen.Close(); |
|
698 semaphoreClose.Close(); |
|
699 lock.Close(); |
|
700 } |
|
701 #endif |
|
702 |
|
703 TInt E32Main() |
|
704 { |
|
705 __UHEAP_MARK; |
|
706 |
|
707 _LIT(KPci, "PCI"); |
|
708 RTest test(KPci); |
|
709 test.Start(_L("Running PCI tests\n")); |
|
710 |
|
711 TInt r = User::LoadLogicalDevice(KPciLdd); |
|
712 |
|
713 __KHEAP_MARK; |
|
714 |
|
715 if(r==KErrNotFound) |
|
716 { |
|
717 test.Printf(_L("No PCI system present - skipping test\n")); |
|
718 return KErrNone; |
|
719 } |
|
720 if(r!=KErrNone && r!=KErrAlreadyExists) |
|
721 { |
|
722 test_KErrNone(r); |
|
723 } |
|
724 |
|
725 test.Next(_L("Open non-existant device\n")); |
|
726 RPci device; |
|
727 TPciDevice unavailable; |
|
728 r = device.Open(unavailable); |
|
729 test_Equal(KErrNotFound, r); |
|
730 |
|
731 RPci pciInfo; |
|
732 r = pciInfo.Open(); |
|
733 test_KErrNone(r); |
|
734 |
|
735 test.Next(_L("Get test info from driver\n")); |
|
736 TPciTestInfo info; |
|
737 r = pciInfo.GetTestInfo(info); |
|
738 test_KErrNone(r); |
|
739 pciInfo.Close(); |
|
740 |
|
741 test.Next(_L("Open test device\n")); |
|
742 r = device.Open(info.iDevice); |
|
743 test_KErrNone(r); |
|
744 |
|
745 test.Next(_L("Run Device Unit Test\n")); |
|
746 r=TestRunPciUnitTest(device); |
|
747 test_KErrNone(r); |
|
748 |
|
749 test.Next(_L("Read config space\n")); |
|
750 TUserConfigSpace cs(device); |
|
751 TestReadAddressSpace(cs, info.iCfgSpaceRead, test); |
|
752 |
|
753 test.Next(_L("Write config space\n")); |
|
754 TestWriteAddressSpace(cs, info.iCfgSpaceWrite, test); |
|
755 |
|
756 test.Next(_L("Read memory space\n")); |
|
757 TUserMemorySpace ms(device, info.iMemSpaceIndex); |
|
758 TestReadAddressSpace(ms, info.iMemSpaceRead, test); |
|
759 |
|
760 test.Next(_L("Modify memory space\n")); |
|
761 TestWriteAddressSpace(ms, info.iMemSpaceWrite, test); |
|
762 |
|
763 { |
|
764 const TInt addrSpaceThreadCount = 4; |
|
765 const TInt iterations = 100; |
|
766 test.Next(_L("Concurrent config space reads")); |
|
767 CPciAddressSpaceRead cfgSpaceRead(_L("Cfg Space Read"), iterations, device, cs, info.iCfgSpaceRead); |
|
768 MultipleTestRun(test, cfgSpaceRead, addrSpaceThreadCount); |
|
769 |
|
770 test.Next(_L("Concurrent memory space reads")); |
|
771 CPciAddressSpaceRead memSpaceRead(_L("Memory Space Read"), iterations, device, ms, info.iMemSpaceRead); |
|
772 MultipleTestRun(test, memSpaceRead, addrSpaceThreadCount); |
|
773 } |
|
774 |
|
775 TInt testDChunkSize = 0x4000; |
|
776 test.Next(_L("Open and Close DChunks\n")); |
|
777 TestOpenAndCloseDChunk(device,test,testDChunkSize); |
|
778 |
|
779 TInt testDPlatChunkSize = 0x2000; |
|
780 test.Next(_L("Open and Close PlatHwChunks\n")); |
|
781 TestOpenAndClosePciPlatHwChunk(device,test,testDPlatChunkSize); |
|
782 |
|
783 //TestPciMapppedChunk() fails for sizes greater than 4K. |
|
784 //The issue is that a block of externally mapped memory must be |
|
785 //naturally alligned in order to be accessible to the PCI bus (ie |
|
786 //an 8k buffer would have to start at an address which is a |
|
787 //multiple of 8k. |
|
788 // |
|
789 //Now we could fix this for sure on the kernel side, by making |
|
790 //sure we only commit correctly aligned memory into the chunk (as |
|
791 //the pci driver itself does), |
|
792 //However, by using a 4k chunk, we know this will be on a page |
|
793 //boundary so the alignment is correct (assuming the page size |
|
794 //isn't changed). |
|
795 TInt testMapppedChunkSize = 0x1000; |
|
796 test.Next(_L("Open and Close Pci Mappped Chunk\n")); |
|
797 TestPciMapppedChunk(device,test,testMapppedChunkSize); |
|
798 |
|
799 test.Next(_L("Open and Close Pci Window Chunk\n")); |
|
800 TestPciWindowChunk(device,test); |
|
801 |
|
802 const TInt numberOfThreads = info.iNumberOfBars; |
|
803 test.Printf(_L("Open buffers concurrently, max supported = %d\n"), numberOfThreads); |
|
804 #ifndef __VC32__ |
|
805 TestBufferOpenConcurrency(device, test, numberOfThreads); |
|
806 #else |
|
807 test.Printf(_L("TestBufferOpenConcurrency not implemented for WINS"), numberOfThreads); |
|
808 #endif |
|
809 |
|
810 test.Next(_L("Test loop back")); |
|
811 TestLoopBack(device, test); |
|
812 |
|
813 device.Close(); |
|
814 __KHEAP_MARKEND; |
|
815 |
|
816 r = User::FreeLogicalDevice(KPciLdd); |
|
817 test_KErrNone(r); |
|
818 |
|
819 test.End(); |
|
820 test.Close(); |
|
821 |
|
822 __UHEAP_MARKEND; |
|
823 return KErrNone; |
|
824 } |
|
825 |