symbian-qemu-0.9.1-12/qemu-symbian-svp/gdbstub.c
changeset 1 2fb8b9db1c86
child 106 3bc1a978be44
equal deleted inserted replaced
0:ffa851df0825 1:2fb8b9db1c86
       
     1 /*
       
     2  * gdb server stub
       
     3  *
       
     4  * Copyright (c) 2003-2005 Fabrice Bellard
       
     5  * Copyright (c) 2007 CodeSourcery
       
     6  *
       
     7  * This library is free software; you can redistribute it and/or
       
     8  * modify it under the terms of the GNU Lesser General Public
       
     9  * License as published by the Free Software Foundation; either
       
    10  * version 2 of the License, or (at your option) any later version.
       
    11  *
       
    12  * This library is distributed in the hope that it will be useful,
       
    13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
       
    14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
       
    15  * Lesser General Public License for more details.
       
    16  *
       
    17  * You should have received a copy of the GNU Lesser General Public
       
    18  * License along with this library; if not, write to the Free Software
       
    19  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
       
    20  */
       
    21 #include "config.h"
       
    22 #include "qemu-common.h"
       
    23 #ifdef CONFIG_USER_ONLY
       
    24 #include <stdlib.h>
       
    25 #include <stdio.h>
       
    26 #include <stdarg.h>
       
    27 #include <string.h>
       
    28 #include <errno.h>
       
    29 #include <unistd.h>
       
    30 #include <fcntl.h>
       
    31 
       
    32 #include "qemu.h"
       
    33 #include "qemu-common.h"
       
    34 #else
       
    35 #include "qemu-char.h"
       
    36 #include "sysemu.h"
       
    37 #include "gdbstub.h"
       
    38 #endif
       
    39 
       
    40 #define MAX_PACKET_LENGTH 4096
       
    41 
       
    42 #include "qemu_socket.h"
       
    43 
       
    44 
       
    45 enum {
       
    46     GDB_SIGNAL_0 = 0,
       
    47     GDB_SIGNAL_INT = 2,
       
    48     GDB_SIGNAL_TRAP = 5,
       
    49     GDB_SIGNAL_UNKNOWN = 143
       
    50 };
       
    51 
       
    52 #ifdef CONFIG_USER_ONLY
       
    53 
       
    54 /* Map target signal numbers to GDB protocol signal numbers and vice
       
    55  * versa.  For user emulation's currently supported systems, we can
       
    56  * assume most signals are defined.
       
    57  */
       
    58 
       
    59 static int gdb_signal_table[] = {
       
    60     0,
       
    61     TARGET_SIGHUP,
       
    62     TARGET_SIGINT,
       
    63     TARGET_SIGQUIT,
       
    64     TARGET_SIGILL,
       
    65     TARGET_SIGTRAP,
       
    66     TARGET_SIGABRT,
       
    67     -1, /* SIGEMT */
       
    68     TARGET_SIGFPE,
       
    69     TARGET_SIGKILL,
       
    70     TARGET_SIGBUS,
       
    71     TARGET_SIGSEGV,
       
    72     TARGET_SIGSYS,
       
    73     TARGET_SIGPIPE,
       
    74     TARGET_SIGALRM,
       
    75     TARGET_SIGTERM,
       
    76     TARGET_SIGURG,
       
    77     TARGET_SIGSTOP,
       
    78     TARGET_SIGTSTP,
       
    79     TARGET_SIGCONT,
       
    80     TARGET_SIGCHLD,
       
    81     TARGET_SIGTTIN,
       
    82     TARGET_SIGTTOU,
       
    83     TARGET_SIGIO,
       
    84     TARGET_SIGXCPU,
       
    85     TARGET_SIGXFSZ,
       
    86     TARGET_SIGVTALRM,
       
    87     TARGET_SIGPROF,
       
    88     TARGET_SIGWINCH,
       
    89     -1, /* SIGLOST */
       
    90     TARGET_SIGUSR1,
       
    91     TARGET_SIGUSR2,
       
    92     TARGET_SIGPWR,
       
    93     -1, /* SIGPOLL */
       
    94     -1,
       
    95     -1,
       
    96     -1,
       
    97     -1,
       
    98     -1,
       
    99     -1,
       
   100     -1,
       
   101     -1,
       
   102     -1,
       
   103     -1,
       
   104     -1,
       
   105     __SIGRTMIN + 1,
       
   106     __SIGRTMIN + 2,
       
   107     __SIGRTMIN + 3,
       
   108     __SIGRTMIN + 4,
       
   109     __SIGRTMIN + 5,
       
   110     __SIGRTMIN + 6,
       
   111     __SIGRTMIN + 7,
       
   112     __SIGRTMIN + 8,
       
   113     __SIGRTMIN + 9,
       
   114     __SIGRTMIN + 10,
       
   115     __SIGRTMIN + 11,
       
   116     __SIGRTMIN + 12,
       
   117     __SIGRTMIN + 13,
       
   118     __SIGRTMIN + 14,
       
   119     __SIGRTMIN + 15,
       
   120     __SIGRTMIN + 16,
       
   121     __SIGRTMIN + 17,
       
   122     __SIGRTMIN + 18,
       
   123     __SIGRTMIN + 19,
       
   124     __SIGRTMIN + 20,
       
   125     __SIGRTMIN + 21,
       
   126     __SIGRTMIN + 22,
       
   127     __SIGRTMIN + 23,
       
   128     __SIGRTMIN + 24,
       
   129     __SIGRTMIN + 25,
       
   130     __SIGRTMIN + 26,
       
   131     __SIGRTMIN + 27,
       
   132     __SIGRTMIN + 28,
       
   133     __SIGRTMIN + 29,
       
   134     __SIGRTMIN + 30,
       
   135     __SIGRTMIN + 31,
       
   136     -1, /* SIGCANCEL */
       
   137     __SIGRTMIN,
       
   138     __SIGRTMIN + 32,
       
   139     __SIGRTMIN + 33,
       
   140     __SIGRTMIN + 34,
       
   141     __SIGRTMIN + 35,
       
   142     __SIGRTMIN + 36,
       
   143     __SIGRTMIN + 37,
       
   144     __SIGRTMIN + 38,
       
   145     __SIGRTMIN + 39,
       
   146     __SIGRTMIN + 40,
       
   147     __SIGRTMIN + 41,
       
   148     __SIGRTMIN + 42,
       
   149     __SIGRTMIN + 43,
       
   150     __SIGRTMIN + 44,
       
   151     __SIGRTMIN + 45,
       
   152     __SIGRTMIN + 46,
       
   153     __SIGRTMIN + 47,
       
   154     __SIGRTMIN + 48,
       
   155     __SIGRTMIN + 49,
       
   156     __SIGRTMIN + 50,
       
   157     __SIGRTMIN + 51,
       
   158     __SIGRTMIN + 52,
       
   159     __SIGRTMIN + 53,
       
   160     __SIGRTMIN + 54,
       
   161     __SIGRTMIN + 55,
       
   162     __SIGRTMIN + 56,
       
   163     __SIGRTMIN + 57,
       
   164     __SIGRTMIN + 58,
       
   165     __SIGRTMIN + 59,
       
   166     __SIGRTMIN + 60,
       
   167     __SIGRTMIN + 61,
       
   168     __SIGRTMIN + 62,
       
   169     __SIGRTMIN + 63,
       
   170     __SIGRTMIN + 64,
       
   171     __SIGRTMIN + 65,
       
   172     __SIGRTMIN + 66,
       
   173     __SIGRTMIN + 67,
       
   174     __SIGRTMIN + 68,
       
   175     __SIGRTMIN + 69,
       
   176     __SIGRTMIN + 70,
       
   177     __SIGRTMIN + 71,
       
   178     __SIGRTMIN + 72,
       
   179     __SIGRTMIN + 73,
       
   180     __SIGRTMIN + 74,
       
   181     __SIGRTMIN + 75,
       
   182     __SIGRTMIN + 76,
       
   183     __SIGRTMIN + 77,
       
   184     __SIGRTMIN + 78,
       
   185     __SIGRTMIN + 79,
       
   186     __SIGRTMIN + 80,
       
   187     __SIGRTMIN + 81,
       
   188     __SIGRTMIN + 82,
       
   189     __SIGRTMIN + 83,
       
   190     __SIGRTMIN + 84,
       
   191     __SIGRTMIN + 85,
       
   192     __SIGRTMIN + 86,
       
   193     __SIGRTMIN + 87,
       
   194     __SIGRTMIN + 88,
       
   195     __SIGRTMIN + 89,
       
   196     __SIGRTMIN + 90,
       
   197     __SIGRTMIN + 91,
       
   198     __SIGRTMIN + 92,
       
   199     __SIGRTMIN + 93,
       
   200     __SIGRTMIN + 94,
       
   201     __SIGRTMIN + 95,
       
   202     -1, /* SIGINFO */
       
   203     -1, /* UNKNOWN */
       
   204     -1, /* DEFAULT */
       
   205     -1,
       
   206     -1,
       
   207     -1,
       
   208     -1,
       
   209     -1,
       
   210     -1
       
   211 };
       
   212 #else
       
   213 /* In system mode we only need SIGINT and SIGTRAP; other signals
       
   214    are not yet supported.  */
       
   215 
       
   216 enum {
       
   217     TARGET_SIGINT = 2,
       
   218     TARGET_SIGTRAP = 5
       
   219 };
       
   220 
       
   221 static int gdb_signal_table[] = {
       
   222     -1,
       
   223     -1,
       
   224     TARGET_SIGINT,
       
   225     -1,
       
   226     -1,
       
   227     TARGET_SIGTRAP
       
   228 };
       
   229 #endif
       
   230 
       
   231 #ifdef CONFIG_USER_ONLY
       
   232 static int target_signal_to_gdb (int sig)
       
   233 {
       
   234     int i;
       
   235     for (i = 0; i < ARRAY_SIZE (gdb_signal_table); i++)
       
   236         if (gdb_signal_table[i] == sig)
       
   237             return i;
       
   238     return GDB_SIGNAL_UNKNOWN;
       
   239 }
       
   240 #endif
       
   241 
       
   242 static int gdb_signal_to_target (int sig)
       
   243 {
       
   244     if (sig < ARRAY_SIZE (gdb_signal_table))
       
   245         return gdb_signal_table[sig];
       
   246     else
       
   247         return -1;
       
   248 }
       
   249 
       
   250 //#define DEBUG_GDB
       
   251 
       
   252 typedef struct GDBRegisterState {
       
   253     int base_reg;
       
   254     int num_regs;
       
   255     gdb_reg_cb get_reg;
       
   256     gdb_reg_cb set_reg;
       
   257     const char *xml;
       
   258     struct GDBRegisterState *next;
       
   259 } GDBRegisterState;
       
   260 
       
   261 enum RSState {
       
   262     RS_IDLE,
       
   263     RS_GETLINE,
       
   264     RS_CHKSUM1,
       
   265     RS_CHKSUM2,
       
   266     RS_SYSCALL,
       
   267 };
       
   268 
       
   269 typedef struct GDBState {
       
   270     CPUState *c_cpu; /* current CPU for step/continue ops */
       
   271     CPUState *g_cpu; /* current CPU for other ops */
       
   272     CPUState *query_cpu; /* for q{f|s}ThreadInfo */
       
   273     enum RSState state; /* parsing state */
       
   274     char line_buf[MAX_PACKET_LENGTH];
       
   275     int line_buf_index;
       
   276     int line_csum;
       
   277     uint8_t last_packet[MAX_PACKET_LENGTH + 4];
       
   278     int last_packet_len;
       
   279     int signal;
       
   280 #ifdef CONFIG_USER_ONLY
       
   281     int fd;
       
   282     int running_state;
       
   283 #else
       
   284     CharDriverState *chr;
       
   285 #endif
       
   286 } GDBState;
       
   287 
       
   288 /* By default use no IRQs and no timers while single stepping so as to
       
   289  * make single stepping like an ICE HW step.
       
   290  */
       
   291 static int sstep_flags = SSTEP_ENABLE|SSTEP_NOIRQ|SSTEP_NOTIMER;
       
   292 
       
   293 /* XXX: remove this hack.  */
       
   294 static GDBState *gdbserver_state;
       
   295 
       
   296 /* This is an ugly hack to cope with both new and old gdb.
       
   297    If gdb sends qXfer:features:read then assume we're talking to a newish
       
   298    gdb that understands target descriptions.  */
       
   299 static int gdb_has_xml;
       
   300 
       
   301 #ifdef CONFIG_USER_ONLY
       
   302 /* XXX: This is not thread safe.  Do we care?  */
       
   303 static int gdbserver_fd = -1;
       
   304 
       
   305 static int get_char(GDBState *s)
       
   306 {
       
   307     uint8_t ch;
       
   308     int ret;
       
   309 
       
   310     for(;;) {
       
   311         ret = recv(s->fd, &ch, 1, 0);
       
   312         if (ret < 0) {
       
   313             if (errno == ECONNRESET)
       
   314                 s->fd = -1;
       
   315             if (errno != EINTR && errno != EAGAIN)
       
   316                 return -1;
       
   317         } else if (ret == 0) {
       
   318             close(s->fd);
       
   319             s->fd = -1;
       
   320             return -1;
       
   321         } else {
       
   322             break;
       
   323         }
       
   324     }
       
   325     return ch;
       
   326 }
       
   327 #endif
       
   328 
       
   329 static gdb_syscall_complete_cb gdb_current_syscall_cb;
       
   330 
       
   331 enum {
       
   332     GDB_SYS_UNKNOWN,
       
   333     GDB_SYS_ENABLED,
       
   334     GDB_SYS_DISABLED,
       
   335 } gdb_syscall_mode;
       
   336 
       
   337 /* If gdb is connected when the first semihosting syscall occurs then use
       
   338    remote gdb syscalls.  Otherwise use native file IO.  */
       
   339 int use_gdb_syscalls(void)
       
   340 {
       
   341     if (gdb_syscall_mode == GDB_SYS_UNKNOWN) {
       
   342         gdb_syscall_mode = (gdbserver_state ? GDB_SYS_ENABLED
       
   343                                             : GDB_SYS_DISABLED);
       
   344     }
       
   345     return gdb_syscall_mode == GDB_SYS_ENABLED;
       
   346 }
       
   347 
       
   348 /* Resume execution.  */
       
   349 static inline void gdb_continue(GDBState *s)
       
   350 {
       
   351 #ifdef CONFIG_USER_ONLY
       
   352     s->running_state = 1;
       
   353 #else
       
   354     vm_start();
       
   355 #endif
       
   356 }
       
   357 
       
   358 static void put_buffer(GDBState *s, const uint8_t *buf, int len)
       
   359 {
       
   360 #ifdef CONFIG_USER_ONLY
       
   361     int ret;
       
   362 
       
   363     while (len > 0) {
       
   364         ret = send(s->fd, buf, len, 0);
       
   365         if (ret < 0) {
       
   366             if (errno != EINTR && errno != EAGAIN)
       
   367                 return;
       
   368         } else {
       
   369             buf += ret;
       
   370             len -= ret;
       
   371         }
       
   372     }
       
   373 #else
       
   374     qemu_chr_write(s->chr, buf, len);
       
   375 #endif
       
   376 }
       
   377 
       
   378 static inline int fromhex(int v)
       
   379 {
       
   380     if (v >= '0' && v <= '9')
       
   381         return v - '0';
       
   382     else if (v >= 'A' && v <= 'F')
       
   383         return v - 'A' + 10;
       
   384     else if (v >= 'a' && v <= 'f')
       
   385         return v - 'a' + 10;
       
   386     else
       
   387         return 0;
       
   388 }
       
   389 
       
   390 static inline int tohex(int v)
       
   391 {
       
   392     if (v < 10)
       
   393         return v + '0';
       
   394     else
       
   395         return v - 10 + 'a';
       
   396 }
       
   397 
       
   398 static void memtohex(char *buf, const uint8_t *mem, int len)
       
   399 {
       
   400     int i, c;
       
   401     char *q;
       
   402     q = buf;
       
   403     for(i = 0; i < len; i++) {
       
   404         c = mem[i];
       
   405         *q++ = tohex(c >> 4);
       
   406         *q++ = tohex(c & 0xf);
       
   407     }
       
   408     *q = '\0';
       
   409 }
       
   410 
       
   411 static void hextomem(uint8_t *mem, const char *buf, int len)
       
   412 {
       
   413     int i;
       
   414 
       
   415     for(i = 0; i < len; i++) {
       
   416         mem[i] = (fromhex(buf[0]) << 4) | fromhex(buf[1]);
       
   417         buf += 2;
       
   418     }
       
   419 }
       
   420 
       
   421 /* return -1 if error, 0 if OK */
       
   422 static int put_packet_binary(GDBState *s, const char *buf, int len)
       
   423 {
       
   424     int csum, i;
       
   425     uint8_t *p;
       
   426 
       
   427     for(;;) {
       
   428         p = s->last_packet;
       
   429         *(p++) = '$';
       
   430         memcpy(p, buf, len);
       
   431         p += len;
       
   432         csum = 0;
       
   433         for(i = 0; i < len; i++) {
       
   434             csum += buf[i];
       
   435         }
       
   436         *(p++) = '#';
       
   437         *(p++) = tohex((csum >> 4) & 0xf);
       
   438         *(p++) = tohex((csum) & 0xf);
       
   439 
       
   440         s->last_packet_len = p - s->last_packet;
       
   441         put_buffer(s, (uint8_t *)s->last_packet, s->last_packet_len);
       
   442 
       
   443 #ifdef CONFIG_USER_ONLY
       
   444         i = get_char(s);
       
   445         if (i < 0)
       
   446             return -1;
       
   447         if (i == '+')
       
   448             break;
       
   449 #else
       
   450         break;
       
   451 #endif
       
   452     }
       
   453     return 0;
       
   454 }
       
   455 
       
   456 /* return -1 if error, 0 if OK */
       
   457 static int put_packet(GDBState *s, const char *buf)
       
   458 {
       
   459 #ifdef DEBUG_GDB
       
   460     printf("reply='%s'\n", buf);
       
   461 #endif
       
   462 
       
   463     return put_packet_binary(s, buf, strlen(buf));
       
   464 }
       
   465 
       
   466 /* The GDB remote protocol transfers values in target byte order.  This means
       
   467    we can use the raw memory access routines to access the value buffer.
       
   468    Conveniently, these also handle the case where the buffer is mis-aligned.
       
   469  */
       
   470 #define GET_REG8(val) do { \
       
   471     stb_p(mem_buf, val); \
       
   472     return 1; \
       
   473     } while(0)
       
   474 #define GET_REG16(val) do { \
       
   475     stw_p(mem_buf, val); \
       
   476     return 2; \
       
   477     } while(0)
       
   478 #define GET_REG32(val) do { \
       
   479     stl_p(mem_buf, val); \
       
   480     return 4; \
       
   481     } while(0)
       
   482 #define GET_REG64(val) do { \
       
   483     stq_p(mem_buf, val); \
       
   484     return 8; \
       
   485     } while(0)
       
   486 
       
   487 #if TARGET_LONG_BITS == 64
       
   488 #define GET_REGL(val) GET_REG64(val)
       
   489 #define ldtul_p(addr) ldq_p(addr)
       
   490 #else
       
   491 #define GET_REGL(val) GET_REG32(val)
       
   492 #define ldtul_p(addr) ldl_p(addr)
       
   493 #endif
       
   494 
       
   495 #if defined(TARGET_I386)
       
   496 
       
   497 #ifdef TARGET_X86_64
       
   498 static const int gpr_map[16] = {
       
   499     R_EAX, R_EBX, R_ECX, R_EDX, R_ESI, R_EDI, R_EBP, R_ESP,
       
   500     8, 9, 10, 11, 12, 13, 14, 15
       
   501 };
       
   502 #else
       
   503 static const int gpr_map[8] = {0, 1, 2, 3, 4, 5, 6, 7};
       
   504 #endif
       
   505 
       
   506 #define NUM_CORE_REGS (CPU_NB_REGS * 2 + 25)
       
   507 
       
   508 static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
       
   509 {
       
   510     if (n < CPU_NB_REGS) {
       
   511         GET_REGL(env->regs[gpr_map[n]]);
       
   512     } else if (n >= CPU_NB_REGS + 8 && n < CPU_NB_REGS + 16) {
       
   513         /* FIXME: byteswap float values.  */
       
   514 #ifdef USE_X86LDOUBLE
       
   515         memcpy(mem_buf, &env->fpregs[n - (CPU_NB_REGS + 8)], 10);
       
   516 #else
       
   517         memset(mem_buf, 0, 10);
       
   518 #endif
       
   519         return 10;
       
   520     } else if (n >= CPU_NB_REGS + 24) {
       
   521         n -= CPU_NB_REGS + 24;
       
   522         if (n < CPU_NB_REGS) {
       
   523             stq_p(mem_buf, env->xmm_regs[n].XMM_Q(0));
       
   524             stq_p(mem_buf + 8, env->xmm_regs[n].XMM_Q(1));
       
   525             return 16;
       
   526         } else if (n == CPU_NB_REGS) {
       
   527             GET_REG32(env->mxcsr);
       
   528         } 
       
   529     } else {
       
   530         n -= CPU_NB_REGS;
       
   531         switch (n) {
       
   532         case 0: GET_REGL(env->eip);
       
   533         case 1: GET_REG32(env->eflags);
       
   534         case 2: GET_REG32(env->segs[R_CS].selector);
       
   535         case 3: GET_REG32(env->segs[R_SS].selector);
       
   536         case 4: GET_REG32(env->segs[R_DS].selector);
       
   537         case 5: GET_REG32(env->segs[R_ES].selector);
       
   538         case 6: GET_REG32(env->segs[R_FS].selector);
       
   539         case 7: GET_REG32(env->segs[R_GS].selector);
       
   540         /* 8...15 x87 regs.  */
       
   541         case 16: GET_REG32(env->fpuc);
       
   542         case 17: GET_REG32((env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11);
       
   543         case 18: GET_REG32(0); /* ftag */
       
   544         case 19: GET_REG32(0); /* fiseg */
       
   545         case 20: GET_REG32(0); /* fioff */
       
   546         case 21: GET_REG32(0); /* foseg */
       
   547         case 22: GET_REG32(0); /* fooff */
       
   548         case 23: GET_REG32(0); /* fop */
       
   549         /* 24+ xmm regs.  */
       
   550         }
       
   551     }
       
   552     return 0;
       
   553 }
       
   554 
       
   555 static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int i)
       
   556 {
       
   557     uint32_t tmp;
       
   558 
       
   559     if (i < CPU_NB_REGS) {
       
   560         env->regs[gpr_map[i]] = ldtul_p(mem_buf);
       
   561         return sizeof(target_ulong);
       
   562     } else if (i >= CPU_NB_REGS + 8 && i < CPU_NB_REGS + 16) {
       
   563         i -= CPU_NB_REGS + 8;
       
   564 #ifdef USE_X86LDOUBLE
       
   565         memcpy(&env->fpregs[i], mem_buf, 10);
       
   566 #endif
       
   567         return 10;
       
   568     } else if (i >= CPU_NB_REGS + 24) {
       
   569         i -= CPU_NB_REGS + 24;
       
   570         if (i < CPU_NB_REGS) {
       
   571             env->xmm_regs[i].XMM_Q(0) = ldq_p(mem_buf);
       
   572             env->xmm_regs[i].XMM_Q(1) = ldq_p(mem_buf + 8);
       
   573             return 16;
       
   574         } else if (i == CPU_NB_REGS) {
       
   575             env->mxcsr = ldl_p(mem_buf);
       
   576             return 4;
       
   577         }
       
   578     } else {
       
   579         i -= CPU_NB_REGS;
       
   580         switch (i) {
       
   581         case 0: env->eip = ldtul_p(mem_buf); return sizeof(target_ulong);
       
   582         case 1: env->eflags = ldl_p(mem_buf); return 4;
       
   583 #if defined(CONFIG_USER_ONLY)
       
   584 #define LOAD_SEG(index, sreg)\
       
   585             tmp = ldl_p(mem_buf);\
       
   586             if (tmp != env->segs[sreg].selector)\
       
   587                 cpu_x86_load_seg(env, sreg, tmp);
       
   588 #else
       
   589 /* FIXME: Honor segment registers.  Needs to avoid raising an exception
       
   590    when the selector is invalid.  */
       
   591 #define LOAD_SEG(index, sreg) do {} while(0)
       
   592 #endif
       
   593         case 2: LOAD_SEG(10, R_CS); return 4;
       
   594         case 3: LOAD_SEG(11, R_SS); return 4;
       
   595         case 4: LOAD_SEG(12, R_DS); return 4;
       
   596         case 5: LOAD_SEG(13, R_ES); return 4;
       
   597         case 6: LOAD_SEG(14, R_FS); return 4;
       
   598         case 7: LOAD_SEG(15, R_GS); return 4;
       
   599         /* 8...15 x87 regs.  */
       
   600         case 16: env->fpuc = ldl_p(mem_buf); return 4;
       
   601         case 17:
       
   602                  tmp = ldl_p(mem_buf);
       
   603                  env->fpstt = (tmp >> 11) & 7;
       
   604                  env->fpus = tmp & ~0x3800;
       
   605                  return 4;
       
   606         case 18: /* ftag */ return 4;
       
   607         case 19: /* fiseg */ return 4;
       
   608         case 20: /* fioff */ return 4;
       
   609         case 21: /* foseg */ return 4;
       
   610         case 22: /* fooff */ return 4;
       
   611         case 23: /* fop */ return 4;
       
   612         /* 24+ xmm regs.  */
       
   613         }
       
   614     }
       
   615     /* Unrecognised register.  */
       
   616     return 0;
       
   617 }
       
   618 
       
   619 #elif defined (TARGET_PPC)
       
   620 
       
   621 #define NUM_CORE_REGS 71
       
   622 
       
   623 static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
       
   624 {
       
   625     if (n < 32) {
       
   626         /* gprs */
       
   627         GET_REGL(env->gpr[n]);
       
   628     } else if (n < 64) {
       
   629         /* fprs */
       
   630         stfq_p(mem_buf, env->fpr[n-32]);
       
   631         return 8;
       
   632     } else {
       
   633         switch (n) {
       
   634         case 64: GET_REGL(env->nip);
       
   635         case 65: GET_REGL(env->msr);
       
   636         case 66:
       
   637             {
       
   638                 uint32_t cr = 0;
       
   639                 int i;
       
   640                 for (i = 0; i < 8; i++)
       
   641                     cr |= env->crf[i] << (32 - ((i + 1) * 4));
       
   642                 GET_REG32(cr);
       
   643             }
       
   644         case 67: GET_REGL(env->lr);
       
   645         case 68: GET_REGL(env->ctr);
       
   646         case 69: GET_REGL(env->xer);
       
   647         case 70: GET_REG32(0); /* fpscr */
       
   648         }
       
   649     }
       
   650     return 0;
       
   651 }
       
   652 
       
   653 static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
       
   654 {
       
   655     if (n < 32) {
       
   656         /* gprs */
       
   657         env->gpr[n] = ldtul_p(mem_buf);
       
   658         return sizeof(target_ulong);
       
   659     } else if (n < 64) {
       
   660         /* fprs */
       
   661         env->fpr[n-32] = ldfq_p(mem_buf);
       
   662         return 8;
       
   663     } else {
       
   664         switch (n) {
       
   665         case 64:
       
   666             env->nip = ldtul_p(mem_buf);
       
   667             return sizeof(target_ulong);
       
   668         case 65:
       
   669             ppc_store_msr(env, ldtul_p(mem_buf));
       
   670             return sizeof(target_ulong);
       
   671         case 66:
       
   672             {
       
   673                 uint32_t cr = ldl_p(mem_buf);
       
   674                 int i;
       
   675                 for (i = 0; i < 8; i++)
       
   676                     env->crf[i] = (cr >> (32 - ((i + 1) * 4))) & 0xF;
       
   677                 return 4;
       
   678             }
       
   679         case 67:
       
   680             env->lr = ldtul_p(mem_buf);
       
   681             return sizeof(target_ulong);
       
   682         case 68:
       
   683             env->ctr = ldtul_p(mem_buf);
       
   684             return sizeof(target_ulong);
       
   685         case 69:
       
   686             env->xer = ldtul_p(mem_buf);
       
   687             return sizeof(target_ulong);
       
   688         case 70:
       
   689             /* fpscr */
       
   690             return 4;
       
   691         }
       
   692     }
       
   693     return 0;
       
   694 }
       
   695 
       
   696 #elif defined (TARGET_SPARC)
       
   697 
       
   698 #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
       
   699 #define NUM_CORE_REGS 86
       
   700 #else
       
   701 #define NUM_CORE_REGS 73
       
   702 #endif
       
   703 
       
   704 #ifdef TARGET_ABI32
       
   705 #define GET_REGA(val) GET_REG32(val)
       
   706 #else
       
   707 #define GET_REGA(val) GET_REGL(val)
       
   708 #endif
       
   709 
       
   710 static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
       
   711 {
       
   712     if (n < 8) {
       
   713         /* g0..g7 */
       
   714         GET_REGA(env->gregs[n]);
       
   715     }
       
   716     if (n < 32) {
       
   717         /* register window */
       
   718         GET_REGA(env->regwptr[n - 8]);
       
   719     }
       
   720 #if defined(TARGET_ABI32) || !defined(TARGET_SPARC64)
       
   721     if (n < 64) {
       
   722         /* fprs */
       
   723         GET_REG32(*((uint32_t *)&env->fpr[n - 32]));
       
   724     }
       
   725     /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
       
   726     switch (n) {
       
   727     case 64: GET_REGA(env->y);
       
   728     case 65: GET_REGA(GET_PSR(env));
       
   729     case 66: GET_REGA(env->wim);
       
   730     case 67: GET_REGA(env->tbr);
       
   731     case 68: GET_REGA(env->pc);
       
   732     case 69: GET_REGA(env->npc);
       
   733     case 70: GET_REGA(env->fsr);
       
   734     case 71: GET_REGA(0); /* csr */
       
   735     case 72: GET_REGA(0);
       
   736     }
       
   737 #else
       
   738     if (n < 64) {
       
   739         /* f0-f31 */
       
   740         GET_REG32(*((uint32_t *)&env->fpr[n - 32]));
       
   741     }
       
   742     if (n < 80) {
       
   743         /* f32-f62 (double width, even numbers only) */
       
   744         uint64_t val;
       
   745 
       
   746         val = (uint64_t)*((uint32_t *)&env->fpr[(n - 64) * 2 + 32]) << 32;
       
   747         val |= *((uint32_t *)&env->fpr[(n - 64) * 2 + 33]);
       
   748         GET_REG64(val);
       
   749     }
       
   750     switch (n) {
       
   751     case 80: GET_REGL(env->pc);
       
   752     case 81: GET_REGL(env->npc);
       
   753     case 82: GET_REGL(((uint64_t)GET_CCR(env) << 32) |
       
   754                            ((env->asi & 0xff) << 24) |
       
   755                            ((env->pstate & 0xfff) << 8) |
       
   756                            GET_CWP64(env));
       
   757     case 83: GET_REGL(env->fsr);
       
   758     case 84: GET_REGL(env->fprs);
       
   759     case 85: GET_REGL(env->y);
       
   760     }
       
   761 #endif
       
   762     return 0;
       
   763 }
       
   764 
       
   765 static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
       
   766 {
       
   767 #if defined(TARGET_ABI32)
       
   768     abi_ulong tmp;
       
   769 
       
   770     tmp = ldl_p(mem_buf);
       
   771 #else
       
   772     target_ulong tmp;
       
   773 
       
   774     tmp = ldtul_p(mem_buf);
       
   775 #endif
       
   776 
       
   777     if (n < 8) {
       
   778         /* g0..g7 */
       
   779         env->gregs[n] = tmp;
       
   780     } else if (n < 32) {
       
   781         /* register window */
       
   782         env->regwptr[n - 8] = tmp;
       
   783     }
       
   784 #if defined(TARGET_ABI32) || !defined(TARGET_SPARC64)
       
   785     else if (n < 64) {
       
   786         /* fprs */
       
   787         *((uint32_t *)&env->fpr[n - 32]) = tmp;
       
   788     } else {
       
   789         /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
       
   790         switch (n) {
       
   791         case 64: env->y = tmp; break;
       
   792         case 65: PUT_PSR(env, tmp); break;
       
   793         case 66: env->wim = tmp; break;
       
   794         case 67: env->tbr = tmp; break;
       
   795         case 68: env->pc = tmp; break;
       
   796         case 69: env->npc = tmp; break;
       
   797         case 70: env->fsr = tmp; break;
       
   798         default: return 0;
       
   799         }
       
   800     }
       
   801     return 4;
       
   802 #else
       
   803     else if (n < 64) {
       
   804         /* f0-f31 */
       
   805         env->fpr[n] = ldfl_p(mem_buf);
       
   806         return 4;
       
   807     } else if (n < 80) {
       
   808         /* f32-f62 (double width, even numbers only) */
       
   809         *((uint32_t *)&env->fpr[(n - 64) * 2 + 32]) = tmp >> 32;
       
   810         *((uint32_t *)&env->fpr[(n - 64) * 2 + 33]) = tmp;
       
   811     } else {
       
   812         switch (n) {
       
   813         case 80: env->pc = tmp; break;
       
   814         case 81: env->npc = tmp; break;
       
   815         case 82:
       
   816 	    PUT_CCR(env, tmp >> 32);
       
   817 	    env->asi = (tmp >> 24) & 0xff;
       
   818 	    env->pstate = (tmp >> 8) & 0xfff;
       
   819 	    PUT_CWP64(env, tmp & 0xff);
       
   820 	    break;
       
   821         case 83: env->fsr = tmp; break;
       
   822         case 84: env->fprs = tmp; break;
       
   823         case 85: env->y = tmp; break;
       
   824         default: return 0;
       
   825         }
       
   826     }
       
   827     return 8;
       
   828 #endif
       
   829 }
       
   830 #elif defined (TARGET_ARM)
       
   831 
       
   832 /* Old gdb always expect FPA registers.  Newer (xml-aware) gdb only expect
       
   833    whatever the target description contains.  Due to a historical mishap
       
   834    the FPA registers appear in between core integer regs and the CPSR.
       
   835    We hack round this by giving the FPA regs zero size when talking to a
       
   836    newer gdb.  */
       
   837 #define NUM_CORE_REGS 26
       
   838 #define GDB_CORE_XML "arm-core.xml"
       
   839 
       
   840 static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
       
   841 {
       
   842     if (n < 16) {
       
   843         /* Core integer register.  */
       
   844         GET_REG32(env->regs[n]);
       
   845     }
       
   846     if (n < 24) {
       
   847         /* FPA registers.  */
       
   848         if (gdb_has_xml)
       
   849             return 0;
       
   850         memset(mem_buf, 0, 12);
       
   851         return 12;
       
   852     }
       
   853     switch (n) {
       
   854     case 24:
       
   855         /* FPA status register.  */
       
   856         if (gdb_has_xml)
       
   857             return 0;
       
   858         GET_REG32(0);
       
   859     case 25:
       
   860         /* CPSR */
       
   861         GET_REG32(cpsr_read(env));
       
   862     }
       
   863     /* Unknown register.  */
       
   864     return 0;
       
   865 }
       
   866 
       
   867 static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
       
   868 {
       
   869     uint32_t tmp;
       
   870 
       
   871     tmp = ldl_p(mem_buf);
       
   872 
       
   873     /* Mask out low bit of PC to workaround gdb bugs.  This will probably
       
   874        cause problems if we ever implement the Jazelle DBX extensions.  */
       
   875     if (n == 15)
       
   876         tmp &= ~1;
       
   877 
       
   878     if (n < 16) {
       
   879         /* Core integer register.  */
       
   880         env->regs[n] = tmp;
       
   881         return 4;
       
   882     }
       
   883     if (n < 24) { /* 16-23 */
       
   884         /* FPA registers (ignored).  */
       
   885         if (gdb_has_xml)
       
   886             return 0;
       
   887         return 12;
       
   888     }
       
   889     switch (n) {
       
   890     case 24:
       
   891         /* FPA status register (ignored).  */
       
   892         if (gdb_has_xml)
       
   893             return 0;
       
   894         return 4;
       
   895     case 25:
       
   896         /* CPSR */
       
   897         cpsr_write (env, tmp, 0xffffffff);
       
   898         return 4;
       
   899     }
       
   900     /* Unknown register.  */
       
   901     return 0;
       
   902 }
       
   903 
       
   904 #elif defined (TARGET_M68K)
       
   905 
       
   906 #define NUM_CORE_REGS 18
       
   907 
       
   908 #define GDB_CORE_XML "cf-core.xml"
       
   909 
       
   910 static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
       
   911 {
       
   912     if (n < 8) {
       
   913         /* D0-D7 */
       
   914         GET_REG32(env->dregs[n]);
       
   915     } else if (n < 16) {
       
   916         /* A0-A7 */
       
   917         GET_REG32(env->aregs[n - 8]);
       
   918     } else {
       
   919 	switch (n) {
       
   920         case 16: GET_REG32(env->sr);
       
   921         case 17: GET_REG32(env->pc);
       
   922         }
       
   923     }
       
   924     /* FP registers not included here because they vary between
       
   925        ColdFire and m68k.  Use XML bits for these.  */
       
   926     return 0;
       
   927 }
       
   928 
       
   929 static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
       
   930 {
       
   931     uint32_t tmp;
       
   932 
       
   933     tmp = ldl_p(mem_buf);
       
   934 
       
   935     if (n < 8) {
       
   936         /* D0-D7 */
       
   937         env->dregs[n] = tmp;
       
   938     } else if (n < 8) {
       
   939         /* A0-A7 */
       
   940         env->aregs[n - 8] = tmp;
       
   941     } else {
       
   942         switch (n) {
       
   943         case 16: env->sr = tmp; break;
       
   944         case 17: env->pc = tmp; break;
       
   945         default: return 0;
       
   946         }
       
   947     }
       
   948     return 4;
       
   949 }
       
   950 #elif defined (TARGET_MIPS)
       
   951 
       
   952 #define NUM_CORE_REGS 73
       
   953 
       
   954 static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
       
   955 {
       
   956     if (n < 32) {
       
   957         GET_REGL(env->active_tc.gpr[n]);
       
   958     }
       
   959     if (env->CP0_Config1 & (1 << CP0C1_FP)) {
       
   960         if (n >= 38 && n < 70) {
       
   961             if (env->CP0_Status & (1 << CP0St_FR))
       
   962 		GET_REGL(env->active_fpu.fpr[n - 38].d);
       
   963             else
       
   964 		GET_REGL(env->active_fpu.fpr[n - 38].w[FP_ENDIAN_IDX]);
       
   965         }
       
   966         switch (n) {
       
   967         case 70: GET_REGL((int32_t)env->active_fpu.fcr31);
       
   968         case 71: GET_REGL((int32_t)env->active_fpu.fcr0);
       
   969         }
       
   970     }
       
   971     switch (n) {
       
   972     case 32: GET_REGL((int32_t)env->CP0_Status);
       
   973     case 33: GET_REGL(env->active_tc.LO[0]);
       
   974     case 34: GET_REGL(env->active_tc.HI[0]);
       
   975     case 35: GET_REGL(env->CP0_BadVAddr);
       
   976     case 36: GET_REGL((int32_t)env->CP0_Cause);
       
   977     case 37: GET_REGL(env->active_tc.PC);
       
   978     case 72: GET_REGL(0); /* fp */
       
   979     case 89: GET_REGL((int32_t)env->CP0_PRid);
       
   980     }
       
   981     if (n >= 73 && n <= 88) {
       
   982 	/* 16 embedded regs.  */
       
   983 	GET_REGL(0);
       
   984     }
       
   985 
       
   986     return 0;
       
   987 }
       
   988 
       
   989 /* convert MIPS rounding mode in FCR31 to IEEE library */
       
   990 static unsigned int ieee_rm[] =
       
   991   {
       
   992     float_round_nearest_even,
       
   993     float_round_to_zero,
       
   994     float_round_up,
       
   995     float_round_down
       
   996   };
       
   997 #define RESTORE_ROUNDING_MODE \
       
   998     set_float_rounding_mode(ieee_rm[env->active_fpu.fcr31 & 3], &env->active_fpu.fp_status)
       
   999 
       
  1000 static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
       
  1001 {
       
  1002     target_ulong tmp;
       
  1003 
       
  1004     tmp = ldtul_p(mem_buf);
       
  1005 
       
  1006     if (n < 32) {
       
  1007         env->active_tc.gpr[n] = tmp;
       
  1008         return sizeof(target_ulong);
       
  1009     }
       
  1010     if (env->CP0_Config1 & (1 << CP0C1_FP)
       
  1011             && n >= 38 && n < 73) {
       
  1012         if (n < 70) {
       
  1013             if (env->CP0_Status & (1 << CP0St_FR))
       
  1014               env->active_fpu.fpr[n - 38].d = tmp;
       
  1015             else
       
  1016               env->active_fpu.fpr[n - 38].w[FP_ENDIAN_IDX] = tmp;
       
  1017         }
       
  1018         switch (n) {
       
  1019         case 70:
       
  1020             env->active_fpu.fcr31 = tmp & 0xFF83FFFF;
       
  1021             /* set rounding mode */
       
  1022             RESTORE_ROUNDING_MODE;
       
  1023 #ifndef CONFIG_SOFTFLOAT
       
  1024             /* no floating point exception for native float */
       
  1025             SET_FP_ENABLE(env->active_fpu.fcr31, 0);
       
  1026 #endif
       
  1027             break;
       
  1028         case 71: env->active_fpu.fcr0 = tmp; break;
       
  1029         }
       
  1030         return sizeof(target_ulong);
       
  1031     }
       
  1032     switch (n) {
       
  1033     case 32: env->CP0_Status = tmp; break;
       
  1034     case 33: env->active_tc.LO[0] = tmp; break;
       
  1035     case 34: env->active_tc.HI[0] = tmp; break;
       
  1036     case 35: env->CP0_BadVAddr = tmp; break;
       
  1037     case 36: env->CP0_Cause = tmp; break;
       
  1038     case 37: env->active_tc.PC = tmp; break;
       
  1039     case 72: /* fp, ignored */ break;
       
  1040     default: 
       
  1041 	if (n > 89)
       
  1042 	    return 0;
       
  1043 	/* Other registers are readonly.  Ignore writes.  */
       
  1044 	break;
       
  1045     }
       
  1046 
       
  1047     return sizeof(target_ulong);
       
  1048 }
       
  1049 #elif defined (TARGET_SH4)
       
  1050 
       
  1051 /* Hint: Use "set architecture sh4" in GDB to see fpu registers */
       
  1052 /* FIXME: We should use XML for this.  */
       
  1053 
       
  1054 #define NUM_CORE_REGS 59
       
  1055 
       
  1056 static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
       
  1057 {
       
  1058     if (n < 8) {
       
  1059         if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) {
       
  1060             GET_REGL(env->gregs[n + 16]);
       
  1061         } else {
       
  1062             GET_REGL(env->gregs[n]);
       
  1063         }
       
  1064     } else if (n < 16) {
       
  1065         GET_REGL(env->gregs[n - 8]);
       
  1066     } else if (n >= 25 && n < 41) {
       
  1067 	GET_REGL(env->fregs[(n - 25) + ((env->fpscr & FPSCR_FR) ? 16 : 0)]);
       
  1068     } else if (n >= 43 && n < 51) {
       
  1069 	GET_REGL(env->gregs[n - 43]);
       
  1070     } else if (n >= 51 && n < 59) {
       
  1071 	GET_REGL(env->gregs[n - (51 - 16)]);
       
  1072     }
       
  1073     switch (n) {
       
  1074     case 16: GET_REGL(env->pc);
       
  1075     case 17: GET_REGL(env->pr);
       
  1076     case 18: GET_REGL(env->gbr);
       
  1077     case 19: GET_REGL(env->vbr);
       
  1078     case 20: GET_REGL(env->mach);
       
  1079     case 21: GET_REGL(env->macl);
       
  1080     case 22: GET_REGL(env->sr);
       
  1081     case 23: GET_REGL(env->fpul);
       
  1082     case 24: GET_REGL(env->fpscr);
       
  1083     case 41: GET_REGL(env->ssr);
       
  1084     case 42: GET_REGL(env->spc);
       
  1085     }
       
  1086 
       
  1087     return 0;
       
  1088 }
       
  1089 
       
  1090 static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
       
  1091 {
       
  1092     uint32_t tmp;
       
  1093 
       
  1094     tmp = ldl_p(mem_buf);
       
  1095 
       
  1096     if (n < 8) {
       
  1097         if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) {
       
  1098             env->gregs[n + 16] = tmp;
       
  1099         } else {
       
  1100             env->gregs[n] = tmp;
       
  1101         }
       
  1102 	return 4;
       
  1103     } else if (n < 16) {
       
  1104         env->gregs[n - 8] = tmp;
       
  1105 	return 4;
       
  1106     } else if (n >= 25 && n < 41) {
       
  1107 	env->fregs[(n - 25) + ((env->fpscr & FPSCR_FR) ? 16 : 0)] = tmp;
       
  1108     } else if (n >= 43 && n < 51) {
       
  1109 	env->gregs[n - 43] = tmp;
       
  1110 	return 4;
       
  1111     } else if (n >= 51 && n < 59) {
       
  1112 	env->gregs[n - (51 - 16)] = tmp;
       
  1113 	return 4;
       
  1114     }
       
  1115     switch (n) {
       
  1116     case 16: env->pc = tmp;
       
  1117     case 17: env->pr = tmp;
       
  1118     case 18: env->gbr = tmp;
       
  1119     case 19: env->vbr = tmp;
       
  1120     case 20: env->mach = tmp;
       
  1121     case 21: env->macl = tmp;
       
  1122     case 22: env->sr = tmp;
       
  1123     case 23: env->fpul = tmp;
       
  1124     case 24: env->fpscr = tmp;
       
  1125     case 41: env->ssr = tmp;
       
  1126     case 42: env->spc = tmp;
       
  1127     default: return 0;
       
  1128     }
       
  1129 
       
  1130     return 4;
       
  1131 }
       
  1132 #elif defined (TARGET_CRIS)
       
  1133 
       
  1134 #define NUM_CORE_REGS 49
       
  1135 
       
  1136 static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
       
  1137 {
       
  1138     uint8_t srs;
       
  1139 
       
  1140     srs = env->pregs[PR_SRS];
       
  1141     if (n < 16) {
       
  1142 	GET_REG32(env->regs[n]);
       
  1143     }
       
  1144 
       
  1145     if (n >= 21 && n < 32) {
       
  1146 	GET_REG32(env->pregs[n - 16]);
       
  1147     }
       
  1148     if (n >= 33 && n < 49) {
       
  1149 	GET_REG32(env->sregs[srs][n - 33]);
       
  1150     }
       
  1151     switch (n) {
       
  1152     case 16: GET_REG8(env->pregs[0]);
       
  1153     case 17: GET_REG8(env->pregs[1]);
       
  1154     case 18: GET_REG32(env->pregs[2]);
       
  1155     case 19: GET_REG8(srs);
       
  1156     case 20: GET_REG16(env->pregs[4]);
       
  1157     case 32: GET_REG32(env->pc);
       
  1158     }
       
  1159 
       
  1160     return 0;
       
  1161 }
       
  1162 
       
  1163 static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
       
  1164 {
       
  1165     uint32_t tmp;
       
  1166 
       
  1167     if (n > 49)
       
  1168 	return 0;
       
  1169 
       
  1170     tmp = ldl_p(mem_buf);
       
  1171 
       
  1172     if (n < 16) {
       
  1173 	env->regs[n] = tmp;
       
  1174     }
       
  1175 
       
  1176     if (n >= 21 && n < 32) {
       
  1177 	env->pregs[n - 16] = tmp;
       
  1178     }
       
  1179 
       
  1180     /* FIXME: Should support function regs be writable?  */
       
  1181     switch (n) {
       
  1182     case 16: return 1;
       
  1183     case 17: return 1;
       
  1184     case 18: env->pregs[PR_PID] = tmp; break;
       
  1185     case 19: return 1;
       
  1186     case 20: return 2;
       
  1187     case 32: env->pc = tmp; break;
       
  1188     }
       
  1189 
       
  1190     return 4;
       
  1191 }
       
  1192 #elif defined (TARGET_ALPHA)
       
  1193 
       
  1194 #define NUM_CORE_REGS 65
       
  1195 
       
  1196 static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
       
  1197 {
       
  1198     if (n < 31) {
       
  1199        GET_REGL(env->ir[n]);
       
  1200     }
       
  1201     else if (n == 31) {
       
  1202        GET_REGL(0);
       
  1203     }
       
  1204     else if (n<63) {
       
  1205        uint64_t val;
       
  1206 
       
  1207        val=*((uint64_t *)&env->fir[n-32]);
       
  1208        GET_REGL(val);
       
  1209     }
       
  1210     else if (n==63) {
       
  1211        GET_REGL(env->fpcr);
       
  1212     }
       
  1213     else if (n==64) {
       
  1214        GET_REGL(env->pc);
       
  1215     }
       
  1216     else {
       
  1217        GET_REGL(0);
       
  1218     }
       
  1219 
       
  1220     return 0;
       
  1221 }
       
  1222 
       
  1223 static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
       
  1224 {
       
  1225     target_ulong tmp;
       
  1226     tmp = ldtul_p(mem_buf);
       
  1227 
       
  1228     if (n < 31) {
       
  1229         env->ir[n] = tmp;
       
  1230     }
       
  1231 
       
  1232     if (n > 31 && n < 63) {
       
  1233         env->fir[n - 32] = ldfl_p(mem_buf);
       
  1234     }
       
  1235 
       
  1236     if (n == 64 ) {
       
  1237        env->pc=tmp;
       
  1238     }
       
  1239 
       
  1240     return 8;
       
  1241 }
       
  1242 #else
       
  1243 
       
  1244 #define NUM_CORE_REGS 0
       
  1245 
       
  1246 static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
       
  1247 {
       
  1248     return 0;
       
  1249 }
       
  1250 
       
  1251 static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
       
  1252 {
       
  1253     return 0;
       
  1254 }
       
  1255 
       
  1256 #endif
       
  1257 
       
  1258 static int num_g_regs = NUM_CORE_REGS;
       
  1259 
       
  1260 #ifdef GDB_CORE_XML
       
  1261 /* Encode data using the encoding for 'x' packets.  */
       
  1262 static int memtox(char *buf, const char *mem, int len)
       
  1263 {
       
  1264     char *p = buf;
       
  1265     char c;
       
  1266 
       
  1267     while (len--) {
       
  1268         c = *(mem++);
       
  1269         switch (c) {
       
  1270         case '#': case '$': case '*': case '}':
       
  1271             *(p++) = '}';
       
  1272             *(p++) = c ^ 0x20;
       
  1273             break;
       
  1274         default:
       
  1275             *(p++) = c;
       
  1276             break;
       
  1277         }
       
  1278     }
       
  1279     return p - buf;
       
  1280 }
       
  1281 
       
  1282 static const char *get_feature_xml(const char *p, const char **newp)
       
  1283 {
       
  1284     extern const char *const xml_builtin[][2];
       
  1285     size_t len;
       
  1286     int i;
       
  1287     const char *name;
       
  1288     static char target_xml[1024];
       
  1289 
       
  1290     len = 0;
       
  1291     while (p[len] && p[len] != ':')
       
  1292         len++;
       
  1293     *newp = p + len;
       
  1294 
       
  1295     name = NULL;
       
  1296     if (strncmp(p, "target.xml", len) == 0) {
       
  1297         /* Generate the XML description for this CPU.  */
       
  1298         if (!target_xml[0]) {
       
  1299             GDBRegisterState *r;
       
  1300 
       
  1301             snprintf(target_xml, sizeof(target_xml),
       
  1302                      "<?xml version=\"1.0\"?>"
       
  1303                      "<!DOCTYPE target SYSTEM \"gdb-target.dtd\">"
       
  1304                      "<target>"
       
  1305                      "<xi:include href=\"%s\"/>",
       
  1306                      GDB_CORE_XML);
       
  1307 
       
  1308             for (r = first_cpu->gdb_regs; r; r = r->next) {
       
  1309                 strcat(target_xml, "<xi:include href=\"");
       
  1310                 strcat(target_xml, r->xml);
       
  1311                 strcat(target_xml, "\"/>");
       
  1312             }
       
  1313             strcat(target_xml, "</target>");
       
  1314         }
       
  1315         return target_xml;
       
  1316     }
       
  1317     for (i = 0; ; i++) {
       
  1318         name = xml_builtin[i][0];
       
  1319         if (!name || (strncmp(name, p, len) == 0 && strlen(name) == len))
       
  1320             break;
       
  1321     }
       
  1322     return name ? xml_builtin[i][1] : NULL;
       
  1323 }
       
  1324 #endif
       
  1325 
       
  1326 static int gdb_read_register(CPUState *env, uint8_t *mem_buf, int reg)
       
  1327 {
       
  1328     GDBRegisterState *r;
       
  1329 
       
  1330     if (reg < NUM_CORE_REGS)
       
  1331         return cpu_gdb_read_register(env, mem_buf, reg);
       
  1332 
       
  1333     for (r = env->gdb_regs; r; r = r->next) {
       
  1334         if (r->base_reg <= reg && reg < r->base_reg + r->num_regs) {
       
  1335             return r->get_reg(env, mem_buf, reg - r->base_reg);
       
  1336         }
       
  1337     }
       
  1338     return 0;
       
  1339 }
       
  1340 
       
  1341 static int gdb_write_register(CPUState *env, uint8_t *mem_buf, int reg)
       
  1342 {
       
  1343     GDBRegisterState *r;
       
  1344 
       
  1345     if (reg < NUM_CORE_REGS)
       
  1346         return cpu_gdb_write_register(env, mem_buf, reg);
       
  1347 
       
  1348     for (r = env->gdb_regs; r; r = r->next) {
       
  1349         if (r->base_reg <= reg && reg < r->base_reg + r->num_regs) {
       
  1350             return r->set_reg(env, mem_buf, reg - r->base_reg);
       
  1351         }
       
  1352     }
       
  1353     return 0;
       
  1354 }
       
  1355 
       
  1356 /* Register a supplemental set of CPU registers.  If g_pos is nonzero it
       
  1357    specifies the first register number and these registers are included in
       
  1358    a standard "g" packet.  Direction is relative to gdb, i.e. get_reg is
       
  1359    gdb reading a CPU register, and set_reg is gdb modifying a CPU register.
       
  1360  */
       
  1361 
       
  1362 void gdb_register_coprocessor(CPUState * env,
       
  1363                              gdb_reg_cb get_reg, gdb_reg_cb set_reg,
       
  1364                              int num_regs, const char *xml, int g_pos)
       
  1365 {
       
  1366     GDBRegisterState *s;
       
  1367     GDBRegisterState **p;
       
  1368     static int last_reg = NUM_CORE_REGS;
       
  1369 
       
  1370     s = (GDBRegisterState *)qemu_mallocz(sizeof(GDBRegisterState));
       
  1371     s->base_reg = last_reg;
       
  1372     s->num_regs = num_regs;
       
  1373     s->get_reg = get_reg;
       
  1374     s->set_reg = set_reg;
       
  1375     s->xml = xml;
       
  1376     p = &env->gdb_regs;
       
  1377     while (*p) {
       
  1378         /* Check for duplicates.  */
       
  1379         if (strcmp((*p)->xml, xml) == 0)
       
  1380             return;
       
  1381         p = &(*p)->next;
       
  1382     }
       
  1383     /* Add to end of list.  */
       
  1384     last_reg += num_regs;
       
  1385     *p = s;
       
  1386     if (g_pos) {
       
  1387         if (g_pos != s->base_reg) {
       
  1388             fprintf(stderr, "Error: Bad gdb register numbering for '%s'\n"
       
  1389                     "Expected %d got %d\n", xml, g_pos, s->base_reg);
       
  1390         } else {
       
  1391             num_g_regs = last_reg;
       
  1392         }
       
  1393     }
       
  1394 }
       
  1395 
       
  1396 /* GDB breakpoint/watchpoint types */
       
  1397 #define GDB_BREAKPOINT_SW        0
       
  1398 #define GDB_BREAKPOINT_HW        1
       
  1399 #define GDB_WATCHPOINT_WRITE     2
       
  1400 #define GDB_WATCHPOINT_READ      3
       
  1401 #define GDB_WATCHPOINT_ACCESS    4
       
  1402 
       
  1403 #ifndef CONFIG_USER_ONLY
       
  1404 static const int xlat_gdb_type[] = {
       
  1405     [GDB_WATCHPOINT_WRITE]  = BP_GDB | BP_MEM_WRITE,
       
  1406     [GDB_WATCHPOINT_READ]   = BP_GDB | BP_MEM_READ,
       
  1407     [GDB_WATCHPOINT_ACCESS] = BP_GDB | BP_MEM_ACCESS,
       
  1408 };
       
  1409 #endif
       
  1410 
       
  1411 static int gdb_breakpoint_insert(target_ulong addr, target_ulong len, int type)
       
  1412 {
       
  1413     CPUState *env;
       
  1414     int err = 0;
       
  1415 
       
  1416     switch (type) {
       
  1417     case GDB_BREAKPOINT_SW:
       
  1418     case GDB_BREAKPOINT_HW:
       
  1419         for (env = first_cpu; env != NULL; env = env->next_cpu) {
       
  1420             err = cpu_breakpoint_insert(env, addr, BP_GDB, NULL);
       
  1421             if (err)
       
  1422                 break;
       
  1423         }
       
  1424         return err;
       
  1425 #ifndef CONFIG_USER_ONLY
       
  1426     case GDB_WATCHPOINT_WRITE:
       
  1427     case GDB_WATCHPOINT_READ:
       
  1428     case GDB_WATCHPOINT_ACCESS:
       
  1429         for (env = first_cpu; env != NULL; env = env->next_cpu) {
       
  1430             err = cpu_watchpoint_insert(env, addr, len, xlat_gdb_type[type],
       
  1431                                         NULL);
       
  1432             if (err)
       
  1433                 break;
       
  1434         }
       
  1435         return err;
       
  1436 #endif
       
  1437     default:
       
  1438         return -ENOSYS;
       
  1439     }
       
  1440 }
       
  1441 
       
  1442 static int gdb_breakpoint_remove(target_ulong addr, target_ulong len, int type)
       
  1443 {
       
  1444     CPUState *env;
       
  1445     int err = 0;
       
  1446 
       
  1447     switch (type) {
       
  1448     case GDB_BREAKPOINT_SW:
       
  1449     case GDB_BREAKPOINT_HW:
       
  1450         for (env = first_cpu; env != NULL; env = env->next_cpu) {
       
  1451             err = cpu_breakpoint_remove(env, addr, BP_GDB);
       
  1452             if (err)
       
  1453                 break;
       
  1454         }
       
  1455         return err;
       
  1456 #ifndef CONFIG_USER_ONLY
       
  1457     case GDB_WATCHPOINT_WRITE:
       
  1458     case GDB_WATCHPOINT_READ:
       
  1459     case GDB_WATCHPOINT_ACCESS:
       
  1460         for (env = first_cpu; env != NULL; env = env->next_cpu) {
       
  1461             err = cpu_watchpoint_remove(env, addr, len, xlat_gdb_type[type]);
       
  1462             if (err)
       
  1463                 break;
       
  1464         }
       
  1465         return err;
       
  1466 #endif
       
  1467     default:
       
  1468         return -ENOSYS;
       
  1469     }
       
  1470 }
       
  1471 
       
  1472 static void gdb_breakpoint_remove_all(void)
       
  1473 {
       
  1474     CPUState *env;
       
  1475 
       
  1476     for (env = first_cpu; env != NULL; env = env->next_cpu) {
       
  1477         cpu_breakpoint_remove_all(env, BP_GDB);
       
  1478 #ifndef CONFIG_USER_ONLY
       
  1479         cpu_watchpoint_remove_all(env, BP_GDB);
       
  1480 #endif
       
  1481     }
       
  1482 }
       
  1483 
       
  1484 static int gdb_handle_packet(GDBState *s, const char *line_buf)
       
  1485 {
       
  1486     CPUState *env;
       
  1487     const char *p;
       
  1488     int ch, reg_size, type, res, thread;
       
  1489     char buf[MAX_PACKET_LENGTH];
       
  1490     uint8_t mem_buf[MAX_PACKET_LENGTH];
       
  1491     uint8_t *registers;
       
  1492     target_ulong addr, len;
       
  1493 
       
  1494 #ifdef DEBUG_GDB
       
  1495     printf("command='%s'\n", line_buf);
       
  1496 #endif
       
  1497     p = line_buf;
       
  1498     ch = *p++;
       
  1499     switch(ch) {
       
  1500     case '?':
       
  1501         /* TODO: Make this return the correct value for user-mode.  */
       
  1502         snprintf(buf, sizeof(buf), "T%02xthread:%02x;", GDB_SIGNAL_TRAP,
       
  1503                  s->c_cpu->cpu_index+1);
       
  1504         put_packet(s, buf);
       
  1505         /* Remove all the breakpoints when this query is issued,
       
  1506          * because gdb is doing and initial connect and the state
       
  1507          * should be cleaned up.
       
  1508          */
       
  1509         gdb_breakpoint_remove_all();
       
  1510         break;
       
  1511     case 'c':
       
  1512         if (*p != '\0') {
       
  1513             addr = strtoull(p, (char **)&p, 16);
       
  1514 #if defined(TARGET_I386)
       
  1515             s->c_cpu->eip = addr;
       
  1516 #elif defined (TARGET_PPC)
       
  1517             s->c_cpu->nip = addr;
       
  1518 #elif defined (TARGET_SPARC)
       
  1519             s->c_cpu->pc = addr;
       
  1520             s->c_cpu->npc = addr + 4;
       
  1521 #elif defined (TARGET_ARM)
       
  1522             s->c_cpu->regs[15] = addr;
       
  1523 #elif defined (TARGET_SH4)
       
  1524             s->c_cpu->pc = addr;
       
  1525 #elif defined (TARGET_MIPS)
       
  1526             s->c_cpu->active_tc.PC = addr;
       
  1527 #elif defined (TARGET_CRIS)
       
  1528             s->c_cpu->pc = addr;
       
  1529 #elif defined (TARGET_ALPHA)
       
  1530             s->c_cpu->pc = addr;
       
  1531 #endif
       
  1532         }
       
  1533         s->signal = 0;
       
  1534         gdb_continue(s);
       
  1535 	return RS_IDLE;
       
  1536     case 'C':
       
  1537         s->signal = gdb_signal_to_target (strtoul(p, (char **)&p, 16));
       
  1538         if (s->signal == -1)
       
  1539             s->signal = 0;
       
  1540         gdb_continue(s);
       
  1541         return RS_IDLE;
       
  1542     case 'k':
       
  1543         /* Kill the target.  */
       
  1544         fprintf(stderr, "\nQEMU: Terminated via GDBstub\n");
       
  1545         exit(0);
       
  1546     case 'D':
       
  1547         /* Detach packet */
       
  1548         gdb_breakpoint_remove_all();
       
  1549         gdb_continue(s);
       
  1550         put_packet(s, "OK");
       
  1551         break;
       
  1552     case 's':
       
  1553         if (*p != '\0') {
       
  1554             addr = strtoull(p, (char **)&p, 16);
       
  1555 #if defined(TARGET_I386)
       
  1556             s->c_cpu->eip = addr;
       
  1557 #elif defined (TARGET_PPC)
       
  1558             s->c_cpu->nip = addr;
       
  1559 #elif defined (TARGET_SPARC)
       
  1560             s->c_cpu->pc = addr;
       
  1561             s->c_cpu->npc = addr + 4;
       
  1562 #elif defined (TARGET_ARM)
       
  1563             s->c_cpu->regs[15] = addr;
       
  1564 #elif defined (TARGET_SH4)
       
  1565             s->c_cpu->pc = addr;
       
  1566 #elif defined (TARGET_MIPS)
       
  1567             s->c_cpu->active_tc.PC = addr;
       
  1568 #elif defined (TARGET_CRIS)
       
  1569             s->c_cpu->pc = addr;
       
  1570 #elif defined (TARGET_ALPHA)
       
  1571             s->c_cpu->pc = addr;
       
  1572 #endif
       
  1573         }
       
  1574         cpu_single_step(s->c_cpu, sstep_flags);
       
  1575         gdb_continue(s);
       
  1576 	return RS_IDLE;
       
  1577     case 'F':
       
  1578         {
       
  1579             target_ulong ret;
       
  1580             target_ulong err;
       
  1581 
       
  1582             ret = strtoull(p, (char **)&p, 16);
       
  1583             if (*p == ',') {
       
  1584                 p++;
       
  1585                 err = strtoull(p, (char **)&p, 16);
       
  1586             } else {
       
  1587                 err = 0;
       
  1588             }
       
  1589             if (*p == ',')
       
  1590                 p++;
       
  1591             type = *p;
       
  1592             if (gdb_current_syscall_cb)
       
  1593                 gdb_current_syscall_cb(s->c_cpu, ret, err);
       
  1594             if (type == 'C') {
       
  1595                 put_packet(s, "T02");
       
  1596             } else {
       
  1597                 gdb_continue(s);
       
  1598             }
       
  1599         }
       
  1600         break;
       
  1601     case 'g':
       
  1602         len = 0;
       
  1603         for (addr = 0; addr < num_g_regs; addr++) {
       
  1604             reg_size = gdb_read_register(s->g_cpu, mem_buf + len, addr);
       
  1605             len += reg_size;
       
  1606         }
       
  1607         memtohex(buf, mem_buf, len);
       
  1608         put_packet(s, buf);
       
  1609         break;
       
  1610     case 'G':
       
  1611         registers = mem_buf;
       
  1612         len = strlen(p) / 2;
       
  1613         hextomem((uint8_t *)registers, p, len);
       
  1614         for (addr = 0; addr < num_g_regs && len > 0; addr++) {
       
  1615             reg_size = gdb_write_register(s->g_cpu, registers, addr);
       
  1616             len -= reg_size;
       
  1617             registers += reg_size;
       
  1618         }
       
  1619         put_packet(s, "OK");
       
  1620         break;
       
  1621     case 'm':
       
  1622         addr = strtoull(p, (char **)&p, 16);
       
  1623         if (*p == ',')
       
  1624             p++;
       
  1625         len = strtoull(p, NULL, 16);
       
  1626         if (cpu_memory_rw_debug(s->g_cpu, addr, mem_buf, len, 0) != 0) {
       
  1627             put_packet (s, "E14");
       
  1628         } else {
       
  1629             memtohex(buf, mem_buf, len);
       
  1630             put_packet(s, buf);
       
  1631         }
       
  1632         break;
       
  1633     case 'M':
       
  1634         addr = strtoull(p, (char **)&p, 16);
       
  1635         if (*p == ',')
       
  1636             p++;
       
  1637         len = strtoull(p, (char **)&p, 16);
       
  1638         if (*p == ':')
       
  1639             p++;
       
  1640         hextomem(mem_buf, p, len);
       
  1641         if (cpu_memory_rw_debug(s->g_cpu, addr, mem_buf, len, 1) != 0)
       
  1642             put_packet(s, "E14");
       
  1643         else
       
  1644             put_packet(s, "OK");
       
  1645         break;
       
  1646     case 'p':
       
  1647         /* Older gdb are really dumb, and don't use 'g' if 'p' is avaialable.
       
  1648            This works, but can be very slow.  Anything new enough to
       
  1649            understand XML also knows how to use this properly.  */
       
  1650         if (!gdb_has_xml)
       
  1651             goto unknown_command;
       
  1652         addr = strtoull(p, (char **)&p, 16);
       
  1653         reg_size = gdb_read_register(s->g_cpu, mem_buf, addr);
       
  1654         if (reg_size) {
       
  1655             memtohex(buf, mem_buf, reg_size);
       
  1656             put_packet(s, buf);
       
  1657         } else {
       
  1658             put_packet(s, "E14");
       
  1659         }
       
  1660         break;
       
  1661     case 'P':
       
  1662         if (!gdb_has_xml)
       
  1663             goto unknown_command;
       
  1664         addr = strtoull(p, (char **)&p, 16);
       
  1665         if (*p == '=')
       
  1666             p++;
       
  1667         reg_size = strlen(p) / 2;
       
  1668         hextomem(mem_buf, p, reg_size);
       
  1669         gdb_write_register(s->g_cpu, mem_buf, addr);
       
  1670         put_packet(s, "OK");
       
  1671         break;
       
  1672     case 'Z':
       
  1673     case 'z':
       
  1674         type = strtoul(p, (char **)&p, 16);
       
  1675         if (*p == ',')
       
  1676             p++;
       
  1677         addr = strtoull(p, (char **)&p, 16);
       
  1678         if (*p == ',')
       
  1679             p++;
       
  1680         len = strtoull(p, (char **)&p, 16);
       
  1681         if (ch == 'Z')
       
  1682             res = gdb_breakpoint_insert(addr, len, type);
       
  1683         else
       
  1684             res = gdb_breakpoint_remove(addr, len, type);
       
  1685         if (res >= 0)
       
  1686              put_packet(s, "OK");
       
  1687         else if (res == -ENOSYS)
       
  1688             put_packet(s, "");
       
  1689         else
       
  1690             put_packet(s, "E22");
       
  1691         break;
       
  1692     case 'H':
       
  1693         type = *p++;
       
  1694         thread = strtoull(p, (char **)&p, 16);
       
  1695         if (thread == -1 || thread == 0) {
       
  1696             put_packet(s, "OK");
       
  1697             break;
       
  1698         }
       
  1699         for (env = first_cpu; env != NULL; env = env->next_cpu)
       
  1700             if (env->cpu_index + 1 == thread)
       
  1701                 break;
       
  1702         if (env == NULL) {
       
  1703             put_packet(s, "E22");
       
  1704             break;
       
  1705         }
       
  1706         switch (type) {
       
  1707         case 'c':
       
  1708             s->c_cpu = env;
       
  1709             put_packet(s, "OK");
       
  1710             break;
       
  1711         case 'g':
       
  1712             s->g_cpu = env;
       
  1713             put_packet(s, "OK");
       
  1714             break;
       
  1715         default:
       
  1716              put_packet(s, "E22");
       
  1717              break;
       
  1718         }
       
  1719         break;
       
  1720     case 'T':
       
  1721         thread = strtoull(p, (char **)&p, 16);
       
  1722 #ifndef CONFIG_USER_ONLY
       
  1723         if (thread > 0 && thread < smp_cpus + 1)
       
  1724 #else
       
  1725         if (thread == 1)
       
  1726 #endif
       
  1727              put_packet(s, "OK");
       
  1728         else
       
  1729             put_packet(s, "E22");
       
  1730         break;
       
  1731     case 'q':
       
  1732         /* FIXME: Most Q packaets are broken.  */
       
  1733     case 'Q':
       
  1734         /* parse any 'q' packets here */
       
  1735         if (!strcmp(p,"qemu.sstepbits")) {
       
  1736             /* Query Breakpoint bit definitions */
       
  1737             snprintf(buf, sizeof(buf), "ENABLE=%x,NOIRQ=%x,NOTIMER=%x",
       
  1738                      SSTEP_ENABLE,
       
  1739                      SSTEP_NOIRQ,
       
  1740                      SSTEP_NOTIMER);
       
  1741             put_packet(s, buf);
       
  1742             break;
       
  1743         } else if (strncmp(p,"qemu.sstep",10) == 0) {
       
  1744             /* Display or change the sstep_flags */
       
  1745             p += 10;
       
  1746             if (*p != '=') {
       
  1747                 /* Display current setting */
       
  1748                 snprintf(buf, sizeof(buf), "0x%x", sstep_flags);
       
  1749                 put_packet(s, buf);
       
  1750                 break;
       
  1751             }
       
  1752             p++;
       
  1753             type = strtoul(p, (char **)&p, 16);
       
  1754             sstep_flags = type;
       
  1755             put_packet(s, "OK");
       
  1756             break;
       
  1757         } else if (strcmp(p,"C") == 0) {
       
  1758             /* "Current thread" remains vague in the spec, so always return
       
  1759              *  the first CPU (gdb returns the first thread). */
       
  1760             put_packet(s, "QC1");
       
  1761             break;
       
  1762         } else if (strcmp(p,"fThreadInfo") == 0) {
       
  1763             s->query_cpu = first_cpu;
       
  1764             goto report_cpuinfo;
       
  1765         } else if (strcmp(p,"sThreadInfo") == 0) {
       
  1766         report_cpuinfo:
       
  1767             if (s->query_cpu) {
       
  1768                 snprintf(buf, sizeof(buf), "m%x", s->query_cpu->cpu_index+1);
       
  1769                 put_packet(s, buf);
       
  1770                 s->query_cpu = s->query_cpu->next_cpu;
       
  1771             } else
       
  1772                 put_packet(s, "l");
       
  1773             break;
       
  1774         } else if (strncmp(p,"ThreadExtraInfo,", 16) == 0) {
       
  1775             thread = strtoull(p+16, (char **)&p, 16);
       
  1776             for (env = first_cpu; env != NULL; env = env->next_cpu)
       
  1777                 if (env->cpu_index + 1 == thread) {
       
  1778                     len = snprintf((char *)mem_buf, sizeof(mem_buf),
       
  1779                                    "CPU#%d [%s]", env->cpu_index,
       
  1780                                    env->halted ? "halted " : "running");
       
  1781                     memtohex(buf, mem_buf, len);
       
  1782                     put_packet(s, buf);
       
  1783                     break;
       
  1784                 }
       
  1785             break;
       
  1786         }
       
  1787 #ifdef CONFIG_LINUX_USER
       
  1788         if (strncmp(p, "Offsets", 7) == 0) {
       
  1789             TaskState *ts = s->c_cpu->opaque;
       
  1790 
       
  1791             snprintf(buf, sizeof(buf),
       
  1792                      "Text=" TARGET_ABI_FMT_lx ";Data=" TARGET_ABI_FMT_lx
       
  1793                      ";Bss=" TARGET_ABI_FMT_lx,
       
  1794                      ts->info->code_offset,
       
  1795                      ts->info->data_offset,
       
  1796                      ts->info->data_offset);
       
  1797             put_packet(s, buf);
       
  1798             break;
       
  1799         }
       
  1800 #endif
       
  1801         if (strncmp(p, "Supported", 9) == 0) {
       
  1802             snprintf(buf, sizeof(buf), "PacketSize=%x", MAX_PACKET_LENGTH);
       
  1803 #ifdef GDB_CORE_XML
       
  1804             strcat(buf, ";qXfer:features:read+");
       
  1805 #endif
       
  1806             put_packet(s, buf);
       
  1807             break;
       
  1808         }
       
  1809 #ifdef GDB_CORE_XML
       
  1810         if (strncmp(p, "Xfer:features:read:", 19) == 0) {
       
  1811             const char *xml;
       
  1812             target_ulong total_len;
       
  1813 
       
  1814             gdb_has_xml = 1;
       
  1815             p += 19;
       
  1816             xml = get_feature_xml(p, &p);
       
  1817             if (!xml) {
       
  1818                 snprintf(buf, sizeof(buf), "E00");
       
  1819                 put_packet(s, buf);
       
  1820                 break;
       
  1821             }
       
  1822 
       
  1823             if (*p == ':')
       
  1824                 p++;
       
  1825             addr = strtoul(p, (char **)&p, 16);
       
  1826             if (*p == ',')
       
  1827                 p++;
       
  1828             len = strtoul(p, (char **)&p, 16);
       
  1829 
       
  1830             total_len = strlen(xml);
       
  1831             if (addr > total_len) {
       
  1832                 snprintf(buf, sizeof(buf), "E00");
       
  1833                 put_packet(s, buf);
       
  1834                 break;
       
  1835             }
       
  1836             if (len > (MAX_PACKET_LENGTH - 5) / 2)
       
  1837                 len = (MAX_PACKET_LENGTH - 5) / 2;
       
  1838             if (len < total_len - addr) {
       
  1839                 buf[0] = 'm';
       
  1840                 len = memtox(buf + 1, xml + addr, len);
       
  1841             } else {
       
  1842                 buf[0] = 'l';
       
  1843                 len = memtox(buf + 1, xml + addr, total_len - addr);
       
  1844             }
       
  1845             put_packet_binary(s, buf, len + 1);
       
  1846             break;
       
  1847         }
       
  1848 #endif
       
  1849         /* Unrecognised 'q' command.  */
       
  1850         goto unknown_command;
       
  1851 
       
  1852     default:
       
  1853     unknown_command:
       
  1854         /* put empty packet */
       
  1855         buf[0] = '\0';
       
  1856         put_packet(s, buf);
       
  1857         break;
       
  1858     }
       
  1859     return RS_IDLE;
       
  1860 }
       
  1861 
       
  1862 void gdb_set_stop_cpu(CPUState *env)
       
  1863 {
       
  1864     gdbserver_state->c_cpu = env;
       
  1865     gdbserver_state->g_cpu = env;
       
  1866 }
       
  1867 
       
  1868 #ifndef CONFIG_USER_ONLY
       
  1869 static void gdb_vm_stopped(void *opaque, int reason)
       
  1870 {
       
  1871     GDBState *s = gdbserver_state;
       
  1872     CPUState *env = s->c_cpu;
       
  1873     char buf[256];
       
  1874     const char *type;
       
  1875     int ret;
       
  1876 
       
  1877     if (s->state == RS_SYSCALL)
       
  1878         return;
       
  1879 
       
  1880     /* disable single step if it was enable */
       
  1881     cpu_single_step(env, 0);
       
  1882 
       
  1883     if (reason == EXCP_DEBUG) {
       
  1884         if (env->watchpoint_hit) {
       
  1885             switch (env->watchpoint_hit->flags & BP_MEM_ACCESS) {
       
  1886             case BP_MEM_READ:
       
  1887                 type = "r";
       
  1888                 break;
       
  1889             case BP_MEM_ACCESS:
       
  1890                 type = "a";
       
  1891                 break;
       
  1892             default:
       
  1893                 type = "";
       
  1894                 break;
       
  1895             }
       
  1896             snprintf(buf, sizeof(buf),
       
  1897                      "T%02xthread:%02x;%swatch:" TARGET_FMT_lx ";",
       
  1898                      GDB_SIGNAL_TRAP, env->cpu_index+1, type,
       
  1899                      env->watchpoint_hit->vaddr);
       
  1900             put_packet(s, buf);
       
  1901             env->watchpoint_hit = NULL;
       
  1902             return;
       
  1903         }
       
  1904 	tb_flush(env);
       
  1905         ret = GDB_SIGNAL_TRAP;
       
  1906     } else if (reason == EXCP_INTERRUPT) {
       
  1907         ret = GDB_SIGNAL_INT;
       
  1908     } else {
       
  1909         ret = 0;
       
  1910     }
       
  1911     snprintf(buf, sizeof(buf), "T%02xthread:%02x;", ret, env->cpu_index+1);
       
  1912     put_packet(s, buf);
       
  1913 }
       
  1914 #endif
       
  1915 
       
  1916 /* Send a gdb syscall request.
       
  1917    This accepts limited printf-style format specifiers, specifically:
       
  1918     %x  - target_ulong argument printed in hex.
       
  1919     %lx - 64-bit argument printed in hex.
       
  1920     %s  - string pointer (target_ulong) and length (int) pair.  */
       
  1921 void gdb_do_syscall(gdb_syscall_complete_cb cb, const char *fmt, ...)
       
  1922 {
       
  1923     va_list va;
       
  1924     char buf[256];
       
  1925     char *p;
       
  1926     target_ulong addr;
       
  1927     uint64_t i64;
       
  1928     GDBState *s;
       
  1929 
       
  1930     s = gdbserver_state;
       
  1931     if (!s)
       
  1932         return;
       
  1933     gdb_current_syscall_cb = cb;
       
  1934     s->state = RS_SYSCALL;
       
  1935 #ifndef CONFIG_USER_ONLY
       
  1936     vm_stop(EXCP_DEBUG);
       
  1937 #endif
       
  1938     s->state = RS_IDLE;
       
  1939     va_start(va, fmt);
       
  1940     p = buf;
       
  1941     *(p++) = 'F';
       
  1942     while (*fmt) {
       
  1943         if (*fmt == '%') {
       
  1944             fmt++;
       
  1945             switch (*fmt++) {
       
  1946             case 'x':
       
  1947                 addr = va_arg(va, target_ulong);
       
  1948                 p += snprintf(p, &buf[sizeof(buf)] - p, TARGET_FMT_lx, addr);
       
  1949                 break;
       
  1950             case 'l':
       
  1951                 if (*(fmt++) != 'x')
       
  1952                     goto bad_format;
       
  1953                 i64 = va_arg(va, uint64_t);
       
  1954                 p += snprintf(p, &buf[sizeof(buf)] - p, "%" PRIx64, i64);
       
  1955                 break;
       
  1956             case 's':
       
  1957                 addr = va_arg(va, target_ulong);
       
  1958                 p += snprintf(p, &buf[sizeof(buf)] - p, TARGET_FMT_lx "/%x",
       
  1959                               addr, va_arg(va, int));
       
  1960                 break;
       
  1961             default:
       
  1962             bad_format:
       
  1963                 fprintf(stderr, "gdbstub: Bad syscall format string '%s'\n",
       
  1964                         fmt - 1);
       
  1965                 break;
       
  1966             }
       
  1967         } else {
       
  1968             *(p++) = *(fmt++);
       
  1969         }
       
  1970     }
       
  1971     *p = 0;
       
  1972     va_end(va);
       
  1973     put_packet(s, buf);
       
  1974 #ifdef CONFIG_USER_ONLY
       
  1975     gdb_handlesig(s->c_cpu, 0);
       
  1976 #else
       
  1977     cpu_interrupt(s->c_cpu, CPU_INTERRUPT_EXIT);
       
  1978 #endif
       
  1979 }
       
  1980 
       
  1981 static void gdb_read_byte(GDBState *s, int ch)
       
  1982 {
       
  1983     int i, csum;
       
  1984     uint8_t reply;
       
  1985 
       
  1986 #ifndef CONFIG_USER_ONLY
       
  1987     if (s->last_packet_len) {
       
  1988         /* Waiting for a response to the last packet.  If we see the start
       
  1989            of a new command then abandon the previous response.  */
       
  1990         if (ch == '-') {
       
  1991 #ifdef DEBUG_GDB
       
  1992             printf("Got NACK, retransmitting\n");
       
  1993 #endif
       
  1994             put_buffer(s, (uint8_t *)s->last_packet, s->last_packet_len);
       
  1995         }
       
  1996 #ifdef DEBUG_GDB
       
  1997         else if (ch == '+')
       
  1998             printf("Got ACK\n");
       
  1999         else
       
  2000             printf("Got '%c' when expecting ACK/NACK\n", ch);
       
  2001 #endif
       
  2002         if (ch == '+' || ch == '$')
       
  2003             s->last_packet_len = 0;
       
  2004         if (ch != '$')
       
  2005             return;
       
  2006     }
       
  2007     if (vm_running) {
       
  2008         /* when the CPU is running, we cannot do anything except stop
       
  2009            it when receiving a char */
       
  2010         vm_stop(EXCP_INTERRUPT);
       
  2011     } else
       
  2012 #endif
       
  2013     {
       
  2014         switch(s->state) {
       
  2015         case RS_IDLE:
       
  2016             if (ch == '$') {
       
  2017                 s->line_buf_index = 0;
       
  2018                 s->state = RS_GETLINE;
       
  2019             }
       
  2020             break;
       
  2021         case RS_GETLINE:
       
  2022             if (ch == '#') {
       
  2023             s->state = RS_CHKSUM1;
       
  2024             } else if (s->line_buf_index >= sizeof(s->line_buf) - 1) {
       
  2025                 s->state = RS_IDLE;
       
  2026             } else {
       
  2027             s->line_buf[s->line_buf_index++] = ch;
       
  2028             }
       
  2029             break;
       
  2030         case RS_CHKSUM1:
       
  2031             s->line_buf[s->line_buf_index] = '\0';
       
  2032             s->line_csum = fromhex(ch) << 4;
       
  2033             s->state = RS_CHKSUM2;
       
  2034             break;
       
  2035         case RS_CHKSUM2:
       
  2036             s->line_csum |= fromhex(ch);
       
  2037             csum = 0;
       
  2038             for(i = 0; i < s->line_buf_index; i++) {
       
  2039                 csum += s->line_buf[i];
       
  2040             }
       
  2041             if (s->line_csum != (csum & 0xff)) {
       
  2042                 reply = '-';
       
  2043                 put_buffer(s, &reply, 1);
       
  2044                 s->state = RS_IDLE;
       
  2045             } else {
       
  2046                 reply = '+';
       
  2047                 put_buffer(s, &reply, 1);
       
  2048                 s->state = gdb_handle_packet(s, s->line_buf);
       
  2049             }
       
  2050             break;
       
  2051         default:
       
  2052             abort();
       
  2053         }
       
  2054     }
       
  2055 }
       
  2056 
       
  2057 /* Tell the remote gdb that the process has exited.  */
       
  2058 void gdb_exit(CPUState *env, int code)
       
  2059 {
       
  2060   GDBState *s;
       
  2061   char buf[4];
       
  2062 
       
  2063   s = gdbserver_state;
       
  2064 #ifdef CONFIG_USER_ONLY
       
  2065   if (gdbserver_fd < 0 || s->fd < 0)
       
  2066     return;
       
  2067 #endif
       
  2068 
       
  2069   snprintf(buf, sizeof(buf), "W%02x", code);
       
  2070   put_packet(s, buf);
       
  2071 }
       
  2072 
       
  2073 #ifdef CONFIG_USER_ONLY
       
  2074 int
       
  2075 gdb_queuesig (void)
       
  2076 {
       
  2077     GDBState *s;
       
  2078 
       
  2079     s = gdbserver_state;
       
  2080 
       
  2081     if (gdbserver_fd < 0 || s->fd < 0)
       
  2082         return 0;
       
  2083     else
       
  2084         return 1;
       
  2085 }
       
  2086 
       
  2087 int
       
  2088 gdb_handlesig (CPUState *env, int sig)
       
  2089 {
       
  2090   GDBState *s;
       
  2091   char buf[256];
       
  2092   int n;
       
  2093 
       
  2094   if (gdb_wrapper) {
       
  2095       gdbserver_start (gdb_wrapper);
       
  2096       gdb_wrapper = 0;
       
  2097       sig = 0;
       
  2098   }
       
  2099 
       
  2100   s = gdbserver_state;
       
  2101 
       
  2102   if (gdbserver_fd < 0 || s->fd < 0)
       
  2103     return sig;
       
  2104 
       
  2105   /* disable single step if it was enabled */
       
  2106   cpu_single_step(env, 0);
       
  2107   tb_flush(env);
       
  2108 
       
  2109   if (sig != 0)
       
  2110     {
       
  2111       snprintf(buf, sizeof(buf), "S%02x", target_signal_to_gdb (sig));
       
  2112       put_packet(s, buf);
       
  2113     }
       
  2114 
       
  2115   /* put_packet() might have detected that the peer terminated the 
       
  2116      connection.  */
       
  2117   if (s->fd < 0)
       
  2118       return sig;
       
  2119 
       
  2120   sig = 0;
       
  2121   s->state = RS_IDLE;
       
  2122   s->running_state = 0;
       
  2123   while (s->running_state == 0) {
       
  2124       n = read (s->fd, buf, 256);
       
  2125       if (n > 0)
       
  2126         {
       
  2127           int i;
       
  2128 
       
  2129           for (i = 0; i < n; i++)
       
  2130             gdb_read_byte (s, buf[i]);
       
  2131         }
       
  2132       else if (n == 0 || errno != EAGAIN)
       
  2133         {
       
  2134           /* XXX: Connection closed.  Should probably wait for annother
       
  2135              connection before continuing.  */
       
  2136           return sig;
       
  2137         }
       
  2138   }
       
  2139   sig = s->signal;
       
  2140   s->signal = 0;
       
  2141   return sig;
       
  2142 }
       
  2143 
       
  2144 /* Tell the remote gdb that the process has exited due to SIG.  */
       
  2145 void gdb_signalled(CPUState *env, int sig)
       
  2146 {
       
  2147   GDBState *s;
       
  2148   char buf[4];
       
  2149 
       
  2150   s = gdbserver_state;
       
  2151   if (gdbserver_fd < 0 || s->fd < 0)
       
  2152     return;
       
  2153 
       
  2154   snprintf(buf, sizeof(buf), "X%02x", target_signal_to_gdb (sig));
       
  2155   put_packet(s, buf);
       
  2156 }
       
  2157 
       
  2158 static void gdb_accept(void)
       
  2159 {
       
  2160     GDBState *s;
       
  2161     struct sockaddr_in sockaddr;
       
  2162     socklen_t len;
       
  2163     int val, fd;
       
  2164 
       
  2165     for(;;) {
       
  2166         len = sizeof(sockaddr);
       
  2167         fd = accept(gdbserver_fd, (struct sockaddr *)&sockaddr, &len);
       
  2168         if (fd < 0 && errno != EINTR) {
       
  2169             perror("accept");
       
  2170             return;
       
  2171         } else if (fd >= 0) {
       
  2172             break;
       
  2173         }
       
  2174     }
       
  2175 
       
  2176     /* set short latency */
       
  2177     val = 1;
       
  2178     setsockopt(fd, IPPROTO_TCP, TCP_NODELAY, (char *)&val, sizeof(val));
       
  2179 
       
  2180     s = qemu_mallocz(sizeof(GDBState));
       
  2181     if (!s) {
       
  2182         errno = ENOMEM;
       
  2183         perror("accept");
       
  2184         return;
       
  2185     }
       
  2186 
       
  2187     memset (s, 0, sizeof (GDBState));
       
  2188     s->c_cpu = first_cpu;
       
  2189     s->g_cpu = first_cpu;
       
  2190     s->fd = fd;
       
  2191     gdb_has_xml = 0;
       
  2192 
       
  2193     gdbserver_state = s;
       
  2194 
       
  2195     fcntl(fd, F_SETFL, O_NONBLOCK);
       
  2196 }
       
  2197 
       
  2198 static int gdbserver_open(int port)
       
  2199 {
       
  2200     struct sockaddr_in sockaddr;
       
  2201     int fd, val, ret;
       
  2202 
       
  2203     fd = socket(PF_INET, SOCK_STREAM, 0);
       
  2204     if (fd < 0) {
       
  2205         perror("socket");
       
  2206         return -1;
       
  2207     }
       
  2208 
       
  2209     /* allow fast reuse */
       
  2210     val = 1;
       
  2211     setsockopt(fd, SOL_SOCKET, SO_REUSEADDR, (char *)&val, sizeof(val));
       
  2212 
       
  2213     sockaddr.sin_family = AF_INET;
       
  2214     sockaddr.sin_port = htons(port);
       
  2215     sockaddr.sin_addr.s_addr = 0;
       
  2216     ret = bind(fd, (struct sockaddr *)&sockaddr, sizeof(sockaddr));
       
  2217     if (ret < 0) {
       
  2218         perror("bind");
       
  2219         return -1;
       
  2220     }
       
  2221     ret = listen(fd, 0);
       
  2222     if (ret < 0) {
       
  2223         perror("listen");
       
  2224         return -1;
       
  2225     }
       
  2226     return fd;
       
  2227 }
       
  2228 
       
  2229 int gdbserver_start(int port)
       
  2230 {
       
  2231     gdbserver_fd = gdbserver_open(port);
       
  2232     if (gdbserver_fd < 0)
       
  2233         return -1;
       
  2234     /* accept connections */
       
  2235     gdb_accept();
       
  2236     return 0;
       
  2237 }
       
  2238 
       
  2239 /* Disable gdb stub for child processes.  */
       
  2240 void gdbserver_fork(CPUState *env)
       
  2241 {
       
  2242     GDBState *s = gdbserver_state;
       
  2243     if (s->fd < 0)
       
  2244       return;
       
  2245     close(s->fd);
       
  2246     s->fd = -1;
       
  2247     cpu_breakpoint_remove_all(env, BP_GDB);
       
  2248     cpu_watchpoint_remove_all(env, BP_GDB);
       
  2249 }
       
  2250 #else
       
  2251 static int gdb_chr_can_receive(void *opaque)
       
  2252 {
       
  2253   /* We can handle an arbitrarily large amount of data.
       
  2254    Pick the maximum packet size, which is as good as anything.  */
       
  2255   return MAX_PACKET_LENGTH;
       
  2256 }
       
  2257 
       
  2258 static void gdb_chr_receive(void *opaque, const uint8_t *buf, int size)
       
  2259 {
       
  2260     int i;
       
  2261 
       
  2262     for (i = 0; i < size; i++) {
       
  2263         gdb_read_byte(gdbserver_state, buf[i]);
       
  2264     }
       
  2265 }
       
  2266 
       
  2267 static void gdb_chr_event(void *opaque, int event)
       
  2268 {
       
  2269     switch (event) {
       
  2270     case CHR_EVENT_RESET:
       
  2271         vm_stop(EXCP_INTERRUPT);
       
  2272         gdb_has_xml = 0;
       
  2273         break;
       
  2274     default:
       
  2275         break;
       
  2276     }
       
  2277 }
       
  2278 
       
  2279 int gdbserver_start(const char *port)
       
  2280 {
       
  2281     GDBState *s;
       
  2282     char gdbstub_port_name[128];
       
  2283     int port_num;
       
  2284     char *p;
       
  2285     CharDriverState *chr;
       
  2286 
       
  2287     if (!port || !*port)
       
  2288       return -1;
       
  2289 
       
  2290     port_num = strtol(port, &p, 10);
       
  2291     if (*p == 0) {
       
  2292         /* A numeric value is interpreted as a port number.  */
       
  2293         snprintf(gdbstub_port_name, sizeof(gdbstub_port_name),
       
  2294                  "tcp::%d,nowait,nodelay,server", port_num);
       
  2295         port = gdbstub_port_name;
       
  2296     }
       
  2297 
       
  2298     chr = qemu_chr_open("gdb", port);
       
  2299     if (!chr)
       
  2300         return -1;
       
  2301 
       
  2302     s = qemu_mallocz(sizeof(GDBState));
       
  2303     if (!s) {
       
  2304         return -1;
       
  2305     }
       
  2306     s->c_cpu = first_cpu;
       
  2307     s->g_cpu = first_cpu;
       
  2308     s->chr = chr;
       
  2309     gdbserver_state = s;
       
  2310     qemu_chr_add_handlers(chr, gdb_chr_can_receive, gdb_chr_receive,
       
  2311                           gdb_chr_event, NULL);
       
  2312     qemu_add_vm_stop_handler(gdb_vm_stopped, NULL);
       
  2313     return 0;
       
  2314 }
       
  2315 #endif