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1 /* |
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2 * Calculate Error-correcting Codes. Used by NAND Flash controllers |
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3 * (not by NAND chips). |
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4 * |
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5 * Copyright (c) 2006 Openedhand Ltd. |
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6 * Written by Andrzej Zaborowski <balrog@zabor.org> |
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7 * |
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8 * This code is licensed under the GNU GPL v2. |
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9 */ |
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10 |
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11 #include "hw.h" |
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12 #include "flash.h" |
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13 |
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14 /* |
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15 * Pre-calculated 256-way 1 byte column parity. Table borrowed from Linux. |
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16 */ |
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17 static const uint8_t nand_ecc_precalc_table[] = { |
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18 0x00, 0x55, 0x56, 0x03, 0x59, 0x0c, 0x0f, 0x5a, |
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19 0x5a, 0x0f, 0x0c, 0x59, 0x03, 0x56, 0x55, 0x00, |
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20 0x65, 0x30, 0x33, 0x66, 0x3c, 0x69, 0x6a, 0x3f, |
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21 0x3f, 0x6a, 0x69, 0x3c, 0x66, 0x33, 0x30, 0x65, |
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22 0x66, 0x33, 0x30, 0x65, 0x3f, 0x6a, 0x69, 0x3c, |
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23 0x3c, 0x69, 0x6a, 0x3f, 0x65, 0x30, 0x33, 0x66, |
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24 0x03, 0x56, 0x55, 0x00, 0x5a, 0x0f, 0x0c, 0x59, |
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25 0x59, 0x0c, 0x0f, 0x5a, 0x00, 0x55, 0x56, 0x03, |
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26 0x69, 0x3c, 0x3f, 0x6a, 0x30, 0x65, 0x66, 0x33, |
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27 0x33, 0x66, 0x65, 0x30, 0x6a, 0x3f, 0x3c, 0x69, |
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28 0x0c, 0x59, 0x5a, 0x0f, 0x55, 0x00, 0x03, 0x56, |
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29 0x56, 0x03, 0x00, 0x55, 0x0f, 0x5a, 0x59, 0x0c, |
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30 0x0f, 0x5a, 0x59, 0x0c, 0x56, 0x03, 0x00, 0x55, |
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31 0x55, 0x00, 0x03, 0x56, 0x0c, 0x59, 0x5a, 0x0f, |
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32 0x6a, 0x3f, 0x3c, 0x69, 0x33, 0x66, 0x65, 0x30, |
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33 0x30, 0x65, 0x66, 0x33, 0x69, 0x3c, 0x3f, 0x6a, |
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34 0x6a, 0x3f, 0x3c, 0x69, 0x33, 0x66, 0x65, 0x30, |
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35 0x30, 0x65, 0x66, 0x33, 0x69, 0x3c, 0x3f, 0x6a, |
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36 0x0f, 0x5a, 0x59, 0x0c, 0x56, 0x03, 0x00, 0x55, |
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37 0x55, 0x00, 0x03, 0x56, 0x0c, 0x59, 0x5a, 0x0f, |
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38 0x0c, 0x59, 0x5a, 0x0f, 0x55, 0x00, 0x03, 0x56, |
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39 0x56, 0x03, 0x00, 0x55, 0x0f, 0x5a, 0x59, 0x0c, |
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40 0x69, 0x3c, 0x3f, 0x6a, 0x30, 0x65, 0x66, 0x33, |
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41 0x33, 0x66, 0x65, 0x30, 0x6a, 0x3f, 0x3c, 0x69, |
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42 0x03, 0x56, 0x55, 0x00, 0x5a, 0x0f, 0x0c, 0x59, |
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43 0x59, 0x0c, 0x0f, 0x5a, 0x00, 0x55, 0x56, 0x03, |
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44 0x66, 0x33, 0x30, 0x65, 0x3f, 0x6a, 0x69, 0x3c, |
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45 0x3c, 0x69, 0x6a, 0x3f, 0x65, 0x30, 0x33, 0x66, |
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46 0x65, 0x30, 0x33, 0x66, 0x3c, 0x69, 0x6a, 0x3f, |
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47 0x3f, 0x6a, 0x69, 0x3c, 0x66, 0x33, 0x30, 0x65, |
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48 0x00, 0x55, 0x56, 0x03, 0x59, 0x0c, 0x0f, 0x5a, |
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49 0x5a, 0x0f, 0x0c, 0x59, 0x03, 0x56, 0x55, 0x00, |
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50 }; |
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51 |
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52 /* Update ECC parity count. */ |
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53 uint8_t ecc_digest(struct ecc_state_s *s, uint8_t sample) |
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54 { |
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55 uint8_t idx = nand_ecc_precalc_table[sample]; |
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56 |
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57 s->cp ^= idx & 0x3f; |
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58 if (idx & 0x40) { |
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59 s->lp[0] ^= ~s->count; |
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60 s->lp[1] ^= s->count; |
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61 } |
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62 s->count ++; |
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63 |
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64 return sample; |
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65 } |
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66 |
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67 /* Reinitialise the counters. */ |
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68 void ecc_reset(struct ecc_state_s *s) |
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69 { |
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70 s->lp[0] = 0x0000; |
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71 s->lp[1] = 0x0000; |
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72 s->cp = 0x00; |
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73 s->count = 0; |
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74 } |
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75 |
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76 /* Save/restore */ |
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77 void ecc_put(QEMUFile *f, struct ecc_state_s *s) |
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78 { |
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79 qemu_put_8s(f, &s->cp); |
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80 qemu_put_be16s(f, &s->lp[0]); |
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81 qemu_put_be16s(f, &s->lp[1]); |
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82 qemu_put_be16s(f, &s->count); |
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83 } |
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84 |
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85 void ecc_get(QEMUFile *f, struct ecc_state_s *s) |
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86 { |
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87 qemu_get_8s(f, &s->cp); |
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88 qemu_get_be16s(f, &s->lp[0]); |
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89 qemu_get_be16s(f, &s->lp[1]); |
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90 qemu_get_be16s(f, &s->count); |
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91 } |