1 /*

     2  * QEMU/MIPS pseudo-board

     3  *

     4  * emulates a simple machine with ISA-like bus.

     5  * ISA IO space mapped to the 0x14000000 (PHYS) and

     6  * ISA memory at the 0x10000000 (PHYS, 16Mb in size).

     7  * All peripherial devices are attached to this "bus" with

     8  * the standard PC ISA addresses.

     9 */

    10 #include "hw.h"

    11 #include "mips.h"

    12 #include "pc.h"

    13 #include "isa.h"

    14 #include "net.h"

    15 #include "sysemu.h"

    16 #include "boards.h"

    17 #include "flash.h"

    18 #include "qemu-log.h"

    19 

    20 #ifdef TARGET_WORDS_BIGENDIAN

    21 #define BIOS_FILENAME "mips_bios.bin"

    22 #else

    23 #define BIOS_FILENAME "mipsel_bios.bin"

    24 #endif

    25 

    26 #define PHYS_TO_VIRT(x) ((x) | ~(target_ulong)0x7fffffff)

    27 

    28 #define VIRT_TO_PHYS_ADDEND (-((int64_t)(int32_t)0x80000000))

    29 

    30 #define MAX_IDE_BUS 2

    31 

    32 static const int ide_iobase[2] = { 0x1f0, 0x170 };

    33 static const int ide_iobase2[2] = { 0x3f6, 0x376 };

    34 static const int ide_irq[2] = { 14, 15 };

    35 

    36 static int serial_io[MAX_SERIAL_PORTS] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };

    37 static int serial_irq[MAX_SERIAL_PORTS] = { 4, 3, 4, 3 };

    38 

    39 static PITState *pit; /* PIT i8254 */

    40 

    41 /* i8254 PIT is attached to the IRQ0 at PIC i8259 */

    42 

    43 static struct _loaderparams {

    44     int ram_size;

    45     const char *kernel_filename;

    46     const char *kernel_cmdline;

    47     const char *initrd_filename;

    48 } loaderparams;

    49 

    50 static void mips_qemu_writel (void *opaque, target_phys_addr_t addr,

    51 			      uint32_t val)

    52 {

    53     if ((addr & 0xffff) == 0 && val == 42)

    54         qemu_system_reset_request ();

    55     else if ((addr & 0xffff) == 4 && val == 42)

    56         qemu_system_shutdown_request ();

    57 }

    58 

    59 static uint32_t mips_qemu_readl (void *opaque, target_phys_addr_t addr)

    60 {

    61     return 0;

    62 }

    63 

    64 static CPUWriteMemoryFunc *mips_qemu_write[] = {

    65     &mips_qemu_writel,

    66     &mips_qemu_writel,

    67     &mips_qemu_writel,

    68 };

    69 

    70 static CPUReadMemoryFunc *mips_qemu_read[] = {

    71     &mips_qemu_readl,

    72     &mips_qemu_readl,

    73     &mips_qemu_readl,

    74 };

    75 

    76 static int mips_qemu_iomemtype = 0;

    77 

    78 static void load_kernel (CPUState *env)

    79 {

    80     int64_t entry, kernel_low, kernel_high;

    81     long kernel_size, initrd_size;

    82     ram_addr_t initrd_offset;

    83 

    84     kernel_size = load_elf(loaderparams.kernel_filename, VIRT_TO_PHYS_ADDEND,

    85                            (uint64_t *)&entry, (uint64_t *)&kernel_low,

    86                            (uint64_t *)&kernel_high);

    87     if (kernel_size >= 0) {

    88         if ((entry & ~0x7fffffffULL) == 0x80000000)

    89             entry = (int32_t)entry;

    90         env->active_tc.PC = entry;

    91     } else {

    92         fprintf(stderr, "qemu: could not load kernel '%s'\n",

    93                 loaderparams.kernel_filename);

    94         exit(1);

    95     }

    96 

    97     /* load initrd */

    98     initrd_size = 0;

    99     initrd_offset = 0;

   100     if (loaderparams.initrd_filename) {

   101         initrd_size = get_image_size (loaderparams.initrd_filename);

   102         if (initrd_size > 0) {

   103             initrd_offset = (kernel_high + ~TARGET_PAGE_MASK) & TARGET_PAGE_MASK;

   104             if (initrd_offset + initrd_size > ram_size) {

   105                 fprintf(stderr,

   106                         "qemu: memory too small for initial ram disk '%s'\n",

   107                         loaderparams.initrd_filename);

   108                 exit(1);

   109             }

   110             initrd_size = load_image(loaderparams.initrd_filename,

   111                                      phys_ram_base + initrd_offset);

   112         }

   113         if (initrd_size == (target_ulong) -1) {

   114             fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",

   115                     loaderparams.initrd_filename);

   116             exit(1);

   117         }

   118     }

   119 

   120     /* Store command line.  */

   121     if (initrd_size > 0) {

   122         int ret;

   123         ret = sprintf((char *)(phys_ram_base + (16 << 20) - 256),

   124                       "rd_start=0x" TARGET_FMT_lx " rd_size=%li ",

   125                       PHYS_TO_VIRT((uint32_t)initrd_offset),

   126                       initrd_size);

   127         strcpy ((char *)(phys_ram_base + (16 << 20) - 256 + ret),

   128                 loaderparams.kernel_cmdline);

   129     }

   130     else {

   131         strcpy ((char *)(phys_ram_base + (16 << 20) - 256),

   132                 loaderparams.kernel_cmdline);

   133     }

   134 

   135     *(int32_t *)(phys_ram_base + (16 << 20) - 260) = tswap32 (0x12345678);

   136     *(int32_t *)(phys_ram_base + (16 << 20) - 264) = tswap32 (ram_size);

   137 }

   138 

   139 static void main_cpu_reset(void *opaque)

   140 {

   141     CPUState *env = opaque;

   142     cpu_reset(env);

   143 

   144     if (loaderparams.kernel_filename)

   145         load_kernel (env);

   146 }

   147 

   148 static const int sector_len = 32 * 1024;

   149 static

   150 void mips_r4k_init (ram_addr_t ram_size, int vga_ram_size,

   151                     const char *boot_device, DisplayState *ds,

   152                     const char *kernel_filename, const char *kernel_cmdline,

   153                     const char *initrd_filename, const char *cpu_model)

   154 {

   155     char buf[1024];

   156     unsigned long bios_offset;

   157     int bios_size;

   158     CPUState *env;

   159     RTCState *rtc_state;

   160     int i;

   161     qemu_irq *i8259;

   162     int index;

   163     BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS];

   164 

   165     /* init CPUs */

   166     if (cpu_model == NULL) {

   167 #ifdef TARGET_MIPS64

   168         cpu_model = "R4000";

   169 #else

   170         cpu_model = "24Kf";

   171 #endif

   172     }

   173     env = cpu_init(cpu_model);

   174     if (!env) {

   175         fprintf(stderr, "Unable to find CPU definition\n");

   176         exit(1);

   177     }

   178     qemu_register_reset(main_cpu_reset, env);

   179 

   180     /* allocate RAM */

   181     cpu_register_physical_memory(0, ram_size, IO_MEM_RAM);

   182 

   183     if (!mips_qemu_iomemtype) {

   184         mips_qemu_iomemtype = cpu_register_io_memory(0, mips_qemu_read,

   185                                                      mips_qemu_write, NULL);

   186     }

   187     cpu_register_physical_memory(0x1fbf0000, 0x10000, mips_qemu_iomemtype);

   188 

   189     /* Try to load a BIOS image. If this fails, we continue regardless,

   190        but initialize the hardware ourselves. When a kernel gets

   191        preloaded we also initialize the hardware, since the BIOS wasn't

   192        run. */

   193     bios_offset = ram_size + vga_ram_size;

   194     if (bios_name == NULL)

   195         bios_name = BIOS_FILENAME;

   196     snprintf(buf, sizeof(buf), "%s/%s", bios_dir, bios_name);

   197     bios_size = load_image(buf, phys_ram_base + bios_offset);

   198     if ((bios_size > 0) && (bios_size <= BIOS_SIZE)) {

   199 	cpu_register_physical_memory(0x1fc00000,

   200 				     BIOS_SIZE, bios_offset | IO_MEM_ROM);

   201     } else if ((index = drive_get_index(IF_PFLASH, 0, 0)) > -1) {

   202         uint32_t mips_rom = 0x00400000;

   203         cpu_register_physical_memory(0x1fc00000, mips_rom,

   204 	                     qemu_ram_alloc(mips_rom) | IO_MEM_ROM);

   205         if (!pflash_cfi01_register(0x1fc00000, qemu_ram_alloc(mips_rom),

   206             drives_table[index].bdrv, sector_len, mips_rom / sector_len,

   207             4, 0, 0, 0, 0)) {

   208             fprintf(stderr, "qemu: Error registering flash memory.\n");

   209 	}

   210     }

   211     else {

   212 	/* not fatal */

   213         fprintf(stderr, "qemu: Warning, could not load MIPS bios '%s'\n",

   214 		buf);

   215     }

   216 

   217     if (kernel_filename) {

   218         loaderparams.ram_size = ram_size;

   219         loaderparams.kernel_filename = kernel_filename;

   220         loaderparams.kernel_cmdline = kernel_cmdline;

   221         loaderparams.initrd_filename = initrd_filename;

   222         load_kernel (env);

   223     }

   224 

   225     /* Init CPU internal devices */

   226     cpu_mips_irq_init_cpu(env);

   227     cpu_mips_clock_init(env);

   228 

   229     /* The PIC is attached to the MIPS CPU INT0 pin */

   230     i8259 = i8259_init(env->irq[2]);

   231 

   232     rtc_state = rtc_init(0x70, i8259[8]);

   233 

   234     /* Register 64 KB of ISA IO space at 0x14000000 */

   235     isa_mmio_init(0x14000000, 0x00010000);

   236     isa_mem_base = 0x10000000;

   237 

   238     pit = pit_init(0x40, i8259[0]);

   239 

   240     for(i = 0; i < MAX_SERIAL_PORTS; i++) {

   241         if (serial_hds[i]) {

   242             serial_init(serial_io[i], i8259[serial_irq[i]], 115200,

   243                         serial_hds[i]);

   244         }

   245     }

   246 

   247     isa_vga_init(ds, phys_ram_base + ram_size, ram_size,

   248                  vga_ram_size);

   249 

   250     if (nd_table[0].vlan) {

   251         if (nd_table[0].model == NULL

   252             || strcmp(nd_table[0].model, "ne2k_isa") == 0) {

   253             isa_ne2000_init(0x300, i8259[9], &nd_table[0]);

   254         } else if (strcmp(nd_table[0].model, "?") == 0) {

   255             fprintf(stderr, "qemu: Supported NICs: ne2k_isa\n");

   256             exit (1);

   257         } else {

   258             fprintf(stderr, "qemu: Unsupported NIC: %s\n", nd_table[0].model);

   259             exit (1);

   260         }

   261     }

   262 

   263     if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {

   264         fprintf(stderr, "qemu: too many IDE bus\n");

   265         exit(1);

   266     }

   267 

   268     for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) {

   269         index = drive_get_index(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);

   270         if (index != -1)

   271             hd[i] = drives_table[index].bdrv;

   272         else

   273             hd[i] = NULL;

   274     }

   275 

   276     for(i = 0; i < MAX_IDE_BUS; i++)

   277         isa_ide_init(ide_iobase[i], ide_iobase2[i], i8259[ide_irq[i]],

   278                      hd[MAX_IDE_DEVS * i],

   279 		     hd[MAX_IDE_DEVS * i + 1]);

   280 

   281     i8042_init(i8259[1], i8259[12], 0x60);

   282 }

   283 

   284 QEMUMachine mips_machine = {

   285     .name = "mips",

   286     .desc = "mips r4k platform",

   287     .init = mips_r4k_init,

   288     .ram_require = VGA_RAM_SIZE + BIOS_SIZE,

   289     .nodisk_ok = 1,

   290 };