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1 #ifndef __SH_INTC_H__ |
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2 #define __SH_INTC_H__ |
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3 |
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4 #include "qemu-common.h" |
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5 #include "irq.h" |
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6 |
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7 typedef unsigned char intc_enum; |
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8 |
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9 struct intc_vect { |
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10 intc_enum enum_id; |
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11 unsigned short vect; |
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12 }; |
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13 |
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14 #define INTC_VECT(enum_id, vect) { enum_id, vect } |
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15 |
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16 struct intc_group { |
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17 intc_enum enum_id; |
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18 intc_enum enum_ids[32]; |
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19 }; |
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20 |
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21 #define INTC_GROUP(enum_id, ids...) { enum_id, { ids } } |
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22 |
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23 struct intc_mask_reg { |
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24 unsigned long set_reg, clr_reg, reg_width; |
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25 intc_enum enum_ids[32]; |
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26 unsigned long value; |
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27 }; |
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28 |
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29 struct intc_prio_reg { |
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30 unsigned long set_reg, clr_reg, reg_width, field_width; |
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31 intc_enum enum_ids[16]; |
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32 unsigned long value; |
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33 }; |
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34 |
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35 #define _INTC_ARRAY(a) a, ARRAY_SIZE(a) |
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36 |
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37 struct intc_source { |
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38 unsigned short vect; |
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39 intc_enum next_enum_id; |
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40 |
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41 int asserted; /* emulates the interrupt signal line from device to intc */ |
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42 int enable_count; |
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43 int enable_max; |
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44 int pending; /* emulates the result of signal and masking */ |
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45 struct intc_desc *parent; |
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46 }; |
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47 |
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48 struct intc_desc { |
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49 qemu_irq *irqs; |
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50 struct intc_source *sources; |
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51 int nr_sources; |
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52 struct intc_mask_reg *mask_regs; |
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53 int nr_mask_regs; |
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54 struct intc_prio_reg *prio_regs; |
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55 int nr_prio_regs; |
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56 int iomemtype; |
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57 int pending; /* number of interrupt sources that has pending set */ |
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58 }; |
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59 |
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60 int sh_intc_get_pending_vector(struct intc_desc *desc, int imask); |
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61 struct intc_source *sh_intc_source(struct intc_desc *desc, intc_enum id); |
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62 void sh_intc_toggle_source(struct intc_source *source, |
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63 int enable_adj, int assert_adj); |
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64 |
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65 void sh_intc_register_sources(struct intc_desc *desc, |
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66 struct intc_vect *vectors, |
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67 int nr_vectors, |
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68 struct intc_group *groups, |
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69 int nr_groups); |
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70 |
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71 int sh_intc_init(struct intc_desc *desc, |
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72 int nr_sources, |
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73 struct intc_mask_reg *mask_regs, |
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74 int nr_mask_regs, |
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75 struct intc_prio_reg *prio_regs, |
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76 int nr_prio_regs); |
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77 |
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78 void sh_intc_set_irl(void *opaque, int n, int level); |
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79 |
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80 #endif /* __SH_INTC_H__ */ |