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1 /* |
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2 * CRIS helper routines |
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3 * |
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4 * Copyright (c) 2007 AXIS Communications |
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5 * Written by Edgar E. Iglesias |
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6 * |
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7 * This library is free software; you can redistribute it and/or |
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8 * modify it under the terms of the GNU Lesser General Public |
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9 * License as published by the Free Software Foundation; either |
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10 * version 2 of the License, or (at your option) any later version. |
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11 * |
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12 * This library is distributed in the hope that it will be useful, |
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13 * but WITHOUT ANY WARRANTY; without even the implied warranty of |
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14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
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15 * Lesser General Public License for more details. |
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16 * |
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17 * You should have received a copy of the GNU Lesser General Public |
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18 * License along with this library; if not, write to the Free Software |
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19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
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20 */ |
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21 |
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22 #include <assert.h> |
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23 #include "exec.h" |
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24 #include "mmu.h" |
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25 #include "helper.h" |
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26 |
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27 #define D(x) |
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28 |
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29 #if !defined(CONFIG_USER_ONLY) |
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30 |
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31 #define MMUSUFFIX _mmu |
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32 |
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33 #define SHIFT 0 |
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34 #include "softmmu_template.h" |
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35 |
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36 #define SHIFT 1 |
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37 #include "softmmu_template.h" |
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38 |
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39 #define SHIFT 2 |
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40 #include "softmmu_template.h" |
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41 |
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42 #define SHIFT 3 |
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43 #include "softmmu_template.h" |
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44 |
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45 /* Try to fill the TLB and return an exception if error. If retaddr is |
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46 NULL, it means that the function was called in C code (i.e. not |
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47 from generated code or from helper.c) */ |
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48 /* XXX: fix it to restore all registers */ |
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49 void tlb_fill (target_ulong addr, int is_write, int mmu_idx, void *retaddr) |
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50 { |
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51 TranslationBlock *tb; |
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52 CPUState *saved_env; |
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53 unsigned long pc; |
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54 int ret; |
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55 |
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56 /* XXX: hack to restore env in all cases, even if not called from |
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57 generated code */ |
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58 saved_env = env; |
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59 env = cpu_single_env; |
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60 |
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61 D(fprintf(logfile, "%s pc=%x tpc=%x ra=%x\n", __func__, |
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62 env->pc, env->debug1, retaddr)); |
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63 ret = cpu_cris_handle_mmu_fault(env, addr, is_write, mmu_idx, 1); |
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64 if (unlikely(ret)) { |
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65 if (retaddr) { |
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66 /* now we have a real cpu fault */ |
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67 pc = (unsigned long)retaddr; |
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68 tb = tb_find_pc(pc); |
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69 if (tb) { |
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70 /* the PC is inside the translated code. It means that we have |
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71 a virtual CPU fault */ |
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72 cpu_restore_state(tb, env, pc, NULL); |
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73 |
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74 /* Evaluate flags after retranslation. */ |
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75 helper_top_evaluate_flags(); |
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76 } |
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77 } |
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78 cpu_loop_exit(); |
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79 } |
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80 env = saved_env; |
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81 } |
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82 |
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83 #endif |
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84 |
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85 void helper_raise_exception(uint32_t index) |
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86 { |
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87 env->exception_index = index; |
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88 cpu_loop_exit(); |
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89 } |
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90 |
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91 void helper_tlb_flush_pid(uint32_t pid) |
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92 { |
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93 #if !defined(CONFIG_USER_ONLY) |
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94 pid &= 0xff; |
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95 if (pid != (env->pregs[PR_PID] & 0xff)) |
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96 cris_mmu_flush_pid(env, env->pregs[PR_PID]); |
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97 #endif |
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98 } |
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99 |
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100 void helper_spc_write(uint32_t new_spc) |
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101 { |
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102 #if !defined(CONFIG_USER_ONLY) |
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103 tlb_flush_page(env, env->pregs[PR_SPC]); |
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104 tlb_flush_page(env, new_spc); |
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105 #endif |
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106 } |
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107 |
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108 void helper_dump(uint32_t a0, uint32_t a1, uint32_t a2) |
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109 { |
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110 (fprintf(logfile, "%s: a0=%x a1=%x\n", __func__, a0, a1)); |
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111 } |
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112 |
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113 /* Used by the tlb decoder. */ |
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114 #define EXTRACT_FIELD(src, start, end) \ |
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115 (((src) >> start) & ((1 << (end - start + 1)) - 1)) |
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116 |
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117 void helper_movl_sreg_reg (uint32_t sreg, uint32_t reg) |
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118 { |
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119 uint32_t srs; |
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120 srs = env->pregs[PR_SRS]; |
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121 srs &= 3; |
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122 env->sregs[srs][sreg] = env->regs[reg]; |
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123 |
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124 #if !defined(CONFIG_USER_ONLY) |
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125 if (srs == 1 || srs == 2) { |
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126 if (sreg == 6) { |
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127 /* Writes to tlb-hi write to mm_cause as a side |
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128 effect. */ |
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129 env->sregs[SFR_RW_MM_TLB_HI] = env->regs[reg]; |
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130 env->sregs[SFR_R_MM_CAUSE] = env->regs[reg]; |
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131 } |
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132 else if (sreg == 5) { |
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133 uint32_t set; |
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134 uint32_t idx; |
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135 uint32_t lo, hi; |
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136 uint32_t vaddr; |
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137 int tlb_v; |
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138 |
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139 idx = set = env->sregs[SFR_RW_MM_TLB_SEL]; |
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140 set >>= 4; |
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141 set &= 3; |
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142 |
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143 idx &= 15; |
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144 /* We've just made a write to tlb_lo. */ |
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145 lo = env->sregs[SFR_RW_MM_TLB_LO]; |
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146 /* Writes are done via r_mm_cause. */ |
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147 hi = env->sregs[SFR_R_MM_CAUSE]; |
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148 |
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149 vaddr = EXTRACT_FIELD(env->tlbsets[srs-1][set][idx].hi, |
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150 13, 31); |
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151 vaddr <<= TARGET_PAGE_BITS; |
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152 tlb_v = EXTRACT_FIELD(env->tlbsets[srs-1][set][idx].lo, |
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153 3, 3); |
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154 env->tlbsets[srs - 1][set][idx].lo = lo; |
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155 env->tlbsets[srs - 1][set][idx].hi = hi; |
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156 |
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157 D(fprintf(logfile, |
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158 "tlb flush vaddr=%x v=%d pc=%x\n", |
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159 vaddr, tlb_v, env->pc)); |
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160 tlb_flush_page(env, vaddr); |
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161 } |
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162 } |
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163 #endif |
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164 } |
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165 |
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166 void helper_movl_reg_sreg (uint32_t reg, uint32_t sreg) |
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167 { |
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168 uint32_t srs; |
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169 env->pregs[PR_SRS] &= 3; |
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170 srs = env->pregs[PR_SRS]; |
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171 |
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172 #if !defined(CONFIG_USER_ONLY) |
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173 if (srs == 1 || srs == 2) |
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174 { |
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175 uint32_t set; |
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176 uint32_t idx; |
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177 uint32_t lo, hi; |
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178 |
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179 idx = set = env->sregs[SFR_RW_MM_TLB_SEL]; |
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180 set >>= 4; |
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181 set &= 3; |
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182 idx &= 15; |
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183 |
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184 /* Update the mirror regs. */ |
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185 hi = env->tlbsets[srs - 1][set][idx].hi; |
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186 lo = env->tlbsets[srs - 1][set][idx].lo; |
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187 env->sregs[SFR_RW_MM_TLB_HI] = hi; |
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188 env->sregs[SFR_RW_MM_TLB_LO] = lo; |
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189 } |
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190 #endif |
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191 env->regs[reg] = env->sregs[srs][sreg]; |
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192 } |
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193 |
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194 static void cris_ccs_rshift(CPUState *env) |
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195 { |
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196 uint32_t ccs; |
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197 |
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198 /* Apply the ccs shift. */ |
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199 ccs = env->pregs[PR_CCS]; |
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200 ccs = (ccs & 0xc0000000) | ((ccs & 0x0fffffff) >> 10); |
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201 if (ccs & U_FLAG) |
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202 { |
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203 /* Enter user mode. */ |
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204 env->ksp = env->regs[R_SP]; |
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205 env->regs[R_SP] = env->pregs[PR_USP]; |
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206 } |
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207 |
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208 env->pregs[PR_CCS] = ccs; |
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209 } |
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210 |
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211 void helper_rfe(void) |
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212 { |
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213 int rflag = env->pregs[PR_CCS] & R_FLAG; |
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214 |
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215 D(fprintf(logfile, "rfe: erp=%x pid=%x ccs=%x btarget=%x\n", |
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216 env->pregs[PR_ERP], env->pregs[PR_PID], |
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217 env->pregs[PR_CCS], |
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218 env->btarget)); |
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219 |
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220 cris_ccs_rshift(env); |
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221 |
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222 /* RFE sets the P_FLAG only if the R_FLAG is not set. */ |
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223 if (!rflag) |
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224 env->pregs[PR_CCS] |= P_FLAG; |
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225 } |
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226 |
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227 void helper_rfn(void) |
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228 { |
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229 int rflag = env->pregs[PR_CCS] & R_FLAG; |
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230 |
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231 D(fprintf(logfile, "rfn: erp=%x pid=%x ccs=%x btarget=%x\n", |
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232 env->pregs[PR_ERP], env->pregs[PR_PID], |
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233 env->pregs[PR_CCS], |
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234 env->btarget)); |
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235 |
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236 cris_ccs_rshift(env); |
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237 |
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238 /* Set the P_FLAG only if the R_FLAG is not set. */ |
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239 if (!rflag) |
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240 env->pregs[PR_CCS] |= P_FLAG; |
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241 |
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242 /* Always set the M flag. */ |
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243 env->pregs[PR_CCS] |= M_FLAG; |
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244 } |
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245 |
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246 void do_unassigned_access(target_phys_addr_t addr, int is_write, int is_exec, |
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247 int is_asi, int size) |
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248 { |
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249 D(printf("%s addr=%x w=%d ex=%d asi=%d, size=%d\n", |
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250 __func__, addr, is_write, is_exec, is_asi, size)); |
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251 } |
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252 |
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253 static void evaluate_flags_writeback(uint32_t flags) |
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254 { |
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255 int x; |
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256 |
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257 /* Extended arithmetics, leave the z flag alone. */ |
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258 x = env->cc_x; |
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259 if ((x || env->cc_op == CC_OP_ADDC) |
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260 && flags & Z_FLAG) |
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261 env->cc_mask &= ~Z_FLAG; |
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262 |
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263 /* all insn clear the x-flag except setf or clrf. */ |
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264 env->pregs[PR_CCS] &= ~(env->cc_mask | X_FLAG); |
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265 flags &= env->cc_mask; |
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266 env->pregs[PR_CCS] |= flags; |
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267 } |
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268 |
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269 void helper_evaluate_flags_muls(void) |
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270 { |
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271 uint32_t src; |
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272 uint32_t dst; |
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273 uint32_t res; |
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274 uint32_t flags = 0; |
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275 int64_t tmp; |
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276 int32_t mof; |
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277 int dneg; |
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278 |
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279 src = env->cc_src; |
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280 dst = env->cc_dest; |
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281 res = env->cc_result; |
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282 |
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283 dneg = ((int32_t)res) < 0; |
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284 |
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285 mof = env->pregs[PR_MOF]; |
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286 tmp = mof; |
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287 tmp <<= 32; |
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288 tmp |= res; |
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289 if (tmp == 0) |
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290 flags |= Z_FLAG; |
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291 else if (tmp < 0) |
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292 flags |= N_FLAG; |
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293 if ((dneg && mof != -1) |
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294 || (!dneg && mof != 0)) |
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295 flags |= V_FLAG; |
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296 evaluate_flags_writeback(flags); |
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297 } |
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298 |
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299 void helper_evaluate_flags_mulu(void) |
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300 { |
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301 uint32_t src; |
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302 uint32_t dst; |
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303 uint32_t res; |
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304 uint32_t flags = 0; |
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305 uint64_t tmp; |
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306 uint32_t mof; |
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307 |
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308 src = env->cc_src; |
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309 dst = env->cc_dest; |
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310 res = env->cc_result; |
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311 |
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312 mof = env->pregs[PR_MOF]; |
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313 tmp = mof; |
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314 tmp <<= 32; |
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315 tmp |= res; |
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316 if (tmp == 0) |
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317 flags |= Z_FLAG; |
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318 else if (tmp >> 63) |
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319 flags |= N_FLAG; |
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320 if (mof) |
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321 flags |= V_FLAG; |
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322 |
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323 evaluate_flags_writeback(flags); |
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324 } |
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325 |
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326 void helper_evaluate_flags_mcp(void) |
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327 { |
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328 uint32_t src; |
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329 uint32_t dst; |
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330 uint32_t res; |
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331 uint32_t flags = 0; |
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332 |
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333 src = env->cc_src; |
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334 dst = env->cc_dest; |
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335 res = env->cc_result; |
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336 |
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337 if ((res & 0x80000000L) != 0L) |
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338 { |
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339 flags |= N_FLAG; |
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340 if (((src & 0x80000000L) == 0L) |
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341 && ((dst & 0x80000000L) == 0L)) |
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342 { |
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343 flags |= V_FLAG; |
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344 } |
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345 else if (((src & 0x80000000L) != 0L) && |
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346 ((dst & 0x80000000L) != 0L)) |
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347 { |
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348 flags |= R_FLAG; |
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349 } |
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350 } |
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351 else |
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352 { |
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353 if (res == 0L) |
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354 flags |= Z_FLAG; |
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355 if (((src & 0x80000000L) != 0L) |
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356 && ((dst & 0x80000000L) != 0L)) |
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357 flags |= V_FLAG; |
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358 if ((dst & 0x80000000L) != 0L |
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359 || (src & 0x80000000L) != 0L) |
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360 flags |= R_FLAG; |
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361 } |
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362 |
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363 evaluate_flags_writeback(flags); |
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364 } |
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365 |
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366 void helper_evaluate_flags_alu_4(void) |
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367 { |
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368 uint32_t src; |
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369 uint32_t dst; |
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370 uint32_t res; |
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371 uint32_t flags = 0; |
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372 |
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373 src = env->cc_src; |
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374 dst = env->cc_dest; |
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375 |
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376 /* Reconstruct the result. */ |
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377 switch (env->cc_op) |
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378 { |
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379 case CC_OP_SUB: |
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380 res = dst - src; |
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381 break; |
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382 case CC_OP_ADD: |
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383 res = dst + src; |
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384 break; |
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385 default: |
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386 res = env->cc_result; |
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387 break; |
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388 } |
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389 |
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390 if (env->cc_op == CC_OP_SUB || env->cc_op == CC_OP_CMP) |
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391 src = ~src; |
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392 |
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393 if ((res & 0x80000000L) != 0L) |
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394 { |
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395 flags |= N_FLAG; |
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396 if (((src & 0x80000000L) == 0L) |
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397 && ((dst & 0x80000000L) == 0L)) |
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398 { |
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399 flags |= V_FLAG; |
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400 } |
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401 else if (((src & 0x80000000L) != 0L) && |
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402 ((dst & 0x80000000L) != 0L)) |
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403 { |
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404 flags |= C_FLAG; |
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405 } |
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406 } |
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407 else |
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408 { |
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409 if (res == 0L) |
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410 flags |= Z_FLAG; |
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411 if (((src & 0x80000000L) != 0L) |
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412 && ((dst & 0x80000000L) != 0L)) |
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413 flags |= V_FLAG; |
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414 if ((dst & 0x80000000L) != 0L |
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415 || (src & 0x80000000L) != 0L) |
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416 flags |= C_FLAG; |
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417 } |
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418 |
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419 if (env->cc_op == CC_OP_SUB |
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420 || env->cc_op == CC_OP_CMP) { |
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421 flags ^= C_FLAG; |
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422 } |
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423 evaluate_flags_writeback(flags); |
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424 } |
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425 |
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426 void helper_evaluate_flags_move_4 (void) |
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427 { |
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428 uint32_t res; |
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429 uint32_t flags = 0; |
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430 |
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431 res = env->cc_result; |
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432 |
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433 if ((int32_t)res < 0) |
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434 flags |= N_FLAG; |
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435 else if (res == 0L) |
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436 flags |= Z_FLAG; |
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437 |
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438 evaluate_flags_writeback(flags); |
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439 } |
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440 void helper_evaluate_flags_move_2 (void) |
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441 { |
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442 uint32_t src; |
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443 uint32_t flags = 0; |
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444 uint16_t res; |
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445 |
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446 src = env->cc_src; |
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447 res = env->cc_result; |
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448 |
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449 if ((int16_t)res < 0L) |
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450 flags |= N_FLAG; |
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451 else if (res == 0) |
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452 flags |= Z_FLAG; |
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453 |
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454 evaluate_flags_writeback(flags); |
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455 } |
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456 |
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457 /* TODO: This is expensive. We could split things up and only evaluate part of |
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458 CCR on a need to know basis. For now, we simply re-evaluate everything. */ |
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459 void helper_evaluate_flags (void) |
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460 { |
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461 uint32_t src; |
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462 uint32_t dst; |
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463 uint32_t res; |
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464 uint32_t flags = 0; |
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465 |
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466 src = env->cc_src; |
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467 dst = env->cc_dest; |
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468 res = env->cc_result; |
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469 |
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470 if (env->cc_op == CC_OP_SUB || env->cc_op == CC_OP_CMP) |
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471 src = ~src; |
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472 |
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473 /* Now, evaluate the flags. This stuff is based on |
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474 Per Zander's CRISv10 simulator. */ |
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475 switch (env->cc_size) |
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476 { |
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477 case 1: |
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478 if ((res & 0x80L) != 0L) |
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479 { |
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480 flags |= N_FLAG; |
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481 if (((src & 0x80L) == 0L) |
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482 && ((dst & 0x80L) == 0L)) |
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483 { |
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484 flags |= V_FLAG; |
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485 } |
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486 else if (((src & 0x80L) != 0L) |
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487 && ((dst & 0x80L) != 0L)) |
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488 { |
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489 flags |= C_FLAG; |
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490 } |
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491 } |
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492 else |
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493 { |
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494 if ((res & 0xFFL) == 0L) |
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495 { |
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496 flags |= Z_FLAG; |
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497 } |
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498 if (((src & 0x80L) != 0L) |
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499 && ((dst & 0x80L) != 0L)) |
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500 { |
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501 flags |= V_FLAG; |
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502 } |
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503 if ((dst & 0x80L) != 0L |
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504 || (src & 0x80L) != 0L) |
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505 { |
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506 flags |= C_FLAG; |
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507 } |
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508 } |
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509 break; |
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510 case 2: |
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511 if ((res & 0x8000L) != 0L) |
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512 { |
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513 flags |= N_FLAG; |
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514 if (((src & 0x8000L) == 0L) |
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515 && ((dst & 0x8000L) == 0L)) |
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516 { |
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517 flags |= V_FLAG; |
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518 } |
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519 else if (((src & 0x8000L) != 0L) |
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520 && ((dst & 0x8000L) != 0L)) |
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521 { |
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522 flags |= C_FLAG; |
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523 } |
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524 } |
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525 else |
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526 { |
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527 if ((res & 0xFFFFL) == 0L) |
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528 { |
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529 flags |= Z_FLAG; |
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530 } |
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531 if (((src & 0x8000L) != 0L) |
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532 && ((dst & 0x8000L) != 0L)) |
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533 { |
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534 flags |= V_FLAG; |
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535 } |
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536 if ((dst & 0x8000L) != 0L |
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537 || (src & 0x8000L) != 0L) |
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538 { |
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539 flags |= C_FLAG; |
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540 } |
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541 } |
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542 break; |
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543 case 4: |
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544 if ((res & 0x80000000L) != 0L) |
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545 { |
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546 flags |= N_FLAG; |
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547 if (((src & 0x80000000L) == 0L) |
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548 && ((dst & 0x80000000L) == 0L)) |
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549 { |
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550 flags |= V_FLAG; |
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551 } |
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552 else if (((src & 0x80000000L) != 0L) && |
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553 ((dst & 0x80000000L) != 0L)) |
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554 { |
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555 flags |= C_FLAG; |
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556 } |
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557 } |
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558 else |
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559 { |
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560 if (res == 0L) |
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561 flags |= Z_FLAG; |
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562 if (((src & 0x80000000L) != 0L) |
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563 && ((dst & 0x80000000L) != 0L)) |
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564 flags |= V_FLAG; |
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565 if ((dst & 0x80000000L) != 0L |
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566 || (src & 0x80000000L) != 0L) |
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567 flags |= C_FLAG; |
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568 } |
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569 break; |
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570 default: |
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571 break; |
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572 } |
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573 |
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574 if (env->cc_op == CC_OP_SUB |
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575 || env->cc_op == CC_OP_CMP) { |
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576 flags ^= C_FLAG; |
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577 } |
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578 evaluate_flags_writeback(flags); |
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579 } |
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580 |
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581 void helper_top_evaluate_flags(void) |
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582 { |
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583 switch (env->cc_op) |
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584 { |
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585 case CC_OP_MCP: |
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586 helper_evaluate_flags_mcp(); |
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587 break; |
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588 case CC_OP_MULS: |
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589 helper_evaluate_flags_muls(); |
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590 break; |
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591 case CC_OP_MULU: |
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592 helper_evaluate_flags_mulu(); |
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593 break; |
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594 case CC_OP_MOVE: |
|
595 case CC_OP_AND: |
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596 case CC_OP_OR: |
|
597 case CC_OP_XOR: |
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598 case CC_OP_ASR: |
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599 case CC_OP_LSR: |
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600 case CC_OP_LSL: |
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601 switch (env->cc_size) |
|
602 { |
|
603 case 4: |
|
604 helper_evaluate_flags_move_4(); |
|
605 break; |
|
606 case 2: |
|
607 helper_evaluate_flags_move_2(); |
|
608 break; |
|
609 default: |
|
610 helper_evaluate_flags(); |
|
611 break; |
|
612 } |
|
613 break; |
|
614 case CC_OP_FLAGS: |
|
615 /* live. */ |
|
616 break; |
|
617 default: |
|
618 { |
|
619 switch (env->cc_size) |
|
620 { |
|
621 case 4: |
|
622 helper_evaluate_flags_alu_4(); |
|
623 break; |
|
624 default: |
|
625 helper_evaluate_flags(); |
|
626 break; |
|
627 } |
|
628 } |
|
629 break; |
|
630 } |
|
631 } |