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1 /* |
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2 * SH4 emulation |
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3 * |
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4 * Copyright (c) 2005 Samuel Tardieu |
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5 * |
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6 * This library is free software; you can redistribute it and/or |
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7 * modify it under the terms of the GNU Lesser General Public |
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8 * License as published by the Free Software Foundation; either |
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9 * version 2 of the License, or (at your option) any later version. |
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10 * |
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11 * This library is distributed in the hope that it will be useful, |
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12 * but WITHOUT ANY WARRANTY; without even the implied warranty of |
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13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
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14 * Lesser General Public License for more details. |
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15 * |
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16 * You should have received a copy of the GNU Lesser General Public |
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17 * License along with this library; if not, write to the Free Software |
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18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
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19 */ |
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20 #include <assert.h> |
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21 #include "exec.h" |
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22 #include "helper.h" |
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23 |
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24 #ifndef CONFIG_USER_ONLY |
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25 |
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26 #define MMUSUFFIX _mmu |
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27 |
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28 #define SHIFT 0 |
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29 #include "softmmu_template.h" |
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30 |
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31 #define SHIFT 1 |
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32 #include "softmmu_template.h" |
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33 |
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34 #define SHIFT 2 |
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35 #include "softmmu_template.h" |
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36 |
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37 #define SHIFT 3 |
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38 #include "softmmu_template.h" |
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39 |
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40 void tlb_fill(target_ulong addr, int is_write, int mmu_idx, void *retaddr) |
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41 { |
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42 TranslationBlock *tb; |
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43 CPUState *saved_env; |
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44 unsigned long pc; |
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45 int ret; |
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46 |
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47 /* XXX: hack to restore env in all cases, even if not called from |
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48 generated code */ |
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49 saved_env = env; |
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50 env = cpu_single_env; |
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51 ret = cpu_sh4_handle_mmu_fault(env, addr, is_write, mmu_idx, 1); |
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52 if (ret) { |
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53 if (retaddr) { |
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54 /* now we have a real cpu fault */ |
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55 pc = (unsigned long) retaddr; |
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56 tb = tb_find_pc(pc); |
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57 if (tb) { |
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58 /* the PC is inside the translated code. It means that we have |
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59 a virtual CPU fault */ |
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60 cpu_restore_state(tb, env, pc, NULL); |
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61 } |
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62 } |
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63 cpu_loop_exit(); |
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64 } |
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65 env = saved_env; |
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66 } |
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67 |
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68 #endif |
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69 |
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70 void helper_ldtlb(void) |
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71 { |
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72 #ifdef CONFIG_USER_ONLY |
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73 /* XXXXX */ |
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74 assert(0); |
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75 #else |
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76 cpu_load_tlb(env); |
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77 #endif |
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78 } |
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79 |
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80 void helper_raise_illegal_instruction(void) |
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81 { |
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82 env->exception_index = 0x180; |
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83 cpu_loop_exit(); |
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84 } |
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85 |
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86 void helper_raise_slot_illegal_instruction(void) |
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87 { |
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88 env->exception_index = 0x1a0; |
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89 cpu_loop_exit(); |
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90 } |
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91 |
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92 void helper_raise_fpu_disable(void) |
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93 { |
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94 env->exception_index = 0x800; |
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95 cpu_loop_exit(); |
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96 } |
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97 |
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98 void helper_raise_slot_fpu_disable(void) |
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99 { |
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100 env->exception_index = 0x820; |
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101 cpu_loop_exit(); |
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102 } |
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103 |
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104 void helper_debug(void) |
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105 { |
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106 env->exception_index = EXCP_DEBUG; |
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107 cpu_loop_exit(); |
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108 } |
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109 |
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110 void helper_sleep(uint32_t next_pc) |
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111 { |
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112 env->halted = 1; |
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113 env->exception_index = EXCP_HLT; |
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114 env->pc = next_pc; |
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115 cpu_loop_exit(); |
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116 } |
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117 |
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118 void helper_trapa(uint32_t tra) |
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119 { |
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120 env->tra = tra << 2; |
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121 env->exception_index = 0x160; |
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122 cpu_loop_exit(); |
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123 } |
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124 |
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125 uint32_t helper_addc(uint32_t arg0, uint32_t arg1) |
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126 { |
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127 uint32_t tmp0, tmp1; |
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128 |
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129 tmp1 = arg0 + arg1; |
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130 tmp0 = arg1; |
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131 arg1 = tmp1 + (env->sr & 1); |
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132 if (tmp0 > tmp1) |
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133 env->sr |= SR_T; |
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134 else |
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135 env->sr &= ~SR_T; |
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136 if (tmp1 > arg1) |
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137 env->sr |= SR_T; |
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138 return arg1; |
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139 } |
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140 |
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141 uint32_t helper_addv(uint32_t arg0, uint32_t arg1) |
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142 { |
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143 uint32_t dest, src, ans; |
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144 |
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145 if ((int32_t) arg1 >= 0) |
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146 dest = 0; |
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147 else |
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148 dest = 1; |
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149 if ((int32_t) arg0 >= 0) |
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150 src = 0; |
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151 else |
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152 src = 1; |
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153 src += dest; |
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154 arg1 += arg0; |
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155 if ((int32_t) arg1 >= 0) |
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156 ans = 0; |
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157 else |
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158 ans = 1; |
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159 ans += dest; |
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160 if (src == 0 || src == 2) { |
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161 if (ans == 1) |
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162 env->sr |= SR_T; |
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163 else |
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164 env->sr &= ~SR_T; |
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165 } else |
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166 env->sr &= ~SR_T; |
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167 return arg1; |
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168 } |
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169 |
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170 #define T (env->sr & SR_T) |
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171 #define Q (env->sr & SR_Q ? 1 : 0) |
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172 #define M (env->sr & SR_M ? 1 : 0) |
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173 #define SETT env->sr |= SR_T |
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174 #define CLRT env->sr &= ~SR_T |
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175 #define SETQ env->sr |= SR_Q |
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176 #define CLRQ env->sr &= ~SR_Q |
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177 #define SETM env->sr |= SR_M |
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178 #define CLRM env->sr &= ~SR_M |
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179 |
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180 uint32_t helper_div1(uint32_t arg0, uint32_t arg1) |
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181 { |
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182 uint32_t tmp0, tmp2; |
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183 uint8_t old_q, tmp1 = 0xff; |
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184 |
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185 //printf("div1 arg0=0x%08x arg1=0x%08x M=%d Q=%d T=%d\n", arg0, arg1, M, Q, T); |
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186 old_q = Q; |
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187 if ((0x80000000 & arg1) != 0) |
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188 SETQ; |
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189 else |
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190 CLRQ; |
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191 tmp2 = arg0; |
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192 arg1 <<= 1; |
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193 arg1 |= T; |
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194 switch (old_q) { |
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195 case 0: |
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196 switch (M) { |
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197 case 0: |
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198 tmp0 = arg1; |
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199 arg1 -= tmp2; |
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200 tmp1 = arg1 > tmp0; |
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201 switch (Q) { |
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202 case 0: |
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203 if (tmp1) |
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204 SETQ; |
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205 else |
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206 CLRQ; |
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207 break; |
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208 case 1: |
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209 if (tmp1 == 0) |
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210 SETQ; |
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211 else |
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212 CLRQ; |
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213 break; |
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214 } |
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215 break; |
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216 case 1: |
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217 tmp0 = arg1; |
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218 arg1 += tmp2; |
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219 tmp1 = arg1 < tmp0; |
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220 switch (Q) { |
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221 case 0: |
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222 if (tmp1 == 0) |
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223 SETQ; |
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224 else |
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225 CLRQ; |
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226 break; |
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227 case 1: |
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228 if (tmp1) |
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229 SETQ; |
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230 else |
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231 CLRQ; |
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232 break; |
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233 } |
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234 break; |
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235 } |
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236 break; |
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237 case 1: |
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238 switch (M) { |
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239 case 0: |
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240 tmp0 = arg1; |
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241 arg1 += tmp2; |
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242 tmp1 = arg1 < tmp0; |
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243 switch (Q) { |
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244 case 0: |
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245 if (tmp1) |
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246 SETQ; |
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247 else |
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248 CLRQ; |
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249 break; |
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250 case 1: |
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251 if (tmp1 == 0) |
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252 SETQ; |
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253 else |
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254 CLRQ; |
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255 break; |
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256 } |
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257 break; |
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258 case 1: |
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259 tmp0 = arg1; |
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260 arg1 -= tmp2; |
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261 tmp1 = arg1 > tmp0; |
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262 switch (Q) { |
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263 case 0: |
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264 if (tmp1 == 0) |
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265 SETQ; |
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266 else |
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267 CLRQ; |
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268 break; |
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269 case 1: |
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270 if (tmp1) |
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271 SETQ; |
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272 else |
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273 CLRQ; |
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274 break; |
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275 } |
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276 break; |
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277 } |
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278 break; |
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279 } |
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280 if (Q == M) |
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281 SETT; |
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282 else |
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283 CLRT; |
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284 //printf("Output: arg1=0x%08x M=%d Q=%d T=%d\n", arg1, M, Q, T); |
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285 return arg1; |
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286 } |
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287 |
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288 void helper_macl(uint32_t arg0, uint32_t arg1) |
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289 { |
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290 int64_t res; |
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291 |
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292 res = ((uint64_t) env->mach << 32) | env->macl; |
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293 res += (int64_t) (int32_t) arg0 *(int64_t) (int32_t) arg1; |
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294 env->mach = (res >> 32) & 0xffffffff; |
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295 env->macl = res & 0xffffffff; |
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296 if (env->sr & SR_S) { |
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297 if (res < 0) |
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298 env->mach |= 0xffff0000; |
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299 else |
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300 env->mach &= 0x00007fff; |
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301 } |
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302 } |
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303 |
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304 void helper_macw(uint32_t arg0, uint32_t arg1) |
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305 { |
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306 int64_t res; |
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307 |
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308 res = ((uint64_t) env->mach << 32) | env->macl; |
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309 res += (int64_t) (int16_t) arg0 *(int64_t) (int16_t) arg1; |
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310 env->mach = (res >> 32) & 0xffffffff; |
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311 env->macl = res & 0xffffffff; |
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312 if (env->sr & SR_S) { |
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313 if (res < -0x80000000) { |
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314 env->mach = 1; |
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315 env->macl = 0x80000000; |
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316 } else if (res > 0x000000007fffffff) { |
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317 env->mach = 1; |
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318 env->macl = 0x7fffffff; |
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319 } |
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320 } |
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321 } |
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322 |
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323 uint32_t helper_negc(uint32_t arg) |
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324 { |
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325 uint32_t temp; |
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326 |
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327 temp = -arg; |
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328 arg = temp - (env->sr & SR_T); |
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329 if (0 < temp) |
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330 env->sr |= SR_T; |
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331 else |
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332 env->sr &= ~SR_T; |
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333 if (temp < arg) |
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334 env->sr |= SR_T; |
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335 return arg; |
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336 } |
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337 |
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338 uint32_t helper_subc(uint32_t arg0, uint32_t arg1) |
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339 { |
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340 uint32_t tmp0, tmp1; |
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341 |
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342 tmp1 = arg1 - arg0; |
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343 tmp0 = arg1; |
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344 arg1 = tmp1 - (env->sr & SR_T); |
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345 if (tmp0 < tmp1) |
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346 env->sr |= SR_T; |
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347 else |
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348 env->sr &= ~SR_T; |
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349 if (tmp1 < arg1) |
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350 env->sr |= SR_T; |
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351 return arg1; |
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352 } |
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353 |
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354 uint32_t helper_subv(uint32_t arg0, uint32_t arg1) |
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355 { |
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356 int32_t dest, src, ans; |
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357 |
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358 if ((int32_t) arg1 >= 0) |
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359 dest = 0; |
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360 else |
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361 dest = 1; |
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362 if ((int32_t) arg0 >= 0) |
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363 src = 0; |
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364 else |
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365 src = 1; |
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366 src += dest; |
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367 arg1 -= arg0; |
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368 if ((int32_t) arg1 >= 0) |
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369 ans = 0; |
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370 else |
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371 ans = 1; |
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372 ans += dest; |
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373 if (src == 1) { |
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374 if (ans == 1) |
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375 env->sr |= SR_T; |
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376 else |
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377 env->sr &= ~SR_T; |
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378 } else |
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379 env->sr &= ~SR_T; |
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380 return arg1; |
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381 } |
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382 |
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383 static inline void set_t(void) |
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384 { |
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385 env->sr |= SR_T; |
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386 } |
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387 |
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388 static inline void clr_t(void) |
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389 { |
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390 env->sr &= ~SR_T; |
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391 } |
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392 |
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393 void helper_ld_fpscr(uint32_t val) |
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394 { |
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395 env->fpscr = val & 0x003fffff; |
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396 if (val & 0x01) |
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397 set_float_rounding_mode(float_round_to_zero, &env->fp_status); |
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398 else |
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399 set_float_rounding_mode(float_round_nearest_even, &env->fp_status); |
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400 } |
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401 |
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402 uint32_t helper_fabs_FT(uint32_t t0) |
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403 { |
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404 CPU_FloatU f; |
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405 f.l = t0; |
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406 f.f = float32_abs(f.f); |
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407 return f.l; |
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408 } |
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409 |
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410 uint64_t helper_fabs_DT(uint64_t t0) |
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411 { |
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412 CPU_DoubleU d; |
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413 d.ll = t0; |
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414 d.d = float64_abs(d.d); |
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415 return d.ll; |
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416 } |
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417 |
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418 uint32_t helper_fadd_FT(uint32_t t0, uint32_t t1) |
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419 { |
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420 CPU_FloatU f0, f1; |
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421 f0.l = t0; |
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422 f1.l = t1; |
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423 f0.f = float32_add(f0.f, f1.f, &env->fp_status); |
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424 return f0.l; |
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425 } |
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426 |
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427 uint64_t helper_fadd_DT(uint64_t t0, uint64_t t1) |
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428 { |
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429 CPU_DoubleU d0, d1; |
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430 d0.ll = t0; |
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431 d1.ll = t1; |
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432 d0.d = float64_add(d0.d, d1.d, &env->fp_status); |
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433 return d0.ll; |
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434 } |
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435 |
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436 void helper_fcmp_eq_FT(uint32_t t0, uint32_t t1) |
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437 { |
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438 CPU_FloatU f0, f1; |
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439 f0.l = t0; |
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440 f1.l = t1; |
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441 |
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442 if (float32_compare(f0.f, f1.f, &env->fp_status) == 0) |
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443 set_t(); |
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444 else |
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445 clr_t(); |
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446 } |
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447 |
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448 void helper_fcmp_eq_DT(uint64_t t0, uint64_t t1) |
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449 { |
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450 CPU_DoubleU d0, d1; |
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451 d0.ll = t0; |
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452 d1.ll = t1; |
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453 |
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454 if (float64_compare(d0.d, d1.d, &env->fp_status) == 0) |
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455 set_t(); |
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456 else |
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457 clr_t(); |
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458 } |
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459 |
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460 void helper_fcmp_gt_FT(uint32_t t0, uint32_t t1) |
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461 { |
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462 CPU_FloatU f0, f1; |
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463 f0.l = t0; |
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464 f1.l = t1; |
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465 |
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466 if (float32_compare(f0.f, f1.f, &env->fp_status) == 1) |
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467 set_t(); |
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468 else |
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469 clr_t(); |
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470 } |
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471 |
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472 void helper_fcmp_gt_DT(uint64_t t0, uint64_t t1) |
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473 { |
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474 CPU_DoubleU d0, d1; |
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475 d0.ll = t0; |
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476 d1.ll = t1; |
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477 |
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478 if (float64_compare(d0.d, d1.d, &env->fp_status) == 1) |
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479 set_t(); |
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480 else |
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481 clr_t(); |
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482 } |
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483 |
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484 uint64_t helper_fcnvsd_FT_DT(uint32_t t0) |
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485 { |
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486 CPU_DoubleU d; |
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487 CPU_FloatU f; |
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488 f.l = t0; |
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489 d.d = float32_to_float64(f.f, &env->fp_status); |
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490 return d.ll; |
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491 } |
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492 |
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493 uint32_t helper_fcnvds_DT_FT(uint64_t t0) |
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494 { |
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495 CPU_DoubleU d; |
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496 CPU_FloatU f; |
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497 d.ll = t0; |
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498 f.f = float64_to_float32(d.d, &env->fp_status); |
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499 return f.l; |
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500 } |
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501 |
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502 uint32_t helper_fdiv_FT(uint32_t t0, uint32_t t1) |
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503 { |
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504 CPU_FloatU f0, f1; |
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505 f0.l = t0; |
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506 f1.l = t1; |
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507 f0.f = float32_div(f0.f, f1.f, &env->fp_status); |
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508 return f0.l; |
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509 } |
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510 |
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511 uint64_t helper_fdiv_DT(uint64_t t0, uint64_t t1) |
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512 { |
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513 CPU_DoubleU d0, d1; |
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514 d0.ll = t0; |
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515 d1.ll = t1; |
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516 d0.d = float64_div(d0.d, d1.d, &env->fp_status); |
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517 return d0.ll; |
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518 } |
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519 |
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520 uint32_t helper_float_FT(uint32_t t0) |
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521 { |
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522 CPU_FloatU f; |
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523 f.f = int32_to_float32(t0, &env->fp_status); |
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524 return f.l; |
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525 } |
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526 |
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527 uint64_t helper_float_DT(uint32_t t0) |
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528 { |
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529 CPU_DoubleU d; |
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530 d.d = int32_to_float64(t0, &env->fp_status); |
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531 return d.ll; |
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532 } |
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533 |
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534 uint32_t helper_fmul_FT(uint32_t t0, uint32_t t1) |
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535 { |
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536 CPU_FloatU f0, f1; |
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537 f0.l = t0; |
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538 f1.l = t1; |
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539 f0.f = float32_mul(f0.f, f1.f, &env->fp_status); |
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540 return f0.l; |
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541 } |
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542 |
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543 uint64_t helper_fmul_DT(uint64_t t0, uint64_t t1) |
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544 { |
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545 CPU_DoubleU d0, d1; |
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546 d0.ll = t0; |
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547 d1.ll = t1; |
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548 d0.d = float64_mul(d0.d, d1.d, &env->fp_status); |
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549 return d0.ll; |
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550 } |
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551 |
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552 uint32_t helper_fneg_T(uint32_t t0) |
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553 { |
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554 CPU_FloatU f; |
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555 f.l = t0; |
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556 f.f = float32_chs(f.f); |
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557 return f.l; |
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558 } |
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559 |
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560 uint32_t helper_fsqrt_FT(uint32_t t0) |
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561 { |
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562 CPU_FloatU f; |
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563 f.l = t0; |
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564 f.f = float32_sqrt(f.f, &env->fp_status); |
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565 return f.l; |
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566 } |
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567 |
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568 uint64_t helper_fsqrt_DT(uint64_t t0) |
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569 { |
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570 CPU_DoubleU d; |
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571 d.ll = t0; |
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572 d.d = float64_sqrt(d.d, &env->fp_status); |
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573 return d.ll; |
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574 } |
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575 |
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576 uint32_t helper_fsub_FT(uint32_t t0, uint32_t t1) |
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577 { |
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578 CPU_FloatU f0, f1; |
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579 f0.l = t0; |
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580 f1.l = t1; |
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581 f0.f = float32_sub(f0.f, f1.f, &env->fp_status); |
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582 return f0.l; |
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583 } |
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584 |
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585 uint64_t helper_fsub_DT(uint64_t t0, uint64_t t1) |
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586 { |
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587 CPU_DoubleU d0, d1; |
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588 d0.ll = t0; |
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589 d1.ll = t1; |
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590 d0.d = float64_sub(d0.d, d1.d, &env->fp_status); |
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591 return d0.ll; |
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592 } |
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593 |
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594 uint32_t helper_ftrc_FT(uint32_t t0) |
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595 { |
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596 CPU_FloatU f; |
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597 f.l = t0; |
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598 return float32_to_int32_round_to_zero(f.f, &env->fp_status); |
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599 } |
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600 |
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601 uint32_t helper_ftrc_DT(uint64_t t0) |
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602 { |
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603 CPU_DoubleU d; |
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604 d.ll = t0; |
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605 return float64_to_int32_round_to_zero(d.d, &env->fp_status); |
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606 } |