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1 /* |
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2 * Tiny Code Generator for QEMU |
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3 * |
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4 * Copyright (c) 2008 Fabrice Bellard |
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5 * |
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6 * Permission is hereby granted, free of charge, to any person obtaining a copy |
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7 * of this software and associated documentation files (the "Software"), to deal |
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8 * in the Software without restriction, including without limitation the rights |
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9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell |
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10 * copies of the Software, and to permit persons to whom the Software is |
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11 * furnished to do so, subject to the following conditions: |
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12 * |
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13 * The above copyright notice and this permission notice shall be included in |
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14 * all copies or substantial portions of the Software. |
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15 * |
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16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
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17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
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18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
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19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
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20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
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21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN |
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22 * THE SOFTWARE. |
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23 */ |
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24 #define TCG_TARGET_SPARC 1 |
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25 |
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26 #if defined(__sparc_v9__) && !defined(__sparc_v8plus__) |
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27 #define TCG_TARGET_REG_BITS 64 |
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28 #else |
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29 #define TCG_TARGET_REG_BITS 32 |
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30 #endif |
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31 |
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32 #define TCG_TARGET_WORDS_BIGENDIAN |
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33 |
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34 #define TCG_TARGET_NB_REGS 32 |
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35 |
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36 enum { |
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37 TCG_REG_G0 = 0, |
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38 TCG_REG_G1, |
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39 TCG_REG_G2, |
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40 TCG_REG_G3, |
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41 TCG_REG_G4, |
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42 TCG_REG_G5, |
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43 TCG_REG_G6, |
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44 TCG_REG_G7, |
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45 TCG_REG_O0, |
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46 TCG_REG_O1, |
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47 TCG_REG_O2, |
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48 TCG_REG_O3, |
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49 TCG_REG_O4, |
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50 TCG_REG_O5, |
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51 TCG_REG_O6, |
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52 TCG_REG_O7, |
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53 TCG_REG_L0, |
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54 TCG_REG_L1, |
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55 TCG_REG_L2, |
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56 TCG_REG_L3, |
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57 TCG_REG_L4, |
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58 TCG_REG_L5, |
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59 TCG_REG_L6, |
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60 TCG_REG_L7, |
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61 TCG_REG_I0, |
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62 TCG_REG_I1, |
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63 TCG_REG_I2, |
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64 TCG_REG_I3, |
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65 TCG_REG_I4, |
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66 TCG_REG_I5, |
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67 TCG_REG_I6, |
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68 TCG_REG_I7, |
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69 }; |
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70 |
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71 #define TCG_CT_CONST_S11 0x100 |
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72 #define TCG_CT_CONST_S13 0x200 |
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73 |
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74 /* used for function call generation */ |
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75 #define TCG_REG_CALL_STACK TCG_REG_I6 |
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76 #ifdef __arch64__ |
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77 // Reserve space for AREG0 |
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78 #define TCG_TARGET_STACK_MINFRAME (176 + 2 * (int)sizeof(long)) |
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79 #define TCG_TARGET_CALL_STACK_OFFSET (2047 + TCG_TARGET_STACK_MINFRAME) |
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80 #define TCG_TARGET_STACK_ALIGN 16 |
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81 #else |
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82 // AREG0 + one word for alignment |
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83 #define TCG_TARGET_STACK_MINFRAME (92 + (2 + 1) * (int)sizeof(long)) |
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84 #define TCG_TARGET_CALL_STACK_OFFSET TCG_TARGET_STACK_MINFRAME |
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85 #define TCG_TARGET_STACK_ALIGN 8 |
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86 #endif |
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87 |
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88 /* optional instructions */ |
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89 //#define TCG_TARGET_HAS_bswap_i32 |
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90 //#define TCG_TARGET_HAS_bswap_i64 |
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91 //#define TCG_TARGET_HAS_neg_i32 |
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92 //#define TCG_TARGET_HAS_neg_i64 |
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93 |
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94 |
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95 /* Note: must be synced with dyngen-exec.h and Makefile.target */ |
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96 #ifdef HOST_SOLARIS |
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97 #define TCG_AREG0 TCG_REG_G2 |
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98 #define TCG_AREG1 TCG_REG_G3 |
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99 #define TCG_AREG2 TCG_REG_G4 |
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100 #define TCG_AREG3 TCG_REG_G5 |
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101 #define TCG_AREG4 TCG_REG_G6 |
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102 #elif defined(__sparc_v9__) |
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103 #define TCG_AREG0 TCG_REG_G5 |
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104 #define TCG_AREG1 TCG_REG_G6 |
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105 #define TCG_AREG2 TCG_REG_G7 |
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106 #else |
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107 #define TCG_AREG0 TCG_REG_G6 |
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108 #define TCG_AREG1 TCG_REG_G1 |
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109 #define TCG_AREG2 TCG_REG_G2 |
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110 #define TCG_AREG3 TCG_REG_G3 |
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111 #endif |
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112 |
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113 static inline void flush_icache_range(unsigned long start, unsigned long stop) |
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114 { |
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115 unsigned long p; |
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116 |
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117 p = start & ~(8UL - 1UL); |
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118 stop = (stop + (8UL - 1UL)) & ~(8UL - 1UL); |
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119 |
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120 for (; p < stop; p += 8) |
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121 __asm__ __volatile__("flush\t%0" : : "r" (p)); |
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122 } |