baseport/src/cedar/generic/base/syborg/config.inc
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     1 ;/*
       
     2 ;* Copyright (c) 2009 Nokia Corporation and/or its subsidiary(-ies).
       
     3 ;* All rights reserved.
       
     4 ;* This component and the accompanying materials are made available
       
     5 ;* under the terms of the License "Eclipse Public License v1.0"
       
     6 ;* which accompanies this distribution, and is available
       
     7 ;* at the URL "http://www.eclipse.org/legal/epl-v10.html".
       
     8 ;*
       
     9 ;* Initial Contributors:
       
    10 ;* Nokia Corporation - initial contribution.
       
    11 ;*
       
    12 ;* Contributors:
       
    13 ;*
       
    14 ;* Description:
       
    15 ;*
       
    16 ;*/
       
    17 
       
    18 ; Include to enable tracing
       
    19 ;	GBLL	CFG_DebugBootRom
       
    20 
       
    21 ; Include one of these to select the CPU
       
    22 ;	GBLL	CFG_CPU_ARM926J
       
    23 ;	GBLL	CFG_CPU_ARM1136
       
    24 	GBLL    CFG_CPU_CORTEX_A8N
       
    25 ;	GBLL	CFG_CPU_ARM1136_ERRATUM_399234_FIXED
       
    26 ;	GBLL    CFG_CPU_ARM1136_ERRATUM_411920_FIXED
       
    27 ; Include the following lines if this is a bootloader bootstrap
       
    28 ;	GBLL	CFG_BootLoader
       
    29 
       
    30 ; If you want to supply a custom set of initial vectors (including reset vector) include the following line
       
    31 ;	GBLL	CFG_CustomVectors
       
    32 ;
       
    33 ; and provide a custom_vectors.inc file
       
    34 
       
    35 ; On ARM architecture 6 processors, include the following line to override the threshold
       
    36 ; on total physical RAM size at which the multiple memory model switches into large address space mode
       
    37 ; i.e. size>threshold -> 2Gb per process, size<=threshold -> 1Gb per process
       
    38 ; Defaults to 32Mb.
       
    39 ;	INIT_NUMERIC_CONSTANT	CFG_ARMV6_LARGE_CONFIG_THRESHOLD, <value>
       
    40 
       
    41 ; For the direct memory model only, include the following line if you wish the exception vectors at the
       
    42 ; start of the bootstrap to be used at all times. This is only relevant if an MMU is present - this option
       
    43 ; is mandatory if not.
       
    44 ;	GBLL	CFG_UseBootstrapVectors
       
    45 ;
       
    46 ; If the above option is in use (including if no MMU is present) the following symbol should be defined
       
    47 ; to specify the offset from the bootstrap to the kernel image.
       
    48 ;	INIT_NUMERIC_CONSTANT	KernelCodeOffset, 0x4000
       
    49 
       
    50 ; Include the following line if you wish to include the ROM autodetection code based on data bus
       
    51 ; capacitance and image repeats.
       
    52 ;	GBLL	CFG_AutoDetectROM
       
    53 
       
    54 ; Include the following line to minimise the initial kernel heap size
       
    55 ; On the direct memory model the size of the kernel data area (super page to end of kernel heap) 
       
    56 ; is rounded up to the next 1Mb if this is not included, 4K if it is.
       
    57 ; On the moving and multiple models, the size of the initial kernel heap area is rounded up to
       
    58 ; the next 64K if this is not included, 4K if it is.
       
    59 ;	GBLL	CFG_MinimiseKernelHeap
       
    60 
       
    61 ; On the moving or multiple memory models, include either or both of the following lines to
       
    62 ; specify the size of the initial kernel heap
       
    63 ;	INIT_NUMERIC_CONSTANT	CFG_KernelHeapMultiplier, <multiplier>
       
    64 ;	INIT_NUMERIC_CONSTANT	CFG_KernelHeapBaseSize, <base>
       
    65 ;
       
    66 ; The initial kernel heap size is MAX( <base> + <multiplier> * N / 16, value specified in ROMBUILD )
       
    67 ; where N is the total physical RAM size in pages.
       
    68 ; <base> defaults to 24K and <multiplier> defaults to 9*16 (ie 9 bytes per page).
       
    69 
       
    70 ; Specific stuff for integrator
       
    71 ;	GBLL	CFG_Integrator_DontSetClock
       
    72 	INIT_NUMERIC_CONSTANT	CFG_HWVD, 0x0B0A0001
       
    73 
       
    74 ; Copy NOR Flash image to SDRAM
       
    75 	GBLL    CFG_CopyFlashToRam
       
    76     
       
    77 
       
    78 	END