| Fri, 24 Sep 2010 13:30:20 +0100 |
Gareth Stockwell |
Merged default branch into graphics-phase-3
graphics-phase-3
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files
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| Wed, 22 Sep 2010 20:10:53 +0100 |
Gareth Stockwell |
Backed out changeset b6c206049d8a
graphics-phase-3
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files
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| Wed, 22 Sep 2010 17:06:27 +0100 |
Gareth Stockwell |
Copied NVM model library code from default branch
graphics-phase-3
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files
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| Wed, 22 Sep 2010 15:40:40 +0100 |
Gareth Stockwell |
Fixes to syborg-graphicswrapper.vcproj
graphics-phase-3
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files
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| Wed, 22 Sep 2010 16:51:17 +0300 |
Jani Hyvonen |
Header and class name changes
graphics-phase-3
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files
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| Mon, 20 Sep 2010 11:36:58 +0100 |
Johan Groth |
Added tag PDK_3.0.2 for changeset 78b83e1454a6
TAGS
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files
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| Tue, 14 Sep 2010 17:21:05 +0100 |
Gareth Stockwell |
Added Makefile for building syborg-graphicswrapper using GCC
graphics-phase-3
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files
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| Thu, 09 Sep 2010 12:06:21 +0100 |
Gareth Stockwell |
Allow NVM device to be built with MinGW
PDK_3.0.2 PDK_3.0.3
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files
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| Mon, 06 Sep 2010 16:25:43 +0100 |
Gareth Stockwell |
Fix for Bug 3671 - QEMU GDB stub listens on IPv6-only port on Windows 7
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files
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| Tue, 07 Sep 2010 23:21:20 +0100 |
andrew.jordan <> |
NTT DOCOMO, INC - Fix for Bug 3598 - The argument for ReadReg() and WriteReg() in Syborg BSP overflows
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files
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| Tue, 07 Sep 2010 14:16:12 +0100 |
Simon Howkins |
Create RCL_1 branch to isolate Symbian^2 builds from changes that only work on Symbian^3.
RCL_1
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| Tue, 07 Sep 2010 12:23:10 +0100 |
andrew.jordan <> |
Merge GCC_SURGE with current default head.
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| Fri, 27 Aug 2010 17:26:55 +0100 |
Shane McErlean |
NTT DOCOMO, INC - Fix for bug 1292 "E32test t_mstim.exe failed to load test LDD"
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files
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| Fri, 27 Aug 2010 16:03:29 +0100 |
Shane McErlean |
NTT DOCOMO, INC - Fix for bug 1291 "E32test t_tock.exe failed to load Logical Device"
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files
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| Fri, 27 Aug 2010 15:33:49 +0100 |
Shane McErlean |
NTT DOCOMO, INC - Fix for bug 1290 "E32test t_atomic.EXE failed with unhandled exception handling"
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files
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| Thu, 19 Aug 2010 17:55:25 +0100 |
Shane McErlean |
SF Bug 1284 - QEMU has faulty instruction emulation for VMOV (between two ARM core registers and two single-precision registers)
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