1 /* Copyright (C) 2004 Jean-Marc Valin */ |
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2 /** |
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3 @file fixed_arm4.h |
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4 @brief ARM4 fixed-point operations |
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5 */ |
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6 /* |
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7 Redistribution and use in source and binary forms, with or without |
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8 modification, are permitted provided that the following conditions |
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9 are met: |
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10 |
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11 - Redistributions of source code must retain the above copyright |
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12 notice, this list of conditions and the following disclaimer. |
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13 |
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14 - Redistributions in binary form must reproduce the above copyright |
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15 notice, this list of conditions and the following disclaimer in the |
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16 documentation and/or other materials provided with the distribution. |
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17 |
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18 - Neither the name of the Xiph.org Foundation nor the names of its |
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19 contributors may be used to endorse or promote products derived from |
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20 this software without specific prior written permission. |
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21 |
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22 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
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23 ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
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24 LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR |
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25 A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR |
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26 CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, |
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27 EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, |
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28 PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR |
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29 PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF |
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30 LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING |
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31 NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS |
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32 SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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33 */ |
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34 |
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35 #ifndef FIXED_ARM4_H |
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36 #define FIXED_ARM4_H |
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37 |
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38 #undef MULT16_32_Q14 |
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39 static inline spx_word32_t |
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40 MULT16_32_Q14 (spx_word16_t x, spx_word32_t y) |
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41 { |
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42 int res; |
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43 int dummy; |
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44 asm ("smull %0,%1,%2,%3 \n\t" "mov %0, %0, lsr #14 \n\t" "add %0, %0, %1, lsl #18 \n\t":"=&r" (res), |
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45 "=&r" |
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46 (dummy) |
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47 : "r" (y), "r" ((int) x)); |
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48 return (res); |
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49 } |
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50 |
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51 #undef MULT16_32_Q15 |
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52 static inline spx_word32_t |
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53 MULT16_32_Q15 (spx_word16_t x, spx_word32_t y) |
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54 { |
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55 int res; |
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56 int dummy; |
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57 asm ("smull %0,%1,%2,%3 \n\t" "mov %0, %0, lsr #15 \n\t" "add %0, %0, %1, lsl #17 \n\t":"=&r" (res), |
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58 "=&r" |
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59 (dummy) |
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60 : "r" (y), "r" ((int) x)); |
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61 return (res); |
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62 } |
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63 |
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64 #undef DIV32_16 |
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65 static inline short |
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66 DIV32_16 (int a, int b) |
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67 { |
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68 int res = 0; |
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69 int dead1, dead2, dead3, dead4, dead5; |
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70 __asm__ __volatile__ ("\teor %5, %0, %1\n" |
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71 "\tmovs %4, %0\n" |
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72 "\trsbmi %0, %0, #0 \n" |
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73 "\tmovs %4, %1\n" |
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74 "\trsbmi %1, %1, #0 \n" |
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75 "\tmov %4, #1\n" |
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76 "\tsubs %3, %0, %1, asl #14 \n" |
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77 "\tmovpl %0, %3 \n" |
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78 "\torrpl %2, %2, %4, asl #14 \n" |
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79 "\tsubs %3, %0, %1, asl #13 \n" |
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80 "\tmovpl %0, %3 \n" |
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81 "\torrpl %2, %2, %4, asl #13 \n" |
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82 "\tsubs %3, %0, %1, asl #12 \n" |
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83 "\tmovpl %0, %3 \n" |
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84 "\torrpl %2, %2, %4, asl #12 \n" |
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85 "\tsubs %3, %0, %1, asl #11 \n" |
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86 "\tmovpl %0, %3 \n" |
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87 "\torrpl %2, %2, %4, asl #11 \n" |
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88 "\tsubs %3, %0, %1, asl #10 \n" |
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89 "\tmovpl %0, %3 \n" |
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90 "\torrpl %2, %2, %4, asl #10 \n" |
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91 "\tsubs %3, %0, %1, asl #9 \n" |
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92 "\tmovpl %0, %3 \n" |
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93 "\torrpl %2, %2, %4, asl #9 \n" |
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94 "\tsubs %3, %0, %1, asl #8 \n" |
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95 "\tmovpl %0, %3 \n" |
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96 "\torrpl %2, %2, %4, asl #8 \n" |
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97 "\tsubs %3, %0, %1, asl #7 \n" |
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98 "\tmovpl %0, %3 \n" |
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99 "\torrpl %2, %2, %4, asl #7 \n" |
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100 "\tsubs %3, %0, %1, asl #6 \n" |
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101 "\tmovpl %0, %3 \n" |
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102 "\torrpl %2, %2, %4, asl #6 \n" |
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103 "\tsubs %3, %0, %1, asl #5 \n" |
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104 "\tmovpl %0, %3 \n" |
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105 "\torrpl %2, %2, %4, asl #5 \n" |
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106 "\tsubs %3, %0, %1, asl #4 \n" |
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107 "\tmovpl %0, %3 \n" |
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108 "\torrpl %2, %2, %4, asl #4 \n" |
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109 "\tsubs %3, %0, %1, asl #3 \n" |
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110 "\tmovpl %0, %3 \n" |
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111 "\torrpl %2, %2, %4, asl #3 \n" |
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112 "\tsubs %3, %0, %1, asl #2 \n" |
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113 "\tmovpl %0, %3 \n" |
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114 "\torrpl %2, %2, %4, asl #2 \n" |
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115 "\tsubs %3, %0, %1, asl #1 \n" |
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116 "\tmovpl %0, %3 \n" |
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117 "\torrpl %2, %2, %4, asl #1 \n" |
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118 "\tsubs %3, %0, %1 \n" |
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119 "\tmovpl %0, %3 \n" |
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120 "\torrpl %2, %2, %4 \n" |
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121 "\tmovs %5, %5, lsr #31 \n" |
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122 "\trsbne %2, %2, #0 \n":"=r" (dead1), "=r" (dead2), "=r" (res), |
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123 "=r" (dead3), "=r" (dead4), "=r" (dead5) |
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124 :"0" (a), "1" (b), "2" (res) |
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125 :"cc"); |
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126 return res; |
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127 } |
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128 |
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129 |
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130 #endif |
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