1 /* Copyright (C) 2003 Jean-Marc Valin */ |
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2 /** |
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3 @file fixed_arm5e.h |
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4 @brief ARM-tuned fixed-point operations |
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5 */ |
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6 /* |
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7 Redistribution and use in source and binary forms, with or without |
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8 modification, are permitted provided that the following conditions |
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9 are met: |
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10 |
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11 - Redistributions of source code must retain the above copyright |
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12 notice, this list of conditions and the following disclaimer. |
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13 |
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14 - Redistributions in binary form must reproduce the above copyright |
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15 notice, this list of conditions and the following disclaimer in the |
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16 documentation and/or other materials provided with the distribution. |
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17 |
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18 - Neither the name of the Xiph.org Foundation nor the names of its |
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19 contributors may be used to endorse or promote products derived from |
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20 this software without specific prior written permission. |
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21 |
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22 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
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23 ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
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24 LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR |
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25 A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR |
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26 CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, |
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27 EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, |
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28 PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR |
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29 PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF |
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30 LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING |
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31 NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS |
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32 SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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33 */ |
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34 |
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35 #ifndef FIXED_ARM5E_H |
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36 #define FIXED_ARM5E_H |
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37 |
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38 #undef MULT16_16 |
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39 static inline spx_word32_t |
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40 MULT16_16 (spx_word16_t x, spx_word16_t y) |
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41 { |
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42 int res; |
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43 asm ("smulbb %0,%1,%2;\n":"=&r" (res) |
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44 : "%r" (x), "r" (y)); |
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45 return (res); |
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46 } |
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47 |
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48 #undef MAC16_16 |
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49 static inline spx_word32_t |
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50 MAC16_16 (spx_word32_t a, spx_word16_t x, spx_word32_t y) |
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51 { |
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52 int res; |
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53 asm ("smlabb %0,%1,%2,%3;\n":"=&r" (res) |
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54 : "%r" (x), "r" (y), "r" (a)); |
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55 return (res); |
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56 } |
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57 |
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58 #undef MULT16_32_Q15 |
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59 static inline spx_word32_t |
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60 MULT16_32_Q15 (spx_word16_t x, spx_word32_t y) |
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61 { |
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62 int res; |
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63 asm ("smulwb %0,%1,%2;\n":"=&r" (res) |
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64 : "%r" (y << 1), "r" (x)); |
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65 return (res); |
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66 } |
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67 |
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68 #undef MAC16_32_Q15 |
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69 static inline spx_word32_t |
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70 MAC16_32_Q15 (spx_word32_t a, spx_word16_t x, spx_word32_t y) |
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71 { |
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72 int res; |
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73 asm ("smlawb %0,%1,%2,%3;\n":"=&r" (res) |
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74 : "%r" (y << 1), "r" (x), "r" (a)); |
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75 return (res); |
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76 } |
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77 |
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78 #undef MULT16_32_Q11 |
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79 static inline spx_word32_t |
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80 MULT16_32_Q11 (spx_word16_t x, spx_word32_t y) |
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81 { |
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82 int res; |
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83 asm ("smulwb %0,%1,%2;\n":"=&r" (res) |
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84 : "%r" (y << 5), "r" (x)); |
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85 return (res); |
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86 } |
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87 |
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88 #undef MAC16_32_Q11 |
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89 static inline spx_word32_t |
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90 MAC16_32_Q11 (spx_word32_t a, spx_word16_t x, spx_word32_t y) |
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91 { |
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92 int res; |
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93 asm ("smlawb %0,%1,%2,%3;\n":"=&r" (res) |
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94 : "%r" (y << 5), "r" (x), "r" (a)); |
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95 return (res); |
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96 } |
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97 |
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98 #undef DIV32_16 |
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99 static inline short |
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100 DIV32_16 (int a, int b) |
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101 { |
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102 int res = 0; |
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103 int dead1, dead2, dead3, dead4, dead5; |
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104 __asm__ __volatile__ ("\teor %5, %0, %1\n" |
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105 "\tmovs %4, %0\n" |
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106 "\trsbmi %0, %0, #0 \n" |
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107 "\tmovs %4, %1\n" |
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108 "\trsbmi %1, %1, #0 \n" |
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109 "\tmov %4, #1\n" |
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110 "\tsubs %3, %0, %1, asl #14 \n" |
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111 "\torrpl %2, %2, %4, asl #14 \n" |
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112 "\tmovpl %0, %3 \n" |
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113 "\tsubs %3, %0, %1, asl #13 \n" |
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114 "\torrpl %2, %2, %4, asl #13 \n" |
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115 "\tmovpl %0, %3 \n" |
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116 "\tsubs %3, %0, %1, asl #12 \n" |
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117 "\torrpl %2, %2, %4, asl #12 \n" |
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118 "\tmovpl %0, %3 \n" |
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119 "\tsubs %3, %0, %1, asl #11 \n" |
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120 "\torrpl %2, %2, %4, asl #11 \n" |
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121 "\tmovpl %0, %3 \n" |
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122 "\tsubs %3, %0, %1, asl #10 \n" |
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123 "\torrpl %2, %2, %4, asl #10 \n" |
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124 "\tmovpl %0, %3 \n" |
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125 "\tsubs %3, %0, %1, asl #9 \n" |
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126 "\torrpl %2, %2, %4, asl #9 \n" |
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127 "\tmovpl %0, %3 \n" |
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128 "\tsubs %3, %0, %1, asl #8 \n" |
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129 "\torrpl %2, %2, %4, asl #8 \n" |
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130 "\tmovpl %0, %3 \n" |
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131 "\tsubs %3, %0, %1, asl #7 \n" |
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132 "\torrpl %2, %2, %4, asl #7 \n" |
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133 "\tmovpl %0, %3 \n" |
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134 "\tsubs %3, %0, %1, asl #6 \n" |
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135 "\torrpl %2, %2, %4, asl #6 \n" |
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136 "\tmovpl %0, %3 \n" |
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137 "\tsubs %3, %0, %1, asl #5 \n" |
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138 "\torrpl %2, %2, %4, asl #5 \n" |
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139 "\tmovpl %0, %3 \n" |
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140 "\tsubs %3, %0, %1, asl #4 \n" |
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141 "\torrpl %2, %2, %4, asl #4 \n" |
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142 "\tmovpl %0, %3 \n" |
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143 "\tsubs %3, %0, %1, asl #3 \n" |
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144 "\torrpl %2, %2, %4, asl #3 \n" |
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145 "\tmovpl %0, %3 \n" |
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146 "\tsubs %3, %0, %1, asl #2 \n" |
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147 "\torrpl %2, %2, %4, asl #2 \n" |
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148 "\tmovpl %0, %3 \n" |
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149 "\tsubs %3, %0, %1, asl #1 \n" |
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150 "\torrpl %2, %2, %4, asl #1 \n" |
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151 "\tmovpl %0, %3 \n" |
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152 "\tsubs %3, %0, %1 \n" |
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153 "\torrpl %2, %2, %4 \n" |
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154 "\tmovpl %0, %3 \n" |
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155 "\tmovs %5, %5, lsr #31 \n" |
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156 "\trsbne %2, %2, #0 \n":"=r" (dead1), "=r" (dead2), "=r" (res), |
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157 "=r" (dead3), "=r" (dead4), "=r" (dead5) |
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158 :"0" (a), "1" (b), "2" (res) |
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159 :"memory", "cc"); |
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160 return res; |
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161 } |
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162 |
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163 |
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164 |
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165 |
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166 #endif |
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