skins/AknSkins/rlpluginsrc/asm_versions/asm_contrast.cpp
changeset 0 05e9090e2422
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-1:000000000000 0:05e9090e2422
       
     1 /*
       
     2 * Copyright (c) 2009 Nokia Corporation and/or its subsidiary(-ies).
       
     3 * All rights reserved.
       
     4 * This component and the accompanying materials are made available
       
     5 * under the terms of "Eclipse Public License v1.0"
       
     6 * which accompanies this distribution, and is available
       
     7 * at the URL "http://www.eclipse.org/legal/epl-v10.html".
       
     8 *
       
     9 * Initial Contributors:
       
    10 * Nokia Corporation - initial contribution.
       
    11 *
       
    12 * Contributors:
       
    13 *
       
    14 * Description:
       
    15 *
       
    16 */
       
    17 /*
       
    18 * ============================================================================
       
    19 *  Name : WOW Testbench, assembler version of make convolution bitmaps
       
    20 * ============================================================================
       
    21 */
       
    22 
       
    23 // INCLUDE FILES
       
    24 #include <bitstd.h>
       
    25 #include <bitdev.h>
       
    26 
       
    27 #include "fx_asm_versions.h"
       
    28 
       
    29 
       
    30 void AProcessContrast( const CFbsBitmap& aTarget,
       
    31                        const CFbsBitmap& aSource,
       
    32                        const TInt aAdjustment,
       
    33                        const TDisplayMode aMode )
       
    34     {
       
    35     // ScanLineLength returns bytes, but width must match the displaymode
       
    36     TInt width  = CFbsBitmap::ScanLineLength( aSource.SizeInPixels().iWidth,
       
    37                                               aSource.DisplayMode() );
       
    38     if (aMode == EColor16MU)
       
    39         {
       
    40         width = width / 4;
       
    41         }
       
    42     else
       
    43         {
       
    44         width = width / 2;
       
    45         }
       
    46     TInt height = aSource.SizeInPixels().iHeight;
       
    47 
       
    48     TInt pixelCount = width * height;
       
    49 
       
    50     aTarget.LockHeap( ETrue ); // Lock the global bitmap buffer
       
    51     TUint* targetAddr = reinterpret_cast<TUint*>( aTarget.DataAddress() );
       
    52     TUint* sourceAddr = reinterpret_cast<TUint*>( aSource.DataAddress() );
       
    53 
       
    54     if (aMode == EColor16MU)
       
    55         {
       
    56         ADoContrast16MU(targetAddr, sourceAddr, pixelCount, aAdjustment);
       
    57         }
       
    58     else
       
    59         {
       
    60         ADoContrast64K(targetAddr, sourceAddr, pixelCount, aAdjustment);
       
    61         }
       
    62 
       
    63     aTarget.UnlockHeap( ETrue ); // Unlock the global bitmap heap
       
    64     }
       
    65 
       
    66 
       
    67 #pragma warning(disable : 4100)
       
    68 #ifndef ARM_VERSION
       
    69 __NAKED__ void ADoContrast64K( TUint*, TUint*, TInt, TInt )
       
    70     {
       
    71 //    return;
       
    72 #else
       
    73 __NAKED__ void ADoContrast64K( TUint* aBaseT,
       
    74                                TUint* aBaseS,
       
    75                                TInt aPixelCount,
       
    76                                TInt aAdjustment)
       
    77     {
       
    78 //    Parameters:
       
    79 //    r0 = target,
       
    80 //    r1 = source,
       
    81 //    r2 = pixelcount,
       
    82 //    r3 = contrast adjustment parameter
       
    83 //    pixel format rrrrrggggggbbbbb (565)
       
    84 
       
    85     PUSH    {r0-r12,lr}
       
    86     
       
    87     SUB     r12, r3, r3, LSL #7 // r12 = -(127 * aAdjustment)
       
    88     ADD     r11, r3, #0xff      // r11 = 255 + aAdjustment
       
    89     
       
    90     MOV     r3, #0x1f           // used in saturation for red and blue
       
    91     MOV     r4, #0x3f           // for green
       
    92     
       
    93     AND     r10, r2, #0x3       // save last pixels
       
    94     PUSH    {r10}               // r10 used in loop
       
    95     LSRS    r2, r2, #2          // we process 4 pixel at time, so divide counter by 4
       
    96     BEQ     processlastpixels64k   // less than 4 pixels to process
       
    97     
       
    98 processloop64k
       
    99     
       
   100     LDMIA   r1!, {r5-r6}        // load 4 pixels to r5-r6
       
   101 
       
   102     // first process upper 16 bits of r5
       
   103     AND     r7, r3, r5, LSR #27 // r7 = red?
       
   104     LSL     r7, r7, #3          // convert to 8 bits
       
   105     MLA     r7, r11, r7, r12    // r7 = r7 * r11 + r12
       
   106     AND     lr, r4, r5, LSR #21 // lr = green?
       
   107     LSL     lr, lr, #2          // convert to 8 bits
       
   108     MLA     lr, r11, lr, r12    // r8 = r8 * r11 + r12
       
   109     AND     r9, r3, r5, LSR #16  // r9 = blue?    
       
   110     LSL     r9, r9, #3          // convert to 8 bits
       
   111     MLA     r9, r11, r9, r12    // r9 = r9 * r11 + r12
       
   112     LSR     r10, r7, #11        // r10 = r7 >> 8+3
       
   113     CMP     r10, #0x1f          // if r10 > 0x1f (max red)
       
   114     BICGT   r10, r3, r7, ASR #31    // then r10 = 0x1f and not sign bit of r7
       
   115     LSR     r7, lr, #10         // r7 = lr >> 8+2
       
   116     CMP     r7, #0x3f           // if r7 > 0x3f
       
   117     BICGT   r7, r4, lr, ASR #31 // then r7 = 0x3f and not sign bit of r8
       
   118     LSR     lr, r9, #11         // lr = r9 >> 8+3
       
   119     CMP     lr, #0x1f           // if lr > 0x1f
       
   120     BICGT   lr, r3, r9, ASR #31 // then lr = 0x1f and not sign bit of r9
       
   121     ORR     lr, lr, r7, LSL #5  // lr now has green and blue
       
   122     ORR     lr, lr, r10, LSL #11    // and red    
       
   123 
       
   124     // second process lower 16 bits of r5
       
   125     AND     r7, r3, r5, LSR #11 // r7 = red?
       
   126     LSL     r7, r7, #3          // convert to 8 bits
       
   127     MLA     r7, r11, r7, r12    // r7 = r7 * r11 + r12
       
   128     AND     r8, r4, r5, LSR #5  // r8 = green?
       
   129     LSL     r8, r8, #2          // convert to 8 bits
       
   130     MLA     r8, r11, r8, r12    // r8 = r8 * r11 + r12
       
   131     AND     r9, r3, r5          // r9 = blue?    
       
   132     LSL     r9, r9, #3          // convert to 8 bits
       
   133     MLA     r9, r11, r9, r12    // r9 = r9 * r11 + r12
       
   134     LSR     r10, r7, #11        // r10 = r7 >> 8+3
       
   135     CMP     r10, #0x1f          // if r10 > 0x1f (max red)
       
   136     BICGT   r10, r3, r7, ASR #31    // then r10 = 0x1f and not sign bit of r7
       
   137     LSR     r7, r8, #10         // r7 = r8 >> 8+2
       
   138     CMP     r7, #0x3f           // if r7 > 0x3f
       
   139     BICGT   r7, r4, r8, ASR #31 // then r7 = 0x3f and not sign bit of r8
       
   140     LSR     r5, r9, #11         // r5 = r9 >> 8+3
       
   141     CMP     r5, #0x1f           // if r5 > 0x1f
       
   142     BICGT   r5, r3, r9, ASR #31 // then r5 = 0x1f and not sign bit of r9
       
   143     ORR     r5, r5, r7, LSL #5  // r5 now has green and blue
       
   144     ORR     r5, r5, r10, LSL #11    // and red
       
   145     ORR     r5, r5, lr, LSL #16 // combine r5 with lr (upper pixel)   
       
   146     
       
   147     // third process upper 16 bits of r6
       
   148     AND     r7, r3, r6, LSR #27 // r7 = red?
       
   149     LSL     r7, r7, #3          // convert to 8 bits
       
   150     MLA     r7, r11, r7, r12    // r7 = r7 * r11 + r12
       
   151     AND     lr, r4, r6, LSR #21 // lr = green?
       
   152     LSL     lr, lr, #2          // convert to 8 bits
       
   153     MLA     lr, r11, lr, r12    // r8 = r8 * r11 + r12
       
   154     AND     r9, r3, r6, LSR #16  // r9 = blue?    
       
   155     LSL     r9, r9, #3          // convert to 8 bits
       
   156     MLA     r9, r11, r9, r12    // r9 = r9 * r11 + r12
       
   157     LSR     r10, r7, #11        // r10 = r7 >> 8+3
       
   158     CMP     r10, #0x1f          // if r10 > 0x1f (max red)
       
   159     BICGT   r10, r3, r7, ASR #31    // then r10 = 0x1f and not sign bit of r7
       
   160     LSR     r7, lr, #10         // r7 = lr >> 8+2
       
   161     CMP     r7, #0x3f           // if r7 > 0x3f
       
   162     BICGT   r7, r4, lr, ASR #31 // then r7 = 0x3f and not sign bit of r8
       
   163     LSR     lr, r9, #11         // lr = r9 >> 8+3
       
   164     CMP     lr, #0x1f           // if lr > 0x1f
       
   165     BICGT   lr, r3, r9, ASR #31 // then lr = 0x1f and not sign bit of r9
       
   166     ORR     lr, lr, r7, LSL #5  // lr now has green and blue
       
   167     ORR     lr, lr, r10, LSL #11    // and red    
       
   168 
       
   169     // last process lower 16 bits of r6
       
   170     AND     r7, r3, r6, LSR #11 // r7 = red?
       
   171     LSL     r7, r7, #3          // convert to 8 bits
       
   172     MLA     r7, r11, r7, r12    // r7 = r7 * r11 + r12
       
   173     AND     r8, r4, r6, LSR #5  // r8 = green?
       
   174     LSL     r8, r8, #2          // convert to 8 bits
       
   175     MLA     r8, r11, r8, r12    // r8 = r8 * r11 + r12
       
   176     AND     r9, r3, r6          // r9 = blue?    
       
   177     LSL     r9, r9, #3          // convert to 8 bits
       
   178     MLA     r9, r11, r9, r12    // r9 = r9 * r11 + r12
       
   179     LSR     r10, r7, #11        // r10 = r7 >> 8+3
       
   180     CMP     r10, #0x1f          // if r10 > 0x1f (max red)
       
   181     BICGT   r10, r3, r7, ASR #31    // then r10 = 0x1f and not sign bit of r7
       
   182     LSR     r7, r8, #10         // r7 = r8 >> 8+2
       
   183     CMP     r7, #0x3f           // if r7 > 0x3f
       
   184     BICGT   r7, r4, r8, ASR #31 // then r7 = 0x3f and not sign bit of r8
       
   185     LSR     r6, r9, #11         // r6 = r9 >> 8+3
       
   186     CMP     r6, #0x1f           // if r6 > 0x1f
       
   187     BICGT   r6, r3, r9, ASR #31 // then r6 = 0x1f and not sign bit of r9
       
   188     ORR     r6, r6, r7, LSL #5  // r6 now has green and blue
       
   189     ORR     r6, r6, r10, LSL #11    // and red
       
   190     ORR     r6, r6, lr, LSL #16 // combine r6 with lr (upper pixel)   
       
   191 
       
   192     STMIA   r0!, {r5-r6}        // store 4 pixels from r5-r6
       
   193     
       
   194     SUBS    r2, r2, #1
       
   195     BNE     processloop64k
       
   196     
       
   197 processlastpixels64k
       
   198 
       
   199     POP     {r10}
       
   200     CMP     r10, #0
       
   201     BEQ     processend64k      // no more pixels to process
       
   202     
       
   203 processlastloop64k
       
   204 
       
   205     LDRH    r5, [r1], #2        // load pixel to r5
       
   206     AND     r7, r3, r5, LSR #11 // r7 = red?
       
   207     LSL     r7, r7, #3          // convert to 8 bits
       
   208     MLA     r7, r11, r7, r12    // r7 = r7 * r11 + r12
       
   209     AND     r8, r4, r5, LSR #5  // r8 = green?
       
   210     LSL     r8, r8, #2          // convert to 8 bits
       
   211     MLA     r8, r11, r8, r12    // r8 = r8 * r11 + r12
       
   212     AND     r9, r3, r5          // r9 = blue?    
       
   213     LSL     r9, r9, #3          // convert to 8 bits
       
   214     MLA     r9, r11, r9, r12    // r9 = r9 * r11 + r12
       
   215     LSR     r6, r7, #11         // r6 = r7 >> 8+3
       
   216     CMP     r6, #0x1f           // if r6 > 0x1f (max red)
       
   217     BICGT   r6, r3, r7, ASR #31 // then r6 = 0x1f and not sign bit of r7
       
   218     LSR     r7, r8, #10         // r7 = r8 >> 8+2
       
   219     CMP     r7, #0x3f           // if r7 > 0x3f
       
   220     BICGT   r7, r4, r8, ASR #31 // then r7 = 0x3f and not sign bit of r8
       
   221     LSR     r5, r9, #11         // r5 = r9 >> 8+3
       
   222     CMP     r5, #0x1f           // if r5 > 0x1f
       
   223     BICGT   r5, r3, r9, ASR #31 // then r5 = 0x1f and not sign bit of r9
       
   224     ORR     r5, r5, r7, LSL #5  // r5 now has green and blue
       
   225     ORR     r5, r5, r6, LSL #11 // and red
       
   226     STRH    r5, [r0], #2        // write pixel to target
       
   227 
       
   228     SUBS    r10, r10, #1
       
   229     BNE     processlastloop64k
       
   230     
       
   231 processend64k
       
   232     
       
   233     POP     {r0-r12,pc}
       
   234     //BX lr
       
   235 #endif // ARM_VERSION
       
   236     }
       
   237     
       
   238     
       
   239 #ifndef ARM_VERSION
       
   240 __NAKED__ void ADoContrast16MU( TUint*, TUint*, TInt, TInt )
       
   241     {
       
   242     
       
   243 //    return;
       
   244 #else
       
   245 __NAKED__ void ADoContrast16MU( TUint* aBaseT,
       
   246                                 TUint* aBaseS,
       
   247                                 TInt aPixelCount,
       
   248                                 TInt aAdjustment)
       
   249     {
       
   250 //    Parameters:
       
   251 //    r0 = target,
       
   252 //    r1 = source,
       
   253 //    r2 = pixelcount,
       
   254 //    r3 = contrast adjustment parameter
       
   255 
       
   256     PUSH    {r0-r12,lr}
       
   257     
       
   258     SUB     r12, r3, r3, LSL #7 // r12 = -(127 * aAdjustment)
       
   259     ADD     r11, r3, #0xff      // r11 = 255 + aAdjustment
       
   260 
       
   261     MOV     lr, #0xff           // used in saturation
       
   262         
       
   263     AND     r10, r2, #0x3       // save last pixels
       
   264     LSRS    r2, r2, #2          // we process 4 pixel at time, so divide counter by 4
       
   265     BEQ     processlastpixels   // less than 4 pixels to process
       
   266     
       
   267 processloop
       
   268     
       
   269     LDMIA   r1!, {r4-r7}        // load 4 pixels to r4-r7
       
   270 
       
   271     AND     r8, lr, r4, LSR #16
       
   272     MLA     r8, r11, r8, r12    // r8 = r8 * r11 + r12
       
   273     AND     r9, lr, r4, LSR #8
       
   274     MLA     r9, r11, r9, r12
       
   275     AND     r4, r4, #0xff       // r4 = blue?
       
   276     MLA     r4, r11, r4, r12
       
   277     MOV     r3, r8, LSR #8      // r3 = r8 >> 8
       
   278     CMP     r3, #0xff           // if r8 was negative or shifted r8 > 255
       
   279     BICGT   r3, lr, r8, ASR #31 // then r3 is either 0 or 255
       
   280     LSR     r8, r9, #8
       
   281     CMP     r8, #0xff
       
   282     BICGT   r8, lr, r9, ASR #31
       
   283     LSR     r9, r4, #8
       
   284     CMP     r9, #0xff
       
   285     BICGT   r9, lr, r4, ASR #31
       
   286     ORR     r4, r9, #0xff000000 // set blue and alpha
       
   287     ORR     r4, r4, r3, LSL #16 // combine blue with red
       
   288     ORR     r4, r4, r8, LSL #8  // combine blue+red with green
       
   289         
       
   290     AND     r8, lr, r5, LSR #16
       
   291     MLA     r8, r11, r8, r12    // r8 = r8 * r11 + r12
       
   292     AND     r9, lr, r5, LSR #8  // r9 = green?
       
   293     MLA     r9, r11, r9, r12
       
   294     AND     r5, r5, #0xff       // r5 = blue?
       
   295     MLA     r5, r11, r5, r12
       
   296     MOV     r3, r8, LSR #8      // r3 = r8 >> 8
       
   297     CMP     r3, #0xff           // if r8 was negative or shifted r8 > 255
       
   298     BICGT   r3, lr, r8, ASR #31 // then r3 is either 0 or 255
       
   299     LSR     r8, r9, #8
       
   300     CMP     r8, #0xff
       
   301     BICGT   r8, lr, r9, ASR #31
       
   302     LSR     r9, r5, #8
       
   303     CMP     r9, #0xff
       
   304     BICGT   r9, lr, r5, ASR #31
       
   305     ORR     r5, r9, #0xff000000 // set blue and alpha
       
   306     ORR     r5, r5, r3, LSL #16 // combine blue with red
       
   307     ORR     r5, r5, r8, LSL #8  // combine blue+red with green
       
   308 
       
   309     AND     r8, lr, r6, LSR #16
       
   310     MLA     r8, r11, r8, r12    // r8 = r8 * r11 + r12
       
   311     AND     r9, lr, r6, LSR #8  // r9 = green?    
       
   312     MLA     r9, r11, r9, r12
       
   313     AND     r6, r6, #0xff       // r6 = blue?
       
   314     MLA     r6, r11, r6, r12
       
   315     MOV     r3, r8, LSR #8      // r3 = r8 >> 8
       
   316     CMP     r3, #0xff           // if r8 was negative or shifted r8 > 255
       
   317     BICGT   r3, lr, r8, ASR #31 // then r3 is either 0 or 255
       
   318     LSR     r8, r9, #8
       
   319     CMP     r8, #0xff
       
   320     BICGT   r8, lr, r9, ASR #31
       
   321     LSR     r9, r6, #8
       
   322     CMP     r9, #0xff
       
   323     BICGT   r9, lr, r6, ASR #31
       
   324     ORR     r6, r9, #0xff000000 // set blue and alpha
       
   325     ORR     r6, r6, r3, LSL #16 // combine blue with red
       
   326     ORR     r6, r6, r8, LSL #8  // combine blue+red with green
       
   327 
       
   328     AND     r8, lr, r7, LSR #16
       
   329     MLA     r8, r11, r8, r12    // r8 = r8 * r11 + r12
       
   330     AND     r9, lr, r7, LSR #8  // r9 = green?    
       
   331     MLA     r9, r11, r9, r12
       
   332     AND     r7, r7, #0xff       // r7 = blue?
       
   333     MLA     r7, r11, r7, r12
       
   334     MOV     r3, r8, LSR #8      // r3 = r8 >> 8
       
   335     CMP     r3, #0xff           // if r8 was negative or shifted r8 > 255
       
   336     BICGT   r3, lr, r8, ASR #31 // then r3 is either 0 or 255
       
   337     LSR     r8, r9, #8
       
   338     CMP     r8, #0xff
       
   339     BICGT   r8, lr, r9, ASR #31
       
   340     LSR     r9, r7, #8
       
   341     CMP     r9, #0xff
       
   342     BICGT   r9, lr, r7, ASR #31
       
   343     ORR     r7, r9, #0xff000000 // set blue and alpha
       
   344     ORR     r7, r7, r3, LSL #16 // combine blue with red
       
   345     ORR     r7, r7, r8, LSL #8  // combine blue+red with green
       
   346     
       
   347     STMIA   r0!, {r4-r7}        // store 4 pixels from r4-r7
       
   348     
       
   349     SUBS    r2, r2, #1
       
   350     BNE     processloop
       
   351     
       
   352 processlastpixels
       
   353 
       
   354     CMP     r10, #0
       
   355     BEQ     processend      // no more pixels to process
       
   356     
       
   357 processlastloop
       
   358 
       
   359     LDR     r4, [r1], #4
       
   360     
       
   361     AND     r8, lr, r4, LSR #16
       
   362     MLA     r8, r11, r8, r12    // r8 = r8 * r11 + r12
       
   363     AND     r9, lr, r4, LSR #8
       
   364     MLA     r9, r11, r9, r12
       
   365     AND     r4, r4, #0xff       // r4 = blue?
       
   366     MLA     r4, r11, r4, r12
       
   367     MOV     r3, r8, LSR #8      // r3 = r8 >> 8
       
   368     CMP     r3, #0xff           // if r8 was negative or shifted r8 > 255
       
   369     BICGT   r3, lr, r8, ASR #31 // then r3 is either 0 or 255
       
   370     LSR     r8, r9, #8
       
   371     CMP     r8, #0xff
       
   372     BICGT   r8, lr, r9, ASR #31
       
   373     LSR     r9, r4, #8
       
   374     CMP     r9, #0xff
       
   375     BICGT   r9, lr, r4, ASR #31
       
   376     ORR     r4, r9, #0xff000000 // set blue and alpha
       
   377     ORR     r4, r4, r3, LSL #16 // combine blue with red
       
   378     ORR     r4, r4, r8, LSL #8  // combine blue+red with green
       
   379     
       
   380     STR     r4, [r0], #4
       
   381     SUBS    r10, r10, #1
       
   382     BNE     processlastloop
       
   383     
       
   384 processend
       
   385     
       
   386     POP     {r0-r12,pc}
       
   387     //BX lr
       
   388 #endif // ARM_VERSION
       
   389     }
       
   390     
       
   391 #pragma warning(default : 4100)
       
   392 
       
   393 // End of File