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1 // Copyright (c) 2009 Nokia Corporation and/or its subsidiary(-ies). |
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2 // All rights reserved. |
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3 // This component and the accompanying materials are made available |
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4 // under the terms of the License "Eclipse Public License v1.0" |
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5 // which accompanies this distribution, and is available |
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6 // at the URL "http://www.eclipse.org/legal/epl-v10.html". |
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7 // |
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8 // Initial Contributors: |
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9 // Nokia Corporation - initial contribution. |
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10 // |
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11 // Contributors: |
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12 // |
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13 // Description: |
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14 // This is a test for the PCI driver, so far implemented only on the |
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15 // Naviengine platform. It aims to test: |
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16 // -That known values of data in config and memory space, on a given |
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17 // device can be read as expected. |
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18 // -That data can be written and modified in config and memory space |
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19 // -PCI memory buffers mapped or allocated by the PCI driver work as |
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20 // expected. These are |
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21 // -DChunk created by PCI driver and accessible from PCI |
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22 // -DPlatHwChunk created by PCI driver and accessible from PCI |
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23 // -DChunk created externally, then mapped in to PCI memory space |
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24 // There are tests to: |
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25 // - Create and close each buffer. Heap checking ensures proper |
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26 // cleanup |
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27 // - Create and close multiple buffers from multiple threads. |
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28 // This is an SMP focused test to check that the implementation |
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29 // of the chunk manager and allocator in the driver are thread |
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30 // safe. The tests should pass without triggering any assertions in |
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31 // the driver's invariance checks. |
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32 // - Write to buffers from software, and read back via the |
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33 // system to PCI window, and vice-versa -- a loop-back test. |
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34 // This checks that PCI buffers are indeed accessible to PCI devices. |
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35 // |
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36 // The tests require several pieces of PSL specific information: |
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37 // - A TPciDevice containing the vendor and device IDs of a PCI device |
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38 // to use for testing. |
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39 // - TAddrSpaceTests which identify regions of a device's config and |
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40 // memory space with known values, or which are known to be writable. |
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41 // |
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42 // The test driver grants access to the PCI API with the following |
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43 // constructs: |
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44 // - TUserConfigSpace and TUserMemorySpace, derived from TUserPciSpace, |
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45 // which are user side equivalents of kernel-side objects allowing |
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46 // accesses of different sizes to a PCI device's config space or |
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47 // memory space. |
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48 // - RPciChunk which is derived from and RChunk and corresponds to |
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49 // a kernel-side DChunk, which in turn corresponds to a PCI chunk or |
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50 // buffer. The test driver uses these for all PCI chunk types (a |
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51 // "wrapper" DChunk is used to map the memory of a PCI DPlatHwChunk |
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52 // to user side). |
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53 // |
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54 // Known Issues: |
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55 // The test driver d_pci is intended to be platform independent but |
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56 // for now still contains some PSL specific information .eg the test |
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57 // info structure (which should really be passed up from the PSL) and |
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58 // the address and size of the system to pci window. For now the |
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59 // test driver code will remain in the Naviengine baseport directory. |
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60 // If the PCI driver is ever ported to a new platform this can be |
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61 // rectified. |
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62 // |
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63 // |
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64 // |
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65 #include <e32std.h> |
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66 #define __E32TEST_EXTENSION__ |
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67 #include <e32test.h> |
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68 #include "t_pci.h" |
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69 #include <assp/naviengine/pci.h> |
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70 |
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71 #define __E32TEST_EXTENSION__ |
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72 #include <e32test.h> |
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73 #include <e32svr.h> |
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74 #include <e32des8.h> |
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75 #include <e32des8_private.h> |
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76 #include <e32cmn.h> |
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77 #include <e32cmn_private.h> |
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78 #include <e32std.h> |
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79 #include <e32std_private.h> |
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80 |
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81 |
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82 _LIT(KPciPanicCat, "test_thread.h"); |
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83 |
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84 static const TInt KPciHeapSize=0x2000; |
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85 |
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86 enum TPciPanicCode |
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87 { |
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88 EThreadCreateFailed |
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89 }; |
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90 |
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91 /** |
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92 A utility class for running functions in other threads/processes |
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93 */ |
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94 class TTestRemote |
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95 { |
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96 public: |
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97 virtual TInt WaitForExitL() = 0; |
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98 virtual ~TTestRemote() |
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99 {} |
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100 |
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101 virtual void Rendezvous(TRequestStatus& aStatus) = 0; |
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102 |
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103 protected: |
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104 TTestRemote() |
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105 {} |
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106 |
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107 static TInt RunFunctor(TAny* aFunctor) |
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108 { |
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109 TFunctor& functor = *(TFunctor*)aFunctor; |
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110 functor(); |
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111 return KErrNone; |
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112 } |
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113 |
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114 TRequestStatus iLogonStatus; |
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115 static TInt iCount; |
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116 }; |
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117 TInt TTestRemote::iCount=0; |
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118 |
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119 class TTestThread : public TTestRemote |
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120 { |
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121 public: |
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122 TTestThread(const TDesC& aName, TThreadFunction aFn, TAny* aData, TBool aAutoResume=ETrue) |
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123 { |
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124 Init(aName, aFn, aData, aAutoResume); |
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125 } |
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126 |
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127 /** |
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128 Run aFunctor in another thread |
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129 */ |
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130 TTestThread(const TDesC& aName, TFunctor& aFunctor, TBool aAutoResume=ETrue) |
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131 { |
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132 Init(aName, RunFunctor, &aFunctor, aAutoResume); |
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133 } |
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134 |
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135 ~TTestThread() |
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136 { |
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137 //RTest::CloseHandleAndWaitForDestruction(iThread); |
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138 iThread.Close(); |
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139 } |
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140 |
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141 void Resume() |
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142 { |
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143 iThread.Resume(); |
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144 } |
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145 |
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146 /** |
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147 If thread exited normally, return its return code |
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148 Otherwise, leave with exit reason |
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149 */ |
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150 virtual TInt WaitForExitL() |
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151 { |
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152 User::WaitForRequest(iLogonStatus); |
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153 const TInt exitType = iThread.ExitType(); |
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154 const TInt exitReason = iThread.ExitReason(); |
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155 |
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156 __ASSERT_ALWAYS(exitType != EExitPending, User::Panic(_L("TTestThread"),0)); |
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157 |
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158 if(exitType != EExitKill) |
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159 User::Leave(exitReason); |
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160 |
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161 return exitReason; |
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162 } |
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163 |
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164 virtual void Rendezvous(TRequestStatus& aStatus) |
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165 { |
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166 iThread.Rendezvous(aStatus); |
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167 } |
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168 |
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169 private: |
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170 void Init(const TDesC& aName, TThreadFunction aFn, TAny* aData, TBool aAutoResume) |
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171 { |
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172 TKName name(aName); |
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173 name.AppendFormat(_L("-%d"), iCount++); |
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174 TInt r=iThread.Create(name, aFn, KDefaultStackSize, KPciHeapSize, KPciHeapSize, aData); |
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175 if(r!=KErrNone) |
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176 { |
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177 RDebug::Printf("RThread::Create failed, code=%d", r); |
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178 User::Panic(KPciPanicCat, EThreadCreateFailed); |
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179 } |
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180 |
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181 iThread.Logon(iLogonStatus); |
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182 __ASSERT_ALWAYS(iLogonStatus == KRequestPending, User::Panic(_L("TTestThread"),0)); |
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183 |
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184 if(aAutoResume) |
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185 iThread.Resume(); |
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186 } |
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187 |
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188 RThread iThread; |
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189 }; |
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190 |
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191 class CTest : public CBase, public TFunctor |
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192 { |
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193 public: |
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194 ~CTest() |
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195 { |
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196 iName.Close(); |
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197 } |
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198 |
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199 virtual void operator()() |
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200 { |
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201 RTest test(iName); |
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202 test.Start(iName); |
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203 for(TInt i=0; i<iIterations; i++) |
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204 { |
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205 test.Next(iName); |
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206 RunTest(); |
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207 } |
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208 test.End(); |
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209 } |
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210 |
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211 virtual void RunTest() = 0; |
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212 |
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213 virtual CTest* Clone() const = 0; |
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214 |
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215 const TDesC& Name() const |
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216 { |
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217 return iName; |
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218 } |
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219 |
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220 protected: |
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221 CTest(const TDesC& aName, TInt aIterations) |
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222 :iIterations(aIterations) |
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223 { |
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224 iName.CreateL(aName); |
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225 } |
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226 |
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227 |
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228 |
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229 CTest(const CTest& aOther) |
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230 :iIterations(aOther.iIterations) |
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231 { |
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232 iName.CreateL(aOther.iName); |
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233 } |
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234 |
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235 //It would be useful to have an RTest member, but this can't be |
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236 //initialised untill the new thread is running as it will refer to |
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237 //the creating thread |
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238 RBuf iName; |
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239 const TInt iIterations; |
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240 }; |
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241 |
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242 /** |
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243 Make aNumberOfThreads copies of aTest and run |
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244 each in its own thread |
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245 |
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246 @param test Reference to test object |
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247 @param aTest Referance |
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248 */ |
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249 void MultipleTestRun(RTest& test, const CTest& aTest, TInt aNumberOfThreads) |
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250 { |
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251 RPointerArray<CTest> testArray; |
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252 RPointerArray<TTestThread> threadArray; |
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253 |
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254 for(TInt i=0; i<aNumberOfThreads; i++) |
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255 { |
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256 test.Printf(_L("Create test thread")); |
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257 CTest* newTest = aTest.Clone(); |
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258 test_NotNull(newTest); |
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259 |
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260 TTestThread* thread = new TTestThread(aTest.Name(), *newTest); |
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261 test_NotNull(thread); |
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262 |
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263 threadArray.AppendL(thread); |
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264 testArray.AppendL(newTest); |
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265 } |
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266 |
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267 const TInt count = threadArray.Count(); |
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268 for(TInt j=0; j<count; j++) |
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269 { |
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270 TTestThread* thread = threadArray[j]; |
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271 |
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272 TInt r = KErrNone; |
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273 TRAPD(leaveCode, r = thread->WaitForExitL()); |
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274 if(leaveCode != KErrNone) |
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275 { |
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276 test.Printf(_L("Thread %d: Panic code:%d\n"), j, leaveCode); |
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277 test_KErrNone(leaveCode); |
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278 } |
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279 |
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280 if(r!=KErrNone) |
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281 { |
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282 test.Printf(_L("Thread Number %d\n"), j); |
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283 test_KErrNone(r); |
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284 } |
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285 } |
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286 |
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287 threadArray.ResetAndDestroy(); |
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288 threadArray.Close(); |
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289 |
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290 testArray.ResetAndDestroy(); |
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291 testArray.Close(); |
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292 } |
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293 |
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294 class RPci; |
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295 /** |
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296 Extends RChunk to hold the PCI address |
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297 associated with a chunk. |
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298 */ |
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299 class RPciChunk: public RChunk |
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300 { |
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301 public: |
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302 TUint PciBase() |
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303 { |
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304 return iPciBaseAddr; |
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305 } |
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306 |
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307 /** |
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308 Return the PCI accessible size |
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309 */ |
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310 TInt Size() const |
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311 { |
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312 return iPciSize; |
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313 } |
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314 |
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315 private: |
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316 friend class RPci; |
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317 TUint iPciBaseAddr; |
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318 TInt iPciSize; //size of the region mapped into PCI |
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319 }; |
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320 |
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321 typedef TInt (RPci::*ChunkOpenFn)(RPciChunk&, TInt, TRequestStatus*); |
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322 |
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323 class RPci : public RBusLogicalChannel |
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324 { |
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325 public: |
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326 TInt Open(); |
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327 TInt GetTestInfo(TPciTestInfo& aTestInfo); |
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328 |
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329 TInt Open(const TPciDevice&); |
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330 |
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331 TUint AccessConfigSpace(const TUserConfigSpace& aCs); |
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332 TUint AccessMemorySpace(const TUserMemorySpace& aMs); |
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333 TInt OpenPciDChunk(RPciChunk& aPciChunk,TInt aPciChunkSize, TRequestStatus* aStatus=0); |
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334 TInt OpenPciPlatHwChunk(RPciChunk& aPciHwChunk,TInt aPciChunkSize, TRequestStatus* aStatus=0); |
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335 TInt OpenPciMappedChunk(RPciChunk& aPciMappedChunk,TInt aPciChunkSize, TRequestStatus* aStatus=0); |
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336 TInt OpenPciWindowChunk(RChunk& aPciWindowChunk); |
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337 TInt RunUnitTests(); |
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338 private: |
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339 TInt DoOpenPciChunk(RPciChunk& aPciChunk, TInt aPciChunkSize, TPciTestCmd aCmd, TRequestStatus* aStatus); |
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340 }; |
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341 |
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342 inline TInt RPci::Open() |
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343 { |
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344 return DoCreate(KPciLddFactory, TVersion(), KNullUnit, NULL, NULL); |
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345 } |
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346 |
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347 inline TInt RPci::Open(const TPciDevice& aDevice) |
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348 { |
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349 TPckgC<TPciDevice> devicePkg(aDevice); |
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350 return DoCreate(KPciLddFactory, TVersion(), KNullUnit, NULL, &devicePkg); |
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351 } |
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352 |
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353 inline TInt RPci::GetTestInfo(TPciTestInfo& aTestInfo) |
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354 { |
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355 TPckg<TPciTestInfo> info(aTestInfo); |
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356 return DoControl(EGetTestInfo, &info); |
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357 } |
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358 |
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359 inline TInt RPci::RunUnitTests() |
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360 { |
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361 return DoControl(ERunUnitTests); |
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362 } |
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363 |
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364 TUint RPci::AccessConfigSpace(const TUserConfigSpace& aCs) |
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365 { |
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366 TPckgC<TUserConfigSpace> pkg(aCs); |
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367 return DoControl(EAccessConfigSpace, &pkg); |
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368 } |
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369 |
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370 TUint RPci::AccessMemorySpace(const TUserMemorySpace& aMs) |
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371 { |
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372 TPckgC<TUserMemorySpace> pkg(aMs); |
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373 return DoControl(EAccessMemorySpace, &pkg); |
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374 } |
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375 |
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376 TInt RPci::OpenPciDChunk(RPciChunk& aPciChunk,TInt aPciChunkSize, TRequestStatus* aStatus) |
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377 { |
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378 return DoOpenPciChunk(aPciChunk, aPciChunkSize, EOpenPciDChunk, aStatus); |
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379 } |
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380 |
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381 TInt RPci::OpenPciPlatHwChunk(RPciChunk& aPciHwChunk,TInt aPciChunkSize, TRequestStatus* aStatus) |
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382 { |
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383 return DoOpenPciChunk(aPciHwChunk, aPciChunkSize, EOpenPciPlatHwChunk, aStatus); |
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384 } |
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385 |
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386 TInt RPci::OpenPciMappedChunk(RPciChunk& aPciMappedChunk,TInt aPciChunkSize, TRequestStatus* aStatus) |
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387 { |
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388 return DoOpenPciChunk(aPciMappedChunk, aPciChunkSize, EOpenPciMappedChunk, aStatus); |
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389 } |
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390 |
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391 TInt RPci::OpenPciWindowChunk(RChunk& aPciWindowChunk) |
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392 { |
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393 TUint chunkHandle = DoControl(EOpenPciWindowChunk); |
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394 return aPciWindowChunk.SetReturnedHandle(chunkHandle); |
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395 } |
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396 |
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397 TInt RPci::DoOpenPciChunk(RPciChunk& aPciChunk, TInt aPciChunkSize, TPciTestCmd aCmd, TRequestStatus* aStatus) |
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398 { |
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399 const TInt constPciChunkSize = aPciChunkSize; |
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400 TPciChunkCreateInfo info(constPciChunkSize, aPciChunk.iPciBaseAddr, aStatus); |
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401 TPckgC<TPciChunkCreateInfo> pkg(info); |
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402 |
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403 TUint chunkHandle = DoControl(aCmd, &pkg); |
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404 |
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405 const TInt r = aPciChunk.SetReturnedHandle(chunkHandle); |
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406 if(r == KErrNone) |
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407 { |
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408 aPciChunk.iPciSize = constPciChunkSize; |
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409 } |
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410 return r; |
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411 } |
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412 |
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413 TUserPciSpace::TUserPciSpace(RPci& aPci) |
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414 :iPci(&aPci) |
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415 {} |
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416 |
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417 TUserConfigSpace::TUserConfigSpace(RPci& aPci) |
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418 :TUserPciSpace(aPci) |
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419 {} |
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420 |
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421 TUint TUserConfigSpace::Call() |
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422 { |
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423 return iPci->AccessConfigSpace(*this); |
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424 } |
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425 |
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426 TUserPciSpace* TUserConfigSpace::Clone() const |
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427 { |
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428 return new TUserConfigSpace(*this); |
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429 } |
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430 |
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431 TUserMemorySpace::TUserMemorySpace(RPci& aPci, TInt aBarIndex) |
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432 :TUserPciSpace(aPci), iBarIndex(aBarIndex) |
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433 {} |
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434 |
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435 TUint TUserMemorySpace::Call() |
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436 { |
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437 return iPci->AccessMemorySpace(*this); |
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438 } |
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439 |
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440 TUserPciSpace* TUserMemorySpace::Clone() const |
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441 { |
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442 return new TUserMemorySpace(*this); |
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443 } |
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444 |
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445 /** |
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446 Test address allocator |
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447 */ |
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448 TInt TestRunPciUnitTest(RPci& pci) |
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449 { |
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450 return pci.RunUnitTests(); |
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451 } |
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452 |
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453 |
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454 /** |
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455 Read from a defined address in memory or config space, compare against expected values. |
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456 8,16, and 32 bit accesses performed. |
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457 |
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458 @param aSpace Object gving access to either the config or memory space of a PCI device |
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459 @param aInfo Contains the address and expected value of a dword |
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460 */ |
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461 void TestReadAddressSpace(TUserPciSpace& aSpace, const TPciTestInfo::TAddrSpaceTest& aInfo, RTest& test, TBool aVerbose=EFalse) |
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462 { |
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463 const TUint os = aInfo.iOffset; |
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464 //Iterate over different widths, and possible |
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465 //subfields of 32 bit word |
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466 for(TInt bitWidth=32; bitWidth>=8; bitWidth>>=1) |
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467 { |
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468 const TInt numberOfFields = (32/bitWidth); |
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469 for(TInt i=0; i< numberOfFields; i++) |
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470 { |
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471 const TInt extraByteOffset = i * (bitWidth >> 3); |
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472 const TInt byteOffset = os + extraByteOffset; |
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473 if(aVerbose) |
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474 test.Printf(_L("Access bitWidth=%d byte offset=%d\n"), bitWidth, byteOffset); |
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475 |
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476 const TUint expected = aInfo.Expected(bitWidth, byteOffset); |
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477 const TUint read = aSpace.Read(bitWidth, byteOffset); |
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478 if(aVerbose) |
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479 test.Printf(_L("expect 0x%08x, read 0x%08x\n"), expected, read); |
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480 test_Equal(expected, read); |
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481 } |
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482 } |
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483 } |
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484 |
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485 /** |
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486 Verify writes and modifications to a defined address in memory or config space. 8,16, and 32 bit |
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487 accesses performed. |
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488 |
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489 @param aSpace Object gving access to either the config or memory space of a PCI device |
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490 @param aInfo Contains the address of a (at least partially) writable dword |
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491 */ |
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492 void TestWriteAddressSpace(TUserPciSpace& aSpace, TPciTestInfo::TAddrSpaceTest& aInfo, RTest& test, TBool aVerbose=EFalse) |
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493 { |
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494 const TUint original = aSpace.Read(32, aInfo.iOffset); |
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495 const TUint os = aInfo.iOffset; |
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496 TUint mask = ~aInfo.iReadOnlyMask; |
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497 |
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498 //The pattern will be truncated when used with bit widths |
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499 //less than 32. |
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500 const TUint initPattern = 0xFFFFFFFF; |
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501 |
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502 for(TInt bitWidth=32; bitWidth>=8; bitWidth>>=1) |
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503 { |
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504 const TUint pattern = initPattern >> (32-bitWidth); |
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505 const TInt numberOfFields = (32/bitWidth); |
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506 for(TInt i=0; i< numberOfFields; i++) |
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507 { |
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508 const TInt extraByteOffset = i * (bitWidth >> 3); |
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509 const TInt byteOffset = os + extraByteOffset; |
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510 if(aVerbose) |
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511 test.Printf(_L("Access bitWidth=%d byte offset=%d\n"), bitWidth, byteOffset); |
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512 //the full dword we expect |
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513 //currently assume that the unwritable bits will be 0 |
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514 const TUint writeExpect = (pattern << (bitWidth * i) ) & mask; |
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515 const TUint clearExpect = 0; |
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516 |
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517 //do write followed by clear |
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518 const TUint expect[] = {writeExpect, clearExpect}; |
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519 const TUint write[] = {pattern, 0}; |
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520 for(TInt n = 0; n < 2; n++) |
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521 { |
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522 aSpace.Write(bitWidth, byteOffset, write[n]); |
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523 TUint result = aSpace.Read(32, os); |
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524 |
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525 if(aVerbose) |
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526 test.Printf(_L("wrote 0x%08x, expect 0x%08x, read 0x%08x\n"), |
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527 write[n], expect[n], result); |
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528 test_Equal(expect[n], result); |
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529 } |
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530 |
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531 //test Modify calls. Set then clear pattern |
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532 TUint set[] = {pattern, 0}; |
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533 TUint clear[] = {0, pattern}; |
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534 |
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535 for(TInt m = 0; m < 2; m++) |
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536 { |
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537 aSpace.Modify(bitWidth, byteOffset, clear[m], set[m]); |
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538 TUint result = aSpace.Read(32, os); |
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539 |
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540 if(aVerbose) |
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541 test.Printf(_L("clear 0x%08x, set 0x%08x, expect 0x%08x, read 0x%08x\n"), clear[m], set[m], expect[m], result); |
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542 test_Equal(expect[m], result); |
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543 } |
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544 } |
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545 } |
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546 |
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547 //restore orginal value or we will not be able to access device |
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548 aSpace.Write(32, os, original); |
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549 } |
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550 |
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551 |
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552 /** |
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553 Verify that a PCI DChunk can be opened and closed from user side |
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554 |
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555 @param pci The RPci object to use |
|
556 @param test The RTest object to use |
|
557 @param aPciChunkSize The size of the DChunk which would be created |
|
558 */ |
|
559 void TestOpenAndCloseDChunk(RPci& pci,RTest& test,TInt aPciChunkSize) |
|
560 { |
|
561 RPciChunk testPciDChunk; |
|
562 |
|
563 // Create and open Chunk |
|
564 TRequestStatus status; |
|
565 TInt r = pci.OpenPciDChunk(testPciDChunk,aPciChunkSize, &status); |
|
566 test_KErrNone(r); |
|
567 |
|
568 test(testPciDChunk.IsWritable()); |
|
569 test(testPciDChunk.IsReadable()); |
|
570 |
|
571 test.Printf(_L("PCI Chunk base = 0x%08x\n"), testPciDChunk.Base()); |
|
572 test.Printf(_L("PCI Chunk size = %d\n"), testPciDChunk.Size()); |
|
573 test.Printf(_L("PCI Address = 0x%08x\n"), testPciDChunk.PciBase()); |
|
574 |
|
575 //Close Chunk |
|
576 test.Next(_L("Close PCI Chunk handle")); |
|
577 |
|
578 RTest::CloseHandleAndWaitForDestruction(testPciDChunk); |
|
579 User::WaitForRequest(status); |
|
580 } |
|
581 |
|
582 /** |
|
583 Verify that a PCI PlatHwChunk can be opened and closed from user side |
|
584 |
|
585 |
|
586 @param pci The RPci object to use |
|
587 @param test The RTest object to use |
|
588 @param aPciChunkSize The size of the PlatHwChunk which would be created |
|
589 */ |
|
590 void TestOpenAndClosePciPlatHwChunk(RPci& pci,RTest& test,TInt aPciChunkSize) |
|
591 { |
|
592 RPciChunk testPciPlatHwChunk; |
|
593 |
|
594 // Create and open Chunk |
|
595 TRequestStatus status; |
|
596 TInt r = pci.OpenPciPlatHwChunk(testPciPlatHwChunk,aPciChunkSize, &status); |
|
597 test_KErrNone(r); |
|
598 |
|
599 test(testPciPlatHwChunk.IsWritable()); |
|
600 test(testPciPlatHwChunk.IsReadable()); |
|
601 |
|
602 test.Printf(_L("PCI Chunk base = 0x%08x\n"), testPciPlatHwChunk.Base()); |
|
603 test.Printf(_L("PCI Chunk size = %d\n"), testPciPlatHwChunk.Size()); |
|
604 test.Printf(_L("PCI Address = 0x%08x\n"), testPciPlatHwChunk.PciBase()); |
|
605 |
|
606 //Close Chunk |
|
607 testPciPlatHwChunk.Close(); |
|
608 User::WaitForRequest(status); |
|
609 test.Next(_L("Closed PCI PlatHwChunk handle")); |
|
610 } |
|
611 |
|
612 /** |
|
613 Verify that pci-mapped DChunk can be opended and closed form user side |
|
614 |
|
615 @param pci The RPci object to use |
|
616 @param test The RTest object to use |
|
617 @param aPciChunkSize The size of the pci-mapped DChunk which would be created |
|
618 */ |
|
619 void TestPciMapppedChunk(RPci& pci,RTest& test,TInt aPciChunkSize) |
|
620 { |
|
621 RPciChunk testPciMappedChunk; |
|
622 |
|
623 // Create and open Chunk |
|
624 TRequestStatus status; |
|
625 TInt r = pci.OpenPciMappedChunk(testPciMappedChunk,aPciChunkSize, &status); |
|
626 test_KErrNone(r); |
|
627 |
|
628 test(testPciMappedChunk.IsWritable()); |
|
629 test(testPciMappedChunk.IsReadable()); |
|
630 |
|
631 test.Printf(_L("PCI Chunk base = 0x%08x\n"), testPciMappedChunk.Base()); |
|
632 test.Printf(_L("PCI Chunk size = %d\n"), testPciMappedChunk.Size()); |
|
633 test.Printf(_L("PCI Address = 0x%08x\n"), testPciMappedChunk.PciBase()); |
|
634 |
|
635 //Close Chunk |
|
636 testPciMappedChunk.Close(); |
|
637 User::WaitForRequest(status); |
|
638 test.Next(_L("Closed PCI Mapped Chunk handle")); |
|
639 } |
|
640 |
|
641 /** |
|
642 Verify that an RChunk can be open to grant access to the internal PCI window from the user side |
|
643 |
|
644 @param pci The RPci object to use |
|
645 @param test The RTest object to use |
|
646 */ |
|
647 void TestPciWindowChunk(RPci& pci,RTest& test) |
|
648 { |
|
649 RChunk testPciWindowChunk; |
|
650 |
|
651 // Create and open DChunk |
|
652 TInt r = pci.OpenPciWindowChunk(testPciWindowChunk); |
|
653 test_KErrNone(r); |
|
654 |
|
655 test(testPciWindowChunk.IsWritable()); |
|
656 test(testPciWindowChunk.IsReadable()); |
|
657 |
|
658 test.Printf(_L("PCI Window Chunk base = 0x%08x\n"), testPciWindowChunk.Base()); |
|
659 test.Printf(_L("PCI Window Chunk size = %d\n"), testPciWindowChunk.Size()); |
|
660 |
|
661 //Close Chunk |
|
662 testPciWindowChunk.Close(); |
|
663 test.Next(_L("Closed PCI Window Chunk handle")); |
|
664 } |
|
665 |
|
666 |
|
667 class CPciTest : public CTest |
|
668 { |
|
669 protected: |
|
670 CPciTest(const TDesC& aName, TInt aIterations, RPci& aDevice) |
|
671 : CTest(aName, aIterations), iDevice(aDevice) |
|
672 {} |
|
673 |
|
674 RPci iDevice; |
|
675 }; |
|
676 |
|
677 /** |
|
678 Each instance of test will open a chunk, using the function specified in |
|
679 the template argument, FUNC. |
|
680 |
|
681 The total number of chunks that can be opened by all instances is limited |
|
682 by iMaxCount. |
|
683 |
|
684 All intances of the test will hold their chunk open until iMaxCount has |
|
685 been reached. |
|
686 */ |
|
687 template<ChunkOpenFn FUNC> |
|
688 class CPciOpenChunkTest : public CPciTest |
|
689 { |
|
690 public: |
|
691 CPciOpenChunkTest(const TDesC& aName, TInt aIterations, RPci& aDevice, |
|
692 RSemaphore aSemOpen, RSemaphore aSemClose, RFastLock aLock, TInt aMaxCount) |
|
693 :CPciTest(aName, aIterations, aDevice), |
|
694 iSemOpen(aSemOpen), iSemClose(aSemClose), iLock(aLock), iMaxCount(aMaxCount) |
|
695 { |
|
696 } |
|
697 |
|
698 virtual void RunTest() |
|
699 { |
|
700 RTest test(iName); |
|
701 RPciChunk chunk; |
|
702 |
|
703 iSemOpen.Wait(); |
|
704 TRequestStatus status; |
|
705 const TInt chunkSize = 0x400; |
|
706 //open chunk by calling FUNC |
|
707 TInt r = ((iDevice).*(FUNC))(chunk, chunkSize, &status); |
|
708 test_KErrNone(r); |
|
709 |
|
710 iLock.Wait(); |
|
711 iOpenCount++; |
|
712 test.Printf(_L("Opened chunk %d\n"), iOpenCount); |
|
713 if(iOpenCount == iMaxCount) |
|
714 { |
|
715 test.Printf(_L("Opened=%d, max=%d: Allow chunks to close\n"), iOpenCount, iMaxCount); |
|
716 //release all waiting threads |
|
717 //plus 1 preincrement so this |
|
718 //thread also passes |
|
719 iSemClose.Signal(iOpenCount); |
|
720 iOpenCount = 0; |
|
721 } |
|
722 iLock.Signal(); |
|
723 |
|
724 |
|
725 iSemClose.Wait(); |
|
726 chunk.Close(); |
|
727 User::WaitForRequest(status); |
|
728 |
|
729 // permit another chunk to be opened |
|
730 iSemOpen.Signal(); |
|
731 test.Close(); |
|
732 } |
|
733 |
|
734 virtual CTest* Clone() const |
|
735 { |
|
736 //make shallow copy |
|
737 return new CPciOpenChunkTest(*this); |
|
738 } |
|
739 |
|
740 |
|
741 private: |
|
742 RSemaphore& iSemOpen; ///!< Represents the number of available PCI mappings |
|
743 RSemaphore& iSemClose; ///!< Represents the number of threads waiting to close their chunk |
|
744 RFastLock& iLock; |
|
745 static TInt iOpenCount; |
|
746 const TInt iMaxCount; |
|
747 }; |
|
748 |
|
749 template<ChunkOpenFn FUNC> |
|
750 TInt CPciOpenChunkTest<FUNC>::iOpenCount = 0; |
|
751 |
|
752 |
|
753 /** |
|
754 Test which will perform various reads from a PCI address |
|
755 space (config or memory) and confirm that values are read |
|
756 as expected |
|
757 */ |
|
758 class CPciAddressSpaceRead : public CPciTest |
|
759 { |
|
760 public: |
|
761 CPciAddressSpaceRead(const TDesC& aName, TInt aIterations, RPci& aDevice, |
|
762 const TUserPciSpace& aSpace, const TPciTestInfo::TAddrSpaceTest& aInfo) |
|
763 :CPciTest(aName, aIterations, aDevice), |
|
764 iAddressSpace(aSpace.Clone()), iSpaceTestInfo(aInfo) |
|
765 { |
|
766 } |
|
767 |
|
768 CPciAddressSpaceRead(const CPciAddressSpaceRead& aOther) |
|
769 :CPciTest(aOther)/* TODO-REVIEW have object-sliced aOther - is this ok?*/, |
|
770 iAddressSpace(aOther.iAddressSpace->Clone()), iSpaceTestInfo(aOther.iSpaceTestInfo) |
|
771 { |
|
772 } |
|
773 |
|
774 virtual ~CPciAddressSpaceRead() |
|
775 { |
|
776 delete iAddressSpace; |
|
777 } |
|
778 |
|
779 virtual void RunTest() |
|
780 { |
|
781 __UHEAP_MARK; |
|
782 RTest test(iName); |
|
783 TestReadAddressSpace(*iAddressSpace, iSpaceTestInfo, test); |
|
784 test.Close(); |
|
785 __UHEAP_MARKEND; |
|
786 } |
|
787 |
|
788 virtual CTest* Clone() const |
|
789 { |
|
790 //make shallow copy |
|
791 return new CPciAddressSpaceRead(*this); |
|
792 } |
|
793 |
|
794 private: |
|
795 TUserPciSpace* iAddressSpace; |
|
796 const TPciTestInfo::TAddrSpaceTest& iSpaceTestInfo; |
|
797 }; |
|
798 |
|
799 /** |
|
800 For aBuffer, test writing to it then reading back from aWindow |
|
801 then write via window and read back from chunk |
|
802 |
|
803 @param test The RTest object to use |
|
804 @param aBuffer RChunk corresponding to a PCI accessible buffer |
|
805 @param aWindow RChunk coressponding an appropriate System-to-PCI memory window |
|
806 It is presumed to start at PCI address 0 |
|
807 */ |
|
808 void DoLoopBackTest(RTest& test, RPciChunk aBuffer, RChunk aWindow) |
|
809 { |
|
810 test.Start(_L("Test accessing memory via PCI")); |
|
811 |
|
812 TUint8* const bufferBase = aBuffer.Base(); |
|
813 const TUint bufferSize = aBuffer.Size(); |
|
814 const TUint bufferPciBase = aBuffer.PciBase(); |
|
815 |
|
816 TUint8* const windowBase = aWindow.Base(); |
|
817 const TUint windowSize = aWindow.Size(); |
|
818 |
|
819 #define PRINT(N) RDebug::Printf("%s = 0x%08x (%d)", #N, (N), (N)) |
|
820 PRINT(bufferBase); |
|
821 PRINT(bufferSize); |
|
822 PRINT(bufferPciBase); |
|
823 |
|
824 PRINT(windowBase); |
|
825 PRINT(windowSize); |
|
826 |
|
827 #undef PRINT |
|
828 |
|
829 //need to check that the end of the buffer |
|
830 //is within the windowed region |
|
831 test(bufferPciBase + bufferSize <= windowSize); |
|
832 TUint8* const bufferBaseWithinWindow = windowBase + bufferPciBase; |
|
833 |
|
834 test.Next(_L("write chunk")); |
|
835 for(TUint i = 0; i < bufferSize; ++i) |
|
836 { |
|
837 //each byte will hold its own offset modulo 256 |
|
838 bufferBase[i] = (TUint8)i; |
|
839 } |
|
840 |
|
841 test.Next(_L("read back via window")); |
|
842 for(TUint j=0; j < bufferSize; ++j) |
|
843 { |
|
844 const TUint8 result = bufferBaseWithinWindow[j]; |
|
845 test_Equal(j%256, result); |
|
846 } |
|
847 |
|
848 //clear chunk |
|
849 memclr(bufferBase, bufferSize); |
|
850 test.Next(_L("write via window")); |
|
851 for(TUint k=0; k < bufferSize; ++k) |
|
852 { |
|
853 //each byte will hold its own offset modulo 256 |
|
854 bufferBaseWithinWindow[k] = (TUint8)k; |
|
855 } |
|
856 |
|
857 test.Next(_L("read back from chunk")); |
|
858 for(TUint l=0; l < bufferSize; ++l) |
|
859 { |
|
860 const TUint8 result = bufferBase[l]; |
|
861 test_Equal(l%256, result); |
|
862 } |
|
863 |
|
864 test.End(); |
|
865 } |
|
866 |
|
867 /** |
|
868 Take care of opening a chunk, running the test and closing |
|
869 */ |
|
870 template<ChunkOpenFn OPEN_FUNC> |
|
871 inline void LoopBackTest(RPci& aPci, RTest& test, RChunk& aWindow) |
|
872 { |
|
873 RPciChunk pciChunk; |
|
874 const TInt chunkSize = 0x400; //1k |
|
875 |
|
876 //call the specified chunk opening function |
|
877 TRequestStatus status; |
|
878 TInt r = ((aPci).*(OPEN_FUNC))(pciChunk, chunkSize, &status); |
|
879 test_KErrNone(r); |
|
880 DoLoopBackTest(test, pciChunk, aWindow); |
|
881 pciChunk.Close(); |
|
882 User::WaitForRequest(status); |
|
883 } |
|
884 |
|
885 /** |
|
886 Run the loopback test for the 3 types of buffer supported by the PCI driver. |
|
887 DChunk |
|
888 DPlatChunk |
|
889 Mapped In external memory |
|
890 */ |
|
891 void TestLoopBack(RPci& aPci, RTest& test) |
|
892 { |
|
893 test.Next(_L("Open PCI window")); |
|
894 RChunk window; |
|
895 |
|
896 TInt r = aPci.OpenPciWindowChunk(window); |
|
897 test_KErrNone(r); |
|
898 |
|
899 test.Next(_L("DChunk")); |
|
900 LoopBackTest<&RPci::OpenPciDChunk>(aPci, test, window); |
|
901 |
|
902 test.Next(_L("DPlatHwChunk")); |
|
903 LoopBackTest<&RPci::OpenPciPlatHwChunk>(aPci, test, window); |
|
904 |
|
905 test.Next(_L("DChunk (mapped in)")); |
|
906 LoopBackTest<&RPci::OpenPciMappedChunk>(aPci, test, window); |
|
907 |
|
908 window.Close(); |
|
909 } |
|
910 #ifndef __VC32__ //visual studio 6 doesn't approve of pointer to member function template parameters |
|
911 /** |
|
912 Run the CPciOpenChunkTest for each type of chunk. This function also creates (and destroys) the |
|
913 necessary semaphores and locks. |
|
914 CPciOpenChunkTest objects are run in multiple threads using MultipleTestRun(). |
|
915 |
|
916 @param aDevice Handle to the test driver |
|
917 @param test RTest to use. |
|
918 @param aBufferLimit The maximum number of buffers which can be opened simultaneously |
|
919 */ |
|
920 void TestBufferOpenConcurrency(RPci& aDevice, RTest& test, TInt aBufferLimit) |
|
921 { |
|
922 RSemaphore semaphoreOpen; |
|
923 RSemaphore semaphoreClose; |
|
924 RFastLock lock; |
|
925 |
|
926 TInt r = semaphoreOpen.CreateLocal(aBufferLimit); |
|
927 test_KErrNone(r); |
|
928 |
|
929 r = semaphoreClose.CreateLocal(0); |
|
930 test_KErrNone(r); |
|
931 |
|
932 r = lock.CreateLocal(); |
|
933 test_KErrNone(r); |
|
934 |
|
935 const TInt iterations = 3; |
|
936 { |
|
937 test.Printf(_L("Opening %d PCI DChunks in %d threads\n"), aBufferLimit, aBufferLimit); |
|
938 CPciOpenChunkTest<&RPci::OpenPciDChunk> |
|
939 dChunkTest(_L("Concurrent-DChunk"), iterations, aDevice, semaphoreOpen, semaphoreClose, lock, aBufferLimit); |
|
940 |
|
941 MultipleTestRun(test, dChunkTest, aBufferLimit); |
|
942 } |
|
943 |
|
944 { |
|
945 test.Printf(_L("Opening %d PCI DPlatHwChunks in %d threads\n"), aBufferLimit, aBufferLimit); |
|
946 CPciOpenChunkTest<&RPci::OpenPciPlatHwChunk> |
|
947 platChunkTest(_L("Concurrent-DPlatHwChunk"), iterations, aDevice, semaphoreOpen, semaphoreClose, lock, aBufferLimit); |
|
948 |
|
949 MultipleTestRun(test, platChunkTest, aBufferLimit); |
|
950 } |
|
951 |
|
952 { |
|
953 test.Printf(_L("Opening %d PCI Mapped chunks in %d threads\n"), aBufferLimit, aBufferLimit); |
|
954 CPciOpenChunkTest<&RPci::OpenPciMappedChunk> |
|
955 mappedChunkTest(_L("Concurrent-DChunk(mapped)"), iterations, aDevice, semaphoreOpen, semaphoreClose, lock, aBufferLimit); |
|
956 |
|
957 MultipleTestRun(test, mappedChunkTest, aBufferLimit); |
|
958 } |
|
959 |
|
960 semaphoreOpen.Close(); |
|
961 semaphoreClose.Close(); |
|
962 lock.Close(); |
|
963 } |
|
964 #endif |
|
965 |
|
966 TInt E32Main() |
|
967 { |
|
968 __UHEAP_MARK; |
|
969 |
|
970 _LIT(KPci, "PCI"); |
|
971 RTest test(KPci); |
|
972 test.Start(_L("Running PCI tests\n")); |
|
973 |
|
974 TInt r = User::LoadLogicalDevice(KPciLdd); |
|
975 |
|
976 __KHEAP_MARK; |
|
977 |
|
978 if(r==KErrNotFound) |
|
979 { |
|
980 test.Printf(_L("No PCI system present - skipping test\n")); |
|
981 return KErrNone; |
|
982 } |
|
983 if(r!=KErrNone && r!=KErrAlreadyExists) |
|
984 { |
|
985 test_KErrNone(r); |
|
986 } |
|
987 |
|
988 test.Next(_L("Open non-existant device\n")); |
|
989 RPci device; |
|
990 TPciDevice unavailable; |
|
991 r = device.Open(unavailable); |
|
992 test_Equal(KErrNotFound, r); |
|
993 |
|
994 RPci pciInfo; |
|
995 r = pciInfo.Open(); |
|
996 test_KErrNone(r); |
|
997 |
|
998 test.Next(_L("Get test info from driver\n")); |
|
999 TPciTestInfo info; |
|
1000 r = pciInfo.GetTestInfo(info); |
|
1001 test_KErrNone(r); |
|
1002 pciInfo.Close(); |
|
1003 |
|
1004 test.Next(_L("Open test device\n")); |
|
1005 r = device.Open(info.iDevice); |
|
1006 test_KErrNone(r); |
|
1007 |
|
1008 test.Next(_L("Run Device Unit Test\n")); |
|
1009 r=TestRunPciUnitTest(device); |
|
1010 test_KErrNone(r); |
|
1011 |
|
1012 test.Next(_L("Read config space\n")); |
|
1013 TUserConfigSpace cs(device); |
|
1014 TestReadAddressSpace(cs, info.iCfgSpaceRead, test); |
|
1015 |
|
1016 test.Next(_L("Write config space\n")); |
|
1017 TestWriteAddressSpace(cs, info.iCfgSpaceWrite, test); |
|
1018 |
|
1019 test.Next(_L("Read memory space\n")); |
|
1020 TUserMemorySpace ms(device, info.iMemSpaceIndex); |
|
1021 TestReadAddressSpace(ms, info.iMemSpaceRead, test); |
|
1022 |
|
1023 test.Next(_L("Modify memory space\n")); |
|
1024 TestWriteAddressSpace(ms, info.iMemSpaceWrite, test); |
|
1025 |
|
1026 { |
|
1027 const TInt addrSpaceThreadCount = 4; |
|
1028 const TInt iterations = 100; |
|
1029 test.Next(_L("Concurrent config space reads")); |
|
1030 CPciAddressSpaceRead cfgSpaceRead(_L("Cfg Space Read"), iterations, device, cs, info.iCfgSpaceRead); |
|
1031 MultipleTestRun(test, cfgSpaceRead, addrSpaceThreadCount); |
|
1032 |
|
1033 test.Next(_L("Concurrent memory space reads")); |
|
1034 CPciAddressSpaceRead memSpaceRead(_L("Memory Space Read"), iterations, device, ms, info.iMemSpaceRead); |
|
1035 MultipleTestRun(test, memSpaceRead, addrSpaceThreadCount); |
|
1036 } |
|
1037 |
|
1038 TInt testDChunkSize = 0x4000; |
|
1039 test.Next(_L("Open and Close DChunks\n")); |
|
1040 TestOpenAndCloseDChunk(device,test,testDChunkSize); |
|
1041 |
|
1042 TInt testDPlatChunkSize = 0x2000; |
|
1043 test.Next(_L("Open and Close PlatHwChunks\n")); |
|
1044 TestOpenAndClosePciPlatHwChunk(device,test,testDPlatChunkSize); |
|
1045 |
|
1046 //TestPciMapppedChunk() fails for sizes greater than 4K. |
|
1047 //The issue is that a block of externally mapped memory must be |
|
1048 //naturally alligned in order to be accessible to the PCI bus (ie |
|
1049 //an 8k buffer would have to start at an address which is a |
|
1050 //multiple of 8k. |
|
1051 // |
|
1052 //Now we could fix this for sure on the kernel side, by making |
|
1053 //sure we only commit correctly aligned memory into the chunk (as |
|
1054 //the pci driver itself does), |
|
1055 //However, by using a 4k chunk, we know this will be on a page |
|
1056 //boundary so the alignment is correct (assuming the page size |
|
1057 //isn't changed). |
|
1058 TInt testMapppedChunkSize = 0x1000; |
|
1059 test.Next(_L("Open and Close Pci Mappped Chunk\n")); |
|
1060 TestPciMapppedChunk(device,test,testMapppedChunkSize); |
|
1061 |
|
1062 test.Next(_L("Open and Close Pci Window Chunk\n")); |
|
1063 TestPciWindowChunk(device,test); |
|
1064 |
|
1065 const TInt numberOfThreads = info.iNumberOfBars; |
|
1066 test.Printf(_L("Open buffers concurrently, max supported = %d\n"), numberOfThreads); |
|
1067 #ifndef __VC32__ |
|
1068 TestBufferOpenConcurrency(device, test, numberOfThreads); |
|
1069 #else |
|
1070 test.Printf(_L("TestBufferOpenConcurrency not implemented for WINS"), numberOfThreads); |
|
1071 #endif |
|
1072 |
|
1073 test.Next(_L("Test loop back")); |
|
1074 TestLoopBack(device, test); |
|
1075 |
|
1076 device.Close(); |
|
1077 __KHEAP_MARKEND; |
|
1078 |
|
1079 r = User::FreeLogicalDevice(KPciLdd); |
|
1080 test_KErrNone(r); |
|
1081 |
|
1082 test.End(); |
|
1083 test.Close(); |
|
1084 |
|
1085 __UHEAP_MARKEND; |
|
1086 return KErrNone; |
|
1087 } |