// usampler.cia+
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// +
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// Copyright (c) 2007 - 2010 Accenture. All rights reserved.+
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// This component and the accompanying materials are made available+
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// under the terms of the "Eclipse Public License v1.0"+
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// which accompanies this distribution, and is available+
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// at the URL "http://www.eclipse.org/legal/epl-v10.html".+
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// +
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// Initial Contributors:+
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// Accenture - Initial contribution+
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//+
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+
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+
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#include <platform.h>+
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+
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#include <kern_priv.h>		//temporary+
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+
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#if defined(__GCC32__)+
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// CIA symbol macros for Gcc98r2+
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#define CSM__ZN5NKern14CurrentContextEv " CurrentContext__5NKern"+
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#elif defined(__ARMCC__)+
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// CIA symbol macros for RVCT+
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#define CSM__ZN5NKern14CurrentContextEv " __cpp(NKern::CurrentContext)"+
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#else+
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// CIA symbol macros for EABI assemblers+
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#define CSM__ZN5NKern14CurrentContextEv " _ZN5NKern14CurrentContextEv"+
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#endif+
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+
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__NAKED__ TUint IntStackPtr()+
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	{+
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	asm("mrs r1, cpsr ");+
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	asm("bic r3, r1, #0x1f ");+
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//#ifdef __MISA__+
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//	asm("orr r3, r3, #0xd1 ");		// mode_fiq, all interrupts off+
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//#else+
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	asm("orr r3, r3, #0xd2 ");		// mode_irq, all interrupts off+
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//#endif+
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	asm("msr cpsr, r3 ");+
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	asm("mov r0, sp ");				// r0=sp_irq or sp_fiq+
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	asm("msr cpsr, r1 ");			// restore interrupts+
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	__JUMP(,lr);+
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	}+
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+
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__NAKED__ TUint32 SPSR()+
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	{+
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	asm("mrs r0, spsr ");+
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	__JUMP(,lr);+
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	}+
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+
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+
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// This will return 1 if it was iDFC interrupted (0 otherwise).+
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// As there is no Kernel interface for that, we have to 'fake' Kernel by+
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// setting SVC mode before calling NKern::CurrentContext.+
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// Without that, CurrentContext would always return EInterrupt.+
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__NAKED__ TUint IDFCRunning()+
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	{+
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	asm("stmfd sp!, {r4-r5} ");	+
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+
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	asm("mrs r5, cpsr");							// r5 = cpsr_irq+
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	asm("bic r4, r5, #0xdf ");						// clear interrupt mask & CPU mode+
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	asm("orr r4, r4, #0xd3 ");						// disable all interrupts and set SVC mode+
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+
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	asm("msr CPSR_cf, r4");   						// switch to SVC, (dissable FIQ, IRQ)+
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	+
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	// NKern::CurrentContext does not use sp (only r0,r1,r2)+
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	// It is just lr in svc mode we need to preserve.+
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	asm("mov r4, lr");             					// r4 = lr_svc+
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	asm("bl " CSM__ZN5NKern14CurrentContextEv ); 	// r0 = 1 if iDFC was running, 0 if a thread was running+
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	asm("mov lr, r4");								// lr_svc is back to original state+
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+
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	asm("msr CPSR_cf, r5");							// return to IRQ mode+
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	+
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	asm("ldmfd sp!, {r4-r5} ");+
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	__JUMP(,lr);+
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	}+
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