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// Copyright (c) 1994-2009 Nokia Corporation and/or its subsidiary(-ies).
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// All rights reserved.
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// This component and the accompanying materials are made available
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// under the terms of the License "Eclipse Public License v1.0"
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// which accompanies this distribution, and is available
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// at the URL "http://www.eclipse.org/legal/epl-v10.html".
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//
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// Initial Contributors:
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// Nokia Corporation - initial contribution.
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//
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// Contributors:
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//
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// Description:
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// e32\nkern\arm\ncmonitor.cpp
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// Kernel crash debugger - NKERN ARM specific portion
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//
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//
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#define __INCLUDE_REG_OFFSETS__ // for SP_R13U in nk_plat.h
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#include <kernel/monitor.h>
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#include "nk_priv.h"
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#include <arm.h>
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EXPORT_C void Monitor::DisplayNThreadInfo(NThread* pT)
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{
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TBuf8<80> buf=_L8("NThread @ ");
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buf.AppendNumFixedWidth((TUint)pT,EHex,8);
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buf+=_L8(" Pri ");
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buf.AppendNum((TUint)pT->iPriority);
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buf+=_L8(" NState ");
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switch (pT->iSpare1)
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{
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case NThread::EReady: buf+=_L8("READY"); break;
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case NThread::ESuspended: buf+=_L8("SUSPENDED"); break;
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case NThread::EWaitFastSemaphore: buf+=_L8("WAITFSEM "); buf.AppendNumFixedWidth((TUint)pT->iWaitObj,EHex,8); break;
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case NThread::ESleep: buf+=_L8("SLEEP"); break;
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case NThread::EBlocked: buf+=_L8("BLOCKED"); break;
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case NThread::EDead: buf+=_L8("DEAD"); break;
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case NThread::EWaitDfc: buf+=_L8("WAITDFC"); break;
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default: buf+=_L8("??"); buf.AppendNumFixedWidth((TUint)pT->iSpare1,EHex,8); break;
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}
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PrintLine(buf);
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Printf("Next=%08x Prev=%08x Att=%02x iUserContextType=%02x\r\n",pT->iNext,pT->iPrev,pT->iSpare2,pT->iSpare3);
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Printf("HeldFM=%08x WaitFM=%08x AddrSp=%08x\r\n",pT->iHeldFastMutex,pT->iWaitFastMutex,pT->iAddressSpace);
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Printf("Time=%d Timeslice=%d ReqCount=%d\r\n",pT->iTime,pT->iTimeslice,pT->iRequestSemaphore.iCount);
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Printf("SuspendCount=%d CsCount=%d CsFunction=%08x\r\n",pT->iSuspendCount,pT->iCsCount,pT->iCsFunction);
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Printf("SavedSP=%08x ExtraContext=%08x ExtraContextSize=%04x\r\n",pT->iSavedSP,pT->iExtraContext,pT->iExtraContextSize);
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Printf("iUserModeCallbacks=%08x iSpare7=%08x iSpare8=%08x\r\n", pT->iUserModeCallbacks, pT->iSpare7, pT->iSpare8);
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if (pT != TScheduler::Ptr()->iCurrentThread)
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{
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TUint32* pS=(TUint32*)pT->iSavedSP;
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TUint32 reg[12+EXTRA_STACK_SPACE/4];
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MTRAPD(r,wordmove(reg,pS,48+EXTRA_STACK_SPACE));
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if (r==KErrNone)
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{
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TUint32* pR=reg;
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#ifdef __CPU_SUPPORT_THUMB2EE
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Printf("TEEHBR %08x ",*pR++);
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#endif
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#ifdef __CPU_HAS_CP15_THREAD_ID_REG
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Printf("RWRWTID %08x ",*pR++);
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#endif
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#ifdef __CPU_HAS_VFP
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Printf("FPEXC %08x ",*pR++);
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#endif
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#ifdef __CPU_HAS_COPROCESSOR_ACCESS_REG
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Printf("CAR %08x ",*pR++);
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#endif
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#ifdef __CPU_ARM_USE_DOMAINS
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Printf("DACR %08x\r\n",*pR++);
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#endif
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Printf("R13_USR %08x R14_USR %08x SPSR_SVC %08x\r\n",pR[0],pR[1],pR[2]);
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Printf(" R4 %08x R5 %08x R6 %08x R7 %08x\r\n",pR[3],pR[4],pR[5],pR[6]);
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Printf(" R8 %08x R9 %08x R10 %08x R11 %08x\r\n",pR[7],pR[8],pR[9],pR[10]);
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Printf(" PC %08x\r\n",pR[11]);
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}
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}
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NewLine();
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}
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void Monitor::DisplayNFastSemInfo(NFastSemaphore* pS)
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{
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Printf("NFastSemaphore @ %08x Count %d OwningThread %08x\r\n",pS,pS->iCount,pS->iOwningThread);
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}
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void Monitor::DisplayNFastMutexInfo(NFastMutex* pM)
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{
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Printf("NFastMutex @ %08x HoldingThread %08x iWaiting %08x\r\n",pM,pM->iHoldingThread,pM->iWaiting);
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}
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void Monitor::DisplaySchedulerInfo()
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{
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TScheduler* pS=TScheduler::Ptr();
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Printf("SCHEDULER @%08x: CurrentThread %08x\r\n",pS,pS->iCurrentThread);
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Printf("RescheduleNeeded=%02x DfcPending=%02x KernCSLocked=%08x\r\n",pS->iRescheduleNeededFlag,pS->iDfcPendingFlag,pS->iKernCSLocked);
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Printf("DFCS: next %08x prev %08x\r\n",pS->iDfcs.iA.iNext,pS->iDfcs.iA.iPrev);
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Printf("ProcessHandler=%08x, AddressSpace=%08x\r\n",pS->iProcessHandler,pS->iAddressSpace);
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Printf("SYSLOCK: HoldingThread %08x iWaiting %08x\r\n",pS->iLock.iHoldingThread,pS->iLock.iWaiting);
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Printf("Extras 0: %08x 1: %08x 2: %08x 3: %08x\r\n",pS->iExtras[0],pS->iExtras[1],pS->iExtras[2],pS->iExtras[3]);
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Printf("Extras 4: %08x 5: %08x 6: %08x 7: %08x\r\n",pS->iExtras[4],pS->iExtras[5],pS->iExtras[6],pS->iExtras[7]);
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Printf("Extras 8: %08x 9: %08x A: %08x B: %08x\r\n",pS->iExtras[8],pS->iExtras[9],pS->iExtras[10],pS->iExtras[11]);
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Printf("Extras C: %08x D: %08x E: %08x F: %08x\r\n",pS->iExtras[12],pS->iExtras[13],pS->iExtras[14],pS->iExtras[15]);
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}
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void DumpRegisters(Monitor& m, SFullArmRegSet& a)
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{
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SNormalRegs& r = a.iN;
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m.Printf("MODE_USR:\r\n");
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m.Printf(" R0=%08x R1=%08x R2=%08x R3=%08x\r\n", r.iR0, r.iR1, r.iR2, r.iR3);
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m.Printf(" R4=%08x R5=%08x R6=%08x R7=%08x\r\n", r.iR4, r.iR5, r.iR6, r.iR7);
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m.Printf(" R8=%08x R9=%08x R10=%08x R11=%08x\r\n", r.iR8, r.iR9, r.iR10, r.iR11);
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m.Printf("R12=%08x R13=%08x R14=%08x R15=%08x\r\n", r.iR12, r.iR13, r.iR14, r.iR15);
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m.Printf("CPSR=%08x\r\n", r.iFlags);
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m.Printf("MODE_FIQ:\r\n");
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m.Printf(" R8=%08x R9=%08x R10=%08x R11=%08x\r\n", r.iR8Fiq, r.iR9Fiq, r.iR10Fiq, r.iR11Fiq);
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m.Printf("R12=%08x R13=%08x R14=%08x SPSR=%08x\r\n", r.iR12Fiq, r.iR13Fiq, r.iR14Fiq, r.iSpsrFiq);
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m.Printf("MODE_IRQ:\r\n");
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m.Printf("R13=%08x R14=%08x SPSR=%08x\r\n", r.iR13Irq, r.iR14Irq, r.iSpsrIrq);
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m.Printf("MODE_SVC:\r\n");
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m.Printf("R13=%08x R14=%08x SPSR=%08x\r\n", r.iR13Svc, r.iR14Svc, r.iSpsrSvc);
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m.Printf("MODE_ABT:\r\n");
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m.Printf("R13=%08x R14=%08x SPSR=%08x\r\n", r.iR13Abt, r.iR14Abt, r.iSpsrAbt);
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m.Printf("MODE_UND:\r\n");
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m.Printf("R13=%08x R14=%08x SPSR=%08x\r\n", r.iR13Und, r.iR14Und, r.iSpsrUnd);
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// m.Printf("MODE_MON:\r\n");
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// m.Printf("R13=%08x R14=%08x SPSR=%08x\r\n", r.iR13Mon, r.iR14Mon, r.iSpsrMon);
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SAuxiliaryRegs& aux = a.iA;
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m.Printf("TEEHBR=%08x CPACR=%08x\r\n", aux.iTEEHBR, aux.iCPACR);
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SBankedRegs& b = a.iB[0];
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m.Printf(" SCTLR=%08x ACTLR=%08x PRRR=%08x NMRR=%08x\r\n", b.iSCTLR, b.iACTLR, b.iPRRR, b.iNMRR);
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m.Printf(" DACR=%08x TTBR0=%08x TTBR1=%08x TTBCR=%08x\r\n", b.iDACR, b.iTTBR0, b.iTTBR1, b.iTTBCR);
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m.Printf(" VBAR=%08x FCSEID=%08x CTXIDR=%08x\r\n", b.iVBAR, b.iFCSEIDR, b.iCTXIDR);
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m.Printf("Thread ID RWRW=%08x RWRO=%08x RWNO=%08x\r\n", b.iRWRWTID, b.iRWROTID, b.iRWNOTID);
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#ifdef __CPU_HAS_MMU
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extern TUint32 GetMMUID();
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m.Printf(" MMUID %08x\r\n", GetMMUID());
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#endif
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#ifdef __CPU_HAS_VFP
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m.Printf("FPEXC %08x\r\n", a.iMore[0]);
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#endif
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#ifdef __CPU_HAS_CACHE_TYPE_REGISTER
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extern TUint32 GetCacheType();
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m.Printf("CTYPE %08x\r\n", GetCacheType());
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#endif
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m.NewLine();
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}
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EXPORT_C void Monitor::DumpCpuRegisters()
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{
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SFullArmRegSet& r = *(SFullArmRegSet*)iRegs;
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DumpRegisters(*this, r);
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}
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EXPORT_C void Monitor::DisplayCpuFaultInfo()
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{
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TScheduler* pS = TScheduler::Ptr();
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SFullArmRegSet& r = *(SFullArmRegSet*)pS->i_Regs;
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if (TUint(r.iExcCode) > TUint(EArmExceptionUndefinedOpcode))
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return;
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Printf("Exc %1d Cpsr=%08x FAR=%08x FSR=%08x\r\n", r.iExcCode, r.iN.iFlags, r.iB[0].iDFAR, r.iB[0].iDFSR);
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Printf(" R0=%08x R1=%08x R2=%08x R3=%08x\r\n", r.iN.iR0, r.iN.iR1, r.iN.iR2, r.iN.iR3);
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Printf(" R4=%08x R5=%08x R6=%08x R7=%08x\r\n", r.iN.iR4, r.iN.iR5, r.iN.iR6, r.iN.iR7);
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Printf(" R8=%08x R9=%08x R10=%08x R11=%08x\r\n", r.iN.iR8, r.iN.iR9, r.iN.iR10, r.iN.iR11);
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Printf("R12=%08x R13=%08x R14=%08x R15=%08x\r\n", r.iN.iR12, r.iN.iR13, r.iN.iR14, r.iN.iR15);
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Printf("R13Svc=%08x R14Svc=%08x SpsrSvc=%08x\r\n", r.iN.iR13Svc, r.iN.iR14Svc, r.iN.iSpsrSvc);
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}
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EXPORT_C void Monitor::GetStackPointers(NThread* aThread, TUint& aSupSP, TUint& aUsrSP)
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{
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TScheduler* pS = TScheduler::Ptr();
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if (aThread == pS->iCurrentThread)
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{
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SFullArmRegSet& r = *(SFullArmRegSet*)iRegs;
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aSupSP = r.iN.iR13Svc;
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aUsrSP = r.iN.iR13;
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}
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else
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{
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TUint32* sp = (TUint32*)aThread->iSavedSP;
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aSupSP = (TUint)sp;
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aUsrSP = sp[SP_R13U];
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}
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}
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