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// Copyright (c) 1994-2009 Nokia Corporation and/or its subsidiary(-ies).
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// All rights reserved.
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// This component and the accompanying materials are made available
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// under the terms of the License "Eclipse Public License v1.0"
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// which accompanies this distribution, and is available
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// at the URL "http://www.eclipse.org/legal/epl-v10.html".
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//
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// Initial Contributors:
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// Nokia Corporation - initial contribution.
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//
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// Contributors:
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//
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// Description:
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// e32\nkern\arm\ncmonitor.cia
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// Kernel crash debugger - NKERN ARM specific portion
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//
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//
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#include <e32cia.h>
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#include <kernel/monitor.h>
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#include "nk_priv.h"
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#include <arm.h>
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#ifdef __CPU_HAS_MMU
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#define __USE_CP15_FAULT_INFO__
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#endif
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EXPORT_C __NAKED__ void Monitor::HandleException()
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//
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// Handle an exception while the monitor is running
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//
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{
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asm("mov r3, r1 "); // exception type
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asm("ldr r0, [sp, #24] "); // code address
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#ifdef __USE_CP15_FAULT_INFO__
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#ifdef __CPU_ARM_HAS_SPLIT_FSR
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asm("cmp r1, #%a0 " : : "i" ((TInt)EArmExceptionPrefetchAbort));
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asm("mrceq p15, 0, r2, c5, c0, 1"); // r2=instruction fault status
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asm("mrcne p15, 0, r2, c5, c0, 0"); // r2=data fault status
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#ifdef __CPU_ARM_HAS_CP15_IFAR
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asm("mrceq p15, 0, r1, c6, c0, 2"); // r1= IFAR fault address
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asm("mrcne p15, 0, r1, c6, c0, 0"); // r1= DFAR fault address
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#else
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asm("mrc p15, 0, r1, c6, c0"); // r1= FAR fault address
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#endif // __CPU_ARM_HAS_CP15_IFAR
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#else
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asm("mrc p15, 0, r1, c6, c0"); // r1=fault address
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asm("mrc p15, 0, r2, c5, c0"); // r2=fault status
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#endif // __CPU_ARM_HAS_SPLIT_FSR
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#endif // __USE_CP15_FAULT_INFO__
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asm("add sp, sp, #28 "); // restore mode_abt/mode_und stack balance
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asm("mov r12, #0xd1 "); // back into mode_fiq
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asm("msr cpsr, r12 ");
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asm("ldr r12, __TheMonitorPtr ");
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asm("ldr r12, [r12] ");
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asm("add r12, r12, #%a0" : : "i" _FOFF(Monitor,iExceptionInfo));
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asm("stmia r12, {r0-r3} "); // store exc info
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asm("mov r0, #%a0" : : "i" ((TInt)KErrAbort));
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asm("b " CSM_ZN7Monitor5LeaveEi );
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asm("__TheMonitorPtr: ");
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asm(".word TheMonitorPtr ");
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}
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