author | Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com> |
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// Copyright (c) 2002-2010 Nokia Corporation and/or its subsidiary(-ies). |
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// All rights reserved. |
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// This component and the accompanying materials are made available |
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// under the terms of "Eclipse Public License v1.0" |
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// which accompanies this distribution, and is available |
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// at the URL "http://www.eclipse.org/legal/epl-v10.html". |
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// |
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// Initial Contributors: |
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// Nokia Corporation - initial contribution. |
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// |
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// Contributors: |
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// |
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// Description: |
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// include/drivers/dmadefs.h |
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// DMA Framework - General class, enum, constant and type definitions. |
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// |
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// |
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/** @file |
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@publishedPartner |
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*/ |
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#ifndef __DMADEFS_H__ |
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#define __DMADEFS_H__ |
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#include <e32def.h> |
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/** The client request callback type. |
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*/ |
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enum TDmaCallbackType |
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{ |
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/** Transfer request completion callback |
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@released |
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*/ |
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EDmaCallbackRequestCompletion = 0x01, |
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/** Transfer request completion callback - source side |
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@prototype |
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*/ |
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EDmaCallbackRequestCompletion_Src = 0x02, |
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/** Transfer request completion callback - destination side |
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@prototype |
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*/ |
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EDmaCallbackRequestCompletion_Dst = 0x04, |
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/** Descriptor completion callback |
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@prototype |
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*/ |
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EDmaCallbackDescriptorCompletion = 0x08, |
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/** Descriptor completion callback - source side |
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@prototype |
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*/ |
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EDmaCallbackDescriptorCompletion_Src = 0x10, |
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/** Descriptor completion callback - destination side |
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@prototype |
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*/ |
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EDmaCallbackDescriptorCompletion_Dst = 0x20, |
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/** Frame completion callback |
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@prototype |
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*/ |
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EDmaCallbackFrameCompletion = 0x40, |
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/** Frame completion callback - source side |
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@prototype |
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*/ |
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EDmaCallbackFrameCompletion_Src = 0x80, |
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/** Frame completion callback - destination side |
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@prototype |
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EDmaCallbackFrameCompletion_Dst = 0x100, |
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/** H/W descriptor pause event callback |
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@prototype |
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*/ |
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EDmaCallbackLinkedListPaused = 0x200, |
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/** H/W descriptor pause event callback - source side |
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@prototype |
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*/ |
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EDmaCallbackLinkedListPaused_Src = 0x400, |
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/** H/W descriptor pause event callback - destination side |
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@prototype |
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*/ |
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EDmaCallbackLinkedListPaused_Dst = 0x800 |
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}; |
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/** The outcome of the transfer request. |
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@released |
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*/ |
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enum TDmaResult |
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{ |
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/** Completed without error */ |
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EDmaResultOK = 0, |
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/** There was an error */ |
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EDmaResultError |
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}; |
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|
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113 |
|
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/** To be used with address mode field of the DMA transfer config struct. |
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|
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@see TDmaTransferConfig::iAddrMode |
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*/ |
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enum TDmaAddrMode |
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{ |
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/** Constant addressing. The address remains the same for consecutive |
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accesses. |
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|
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@released |
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*/ |
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KDmaAddrModeConstant, |
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/** Post-increment addressing. The address increases by the element size |
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after each access. |
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|
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@released |
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*/ |
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KDmaAddrModePostIncrement, |
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/** Post-decrement addressing. The address decreases by the element size |
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after each access. |
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134 |
|
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@prototype |
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*/ |
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KDmaAddrModePostDecrement, |
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/** 1D-index addressing. The address always increases by the element size |
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plus the element skip value after each access. |
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140 |
|
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@prototype |
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*/ |
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KDmaAddrMode1DIndex, |
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/** 2D-index addressing. The address increases by the element size plus the |
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element skip value - but only within a frame. Once a full frame has been |
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transferred, the address increases by the element size plus the element |
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skip value plus the frame skip value. |
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|
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@prototype |
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*/ |
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KDmaAddrMode2DIndex |
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}; |
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|
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|
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/** To be used with the burst size field of the DMA transfer config struct. |
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|
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@see SDmacCaps::iBurstTransactions |
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@see TDmaTransferConfig::iBurstSize |
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|
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@prototype |
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*/ |
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enum TDmaBurstSize |
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{ |
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/** Don't use burst transactions */ |
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KDmaNoBursts = -1, |
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/** Don't care (the default) */ |
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KDmaBurstSizeAny = 0x00, |
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/** 4 bytes */ |
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KDmaBurstSize4 = 0x04, |
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/** 8 bytes */ |
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KDmaBurstSize8 = 0x08, |
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/** 16 bytes */ |
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KDmaBurstSize16 = 0x10, |
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/** 32 bytes */ |
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KDmaBurstSize32 = 0x20, |
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/** 64 bytes */ |
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KDmaBurstSize64 = 0x40, |
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/** 128 bytes */ |
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KDmaBurstSize128 = 0x80 |
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}; |
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|
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|
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/** To be used with the flags field of the DMA transfer config struct. |
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|
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@see TDmaTransferConfig::iFlags |
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*/ |
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enum TDmaTransferFlags |
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{ |
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/** Location is address of a memory buffer (as opposed to a peripheral or a |
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register). |
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|
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@released |
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*/ |
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KDmaMemAddr = 0x01, |
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/** Address is a physical address (as opposed to a linear one). |
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|
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If it is a memory address then KDmaMemIsContiguous will need to be set |
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as well. |
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|
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@released |
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*/ |
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KDmaPhysAddr = 0x02, |
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/** Target memory is known to be physically contiguous, hence there is |
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no need for the framework to check for memory fragmentation. |
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|
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@released |
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*/ |
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KDmaMemIsContiguous = 0x04, |
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/** Don't use packed access (if possible) |
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|
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@released |
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*/ |
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KDmaDontUsePacked = 0x08, |
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/** Location is big endian (little endian if not set). |
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|
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To have any effect, this flag requires the DMAC to support endianness |
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conversion. |
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|
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@see SDmacCaps::iEndiannessConversion |
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|
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@prototype |
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*/ |
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KDmaBigEndian = 0x10, |
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/** Don't do endianness conversion even if applicable. |
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|
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To have any effect, this flag requires the DMAC to support endianness |
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conversion. |
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|
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@see SDmacCaps::iEndiannessConversion |
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|
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@prototype |
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*/ |
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KDmaLockEndian = 0x20, |
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/** Execute client request callback after each subtransfer (streaming / |
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loop case). |
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|
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This option is only taken into account if the respective |
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TDmaTransferConfig::iRepeatCount is non-zero. |
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|
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The callback will complete with a TDmaCallbackType of |
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EDmaCallbackRequestCompletion (even if the repeat counts for source and |
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destination are different), unless the flag |
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TDmaPILFlags::KDmaAsymCompletionCallback is set too, in which case what |
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is described there applies. |
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|
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@prototype |
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*/ |
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KDmaCallbackAfterEveryTransfer = 0x40, |
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/** Execute client request callback after each completed hardware |
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descriptor. |
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|
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Requires the DMAC to support this feature. Unless the DMAC supports |
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asymmetric descriptor interrupts as well, this flag should not be set |
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on only one (source or destination) side. |
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|
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@see SDmacCaps::iDescriptorInterrupt |
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@see SDmacCaps::iAsymDescriptorInterrupt |
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|
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@prototype |
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*/ |
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KDmaCallbackAfterEveryDescriptor = 0x80, |
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/** Execute client request callback after each completed frame. |
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|
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Requires the DMAC to support this feature. Unless the DMAC supports |
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asymmetric frame interrupts as well, this flag should not be set on |
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only one (source or destination) side. |
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|
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@see SDmacCaps::iFrameInterrupt |
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@see SDmacCaps::iAsymFrameInterrupt |
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|
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@prototype |
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*/ |
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KDmaCallbackAfterEveryFrame = 0x100 |
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}; |
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|
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|
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/** To be used with the synchronization flags field of a DMA transfer |
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config struct. |
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|
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@see SDmacCaps::iSynchronizationTypes |
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@see TDmaTransferConfig::iSyncFlags |
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|
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@released |
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*/ |
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enum TDmaTransferSyncFlags |
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{ |
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/** Leave the decision on whether the transfer is hardware synchronized at |
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this end (either source or destination) to the framework. This is the |
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default. |
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*/ |
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KDmaSyncAuto = 0x00, |
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/** Transfer is not hardware synchronized at this end (either source or |
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destination). |
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*/ |
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KDmaSyncNone = 0x01, |
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/** Transfer is hardware synchronized at this end (either source or |
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destination). This option can also be used on its own, without any |
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of the following sync sizes. |
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*/ |
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KDmaSyncHere = 0x02, |
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/** H/W synchronized at this end: transfer one ELEMENT (a number of |
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bytes, depending on the configured element size) per sync event. |
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*/ |
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KDmaSyncSizeElement = 0x04, |
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/** H/W synchronized at this end: transfer one FRAME (a number of |
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elements, depending on the configured frame size) per sync event. |
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*/ |
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KDmaSyncSizeFrame = 0x08, |
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/** H/W synchronized at this end: transfer one BLOCK (a number of |
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frames, depending on the configured transfer size) per sync |
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event. This is the most common use case. |
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*/ |
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KDmaSyncSizeBlock = 0x10, |
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/** H/W synchronized at this end: transfer one PACKET (a number of |
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elements, depending on the configured packet size) per sync event. |
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In cases where the transfer block size is not a multiple of the |
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packet size the last packet will consist of the remaining elements. |
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*/ |
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KDmaSyncSizePacket = 0x20 |
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}; |
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|
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|
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/** To be used with the Graphics operation field of a DMA transfer request. |
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|
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@see TDmaTransferArgs::iGraphicsOps |
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|
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@prototype |
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*/ |
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enum TDmaGraphicsOps |
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{ |
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/** Don't use any graphics acceleration feature (the default) */ |
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KDmaGraphicsOpNone = 0x00, |
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/** Enable graphics acceleration feature 'Constant Fill' */ |
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KDmaGraphicsOpConstantFill = 0x01, |
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/** Enable graphics acceleration feature 'TransparentCopy' */ |
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KDmaGraphicsOpTransparentCopy = 0x02 |
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}; |
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|
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|
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/** To be used with the PIL flags field of a DMA transfer request. |
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|
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@see TDmaTransferArgs::iFlags |
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*/ |
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enum TDmaPILFlags |
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{ |
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/** Request a different max transfer size (for instance for test |
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purposes). |
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|
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@released |
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*/ |
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KDmaAltTransferLength = 0x01, |
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/** Execute client request callback in ISR context instead of from a |
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DFC. |
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|
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@released |
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*/ |
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KDmaRequestCallbackFromIsr = 0x02, |
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/** Execute descriptor completion callback in ISR context instead of |
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from a DFC. This option is to be used in conjunction with the |
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TDmaTransferFlags::KDmaCallbackAfterEveryDescriptor flag. |
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|
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@prototype |
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*/ |
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KDmaDescriptorCallbackFromIsr = 0x04, |
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/** Execute frame completion callback in ISR context instead of |
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from a DFC. This option is to be used in conjunction with the |
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TDmaTransferFlags::KDmaCallbackAfterEveryFrame flag. |
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|
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@prototype |
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*/ |
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KDmaFrameCallbackFromIsr = 0x08, |
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/** Execute the client request callback separately for source and |
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destination subtransfers. |
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|
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This flag also determines the TDmaCallbackType value returned. If set, |
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the callback will complete with EDmaCallbackRequestCompletion_Src or |
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EDmaCallbackRequestCompletion_Dst, respectively, instead of with |
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EDmaCallbackRequestCompletion. |
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|
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Requires the DMAC to support this feature. |
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|
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@see SDmacCaps::iAsymCompletionInterrupt |
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|
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@prototype |
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*/ |
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KDmaAsymCompletionCallback = 0x10, |
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/** Execute the descriptor completion callback separately for source |
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and destination subtransfers. |
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|
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This flag modifies the behaviour of the |
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TDmaTransferFlags::KDmaCallbackAfterEveryDescriptor flag and also |
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determines the TDmaCallbackType value returned. If set, the callback |
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will complete with EDmaCallbackDescriptorCompletion_Src or |
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EDmaCallbackDescriptorCompletion_Dst, respectively, instead of with |
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EDmaCallbackDescriptorCompletion. |
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|
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Requires the DMAC to support this feature. |
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|
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@see SDmacCaps::iAsymDescriptorInterrupt |
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|
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@prototype |
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*/ |
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KDmaAsymDescriptorCallback = 0x20, |
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/** Execute the frame completion callback separately for source and |
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destination subtransfers. |
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|
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This flag modifies the behaviour of the |
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TDmaTransferFlags::KDmaCallbackAfterEveryFrame flag. If set, the |
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callback will complete with EDmaCallbackFrameCompletion_Src or |
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EDmaCallbackFrameCompletion_Dst, respectively, instead of with |
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EDmaCallbackFrameCompletion. |
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|
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Requires the DMAC to support this feature. |
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|
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@see SDmacCaps::iAsymFrameInterrupt |
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|
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@prototype |
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*/ |
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KDmaAsymFrameCallback = 0x40, |
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/** This transfer (only) should use the channel priority indicated by |
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TDmaTransferArgs::iChannelPriority. |
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|
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@prototype |
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*/ |
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KDmaRequestChannelPriority = 0x80 |
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}; |
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427 |
|
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428 |
|
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/** Values which can be used with the priority field when opening a channel |
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and/or when fragmenting a transfer request. |
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431 |
|
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@see TDmaChannel::SCreateInfo::iPriority |
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@see TDmaTransferArgs::iChannelPriority |
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434 |
|
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@prototype |
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*/ |
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enum TDmaPriority |
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438 |
{ |
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439 |
/** No transfer priority preference (don't care value) */ |
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KDmaPriorityNone = 0x0, |
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/** Platform-independent transfer priority 1 (lowest) */ |
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KDmaPriority1 = 0x80000001, |
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/** Platform-independent transfer priority 2 */ |
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KDmaPriority2 = 0x80000002, |
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/** Platform-independent transfer priority 3 */ |
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KDmaPriority3 = 0x80000003, |
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/** Platform-independent transfer priority 4 */ |
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KDmaPriority4 = 0x80000004, |
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/** Platform-independent transfer priority 5 */ |
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KDmaPriority5 = 0x80000005, |
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/** Platform-independent transfer priority 6 */ |
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KDmaPriority6 = 0x80000006, |
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/** Platform-independent transfer priority 7 */ |
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KDmaPriority7 = 0x80000007, |
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/** Platform-independent transfer priority 8 (highest) */ |
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KDmaPriority8 = 0x80000008 |
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457 |
}; |
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458 |
|
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459 |
|
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/** Contains the configuration values for either the source or the |
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destination side of a DMA transfer. |
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462 |
|
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Note that some fields (notably iElementSize, iElementsPerFrame and |
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iFramesPerTransfer) may only differ between source and destination if |
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the underlying DMAC supports this. |
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466 |
|
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@see SDmacCaps::iSrcDstAsymmetry |
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@see TDmaTransferArgs::iSrcConfig |
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@see TDmaTransferArgs::iDstConfig |
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470 |
|
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@released |
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*/ |
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struct TDmaTransferConfig |
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474 |
{ |
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friend struct TDmaTransferArgs; |
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476 |
|
139
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/** Default constructor. |
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478 |
|
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Initializes all fields with meaningful default values. |
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480 |
*/ |
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#ifdef DMA_APIV2 |
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482 |
KIMPORT_C |
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#endif |
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TDmaTransferConfig(); |
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485 |
|
139
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/** Alternate constructor. |
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487 |
|
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Intended for general use ie. not 1D or 2D transfers |
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*/ |
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#ifdef DMA_APIV2 |
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491 |
KIMPORT_C |
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492 |
#endif |
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TDmaTransferConfig ( |
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TUint32 aAddr, |
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TUint aTransferFlags, |
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TDmaAddrMode aAddrMode = KDmaAddrModePostIncrement, |
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TUint aSyncFlags = KDmaSyncAuto, |
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TDmaBurstSize aBurstSize = KDmaBurstSizeAny, |
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TUint aElementSize = 0, |
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TUint aElementsPerPacket = 0, |
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TUint aPslTargetInfo = 0, |
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TInt aRepeatCount = 0 |
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503 |
); |
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504 |
|
139
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505 |
/** Alternate constructor. |
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506 |
|
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Intended for 1D and 2D transfers. |
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508 |
*/ |
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509 |
#ifdef DMA_APIV2 |
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510 |
KIMPORT_C |
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511 |
#endif |
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512 |
TDmaTransferConfig ( |
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513 |
TUint32 aAddr, |
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TUint aElementSize, |
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TUint aElementsPerFrame, |
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TUint aFramesPerTransfer, |
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TInt aElementSkip, |
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518 |
TInt aFrameSkip, |
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519 |
TUint aTransferFlags, |
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520 |
TUint aSyncFlags = KDmaSyncAuto, |
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521 |
TDmaBurstSize aBurstSize = KDmaBurstSizeAny, |
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522 |
TUint aElementsPerPacket = 0, |
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523 |
TUint aPslTargetInfo = 0, |
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TInt aRepeatCount = 0 |
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525 |
); |
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526 |
|
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527 |
/** Transfer start address */ |
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528 |
TUint32 iAddr; |
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529 |
/** Address mode */ |
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|
530 |
TDmaAddrMode iAddrMode; |
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531 |
/** Element size in bytes (1/2/4/8) */ |
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|
532 |
TUint iElementSize; |
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|
533 |
/** Number of elements per frame */ |
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|
534 |
TUint iElementsPerFrame; |
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diff
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|
535 |
/** Number of elements per packet */ |
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|
536 |
TUint iElementsPerPacket; |
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diff
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|
537 |
/** Number of frames to transfer (result is the transfer block) */ |
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|
538 |
TUint iFramesPerTransfer; |
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diff
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|
539 |
/** Element skip in bytes (for addr modes E1DIndex or E2DIndex) */ |
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|
540 |
TInt iElementSkip; |
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|
541 |
/** Frame skip in bytes (for addr mode E2DIndex) */ |
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|
542 |
TInt iFrameSkip; |
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|
543 |
/** Use burst transactions of the specified size (in bytes) |
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|
544 |
@see TDmaBurstSize |
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|
545 |
*/ |
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|
546 |
TInt iBurstSize; |
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|
547 |
/** PIL src/dst config flags. |
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|
548 |
@see TDmaTransferFlags |
139
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|
549 |
*/ |
36
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|
550 |
TUint32 iFlags; |
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|
551 |
/** Transfer synchronization flags. |
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|
552 |
@see TDmaTransferSyncFlags |
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|
553 |
*/ |
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|
554 |
TUint32 iSyncFlags; |
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|
555 |
/** Information passed to the PSL */ |
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|
556 |
TUint iPslTargetInfo; |
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|
557 |
/** How often to repeat this (sub-)transfer: |
139
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|
558 |
0 no repeat (the default) |
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|
559 |
1..n once / n times |
36
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|
560 |
-1 endlessly. |
139
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|
561 |
|
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|
562 |
@prototype |
36
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|
563 |
*/ |
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|
564 |
TInt iRepeatCount; |
139
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|
565 |
/** Structure contents delta vector. |
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|
566 |
|
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|
567 |
(usage tbd) |
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diff
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|
568 |
|
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|
569 |
@prototype |
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|
570 |
*/ |
36
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|
571 |
TUint32 iDelta; |
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|
572 |
/** Reserved for future use */ |
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|
573 |
TUint32 iReserved; |
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|
574 |
|
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|
575 |
private: |
139
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|
576 |
/** Private constructor. |
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|
577 |
|
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|
578 |
Initializes fields with the values passed in by the legacy version of |
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|
579 |
the DDmaRequest::Fragment() call. |
36
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|
580 |
*/ |
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|
581 |
TDmaTransferConfig(TUint32 aAddr, TUint aFlags, TBool aAddrInc); |
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|
582 |
}; |
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|
583 |
|
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|
584 |
|
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diff
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|
585 |
/** To be used by the client to pass DMA transfer request details to the |
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diff
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|
586 |
framework. |
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changeset
|
587 |
|
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|
588 |
Also used internally by the framework as a pseudo descriptor if the |
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|
589 |
controller doesn't support hardware descriptors (scatter/gather LLI). |
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diff
changeset
|
590 |
|
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|
591 |
@see DDmaRequest::Fragment |
139
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|
592 |
|
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|
593 |
@released |
36
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|
594 |
*/ |
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|
595 |
struct TDmaTransferArgs |
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|
596 |
{ |
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|
597 |
friend class DDmaRequest; |
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|
598 |
friend class TDmaChannel; |
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|
599 |
friend class TDmac; |
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|
600 |
friend class DmaChannelMgr; |
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changeset
|
601 |
|
139
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|
602 |
/** Default constructor. |
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|
603 |
|
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|
604 |
Initializes all fields with meaningful default values. |
36
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|
605 |
*/ |
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|
606 |
#ifdef DMA_APIV2 |
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|
607 |
KIMPORT_C |
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|
608 |
#endif |
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|
609 |
TDmaTransferArgs(); |
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|
610 |
|
139
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|
611 |
/** Alternate constructor. |
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|
612 |
|
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|
613 |
Intended for transfers where src and dst TDmaTransferConfig structs |
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|
614 |
share some of the same options, i.e. iDmaTransferFlags, iAddrMode, |
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|
615 |
iSyncFlags, iBurstSize, and iElementSize. |
36
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|
616 |
|
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|
617 |
@param aSrcAddr |
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|
618 |
@param aDstAddr |
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|
619 |
@param aCount Number of bytes to transfer |
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|
620 |
@param aDmaTransferFlags Bitmask of TDmaTransferFlags for src and dst |
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|
621 |
@param aDmaSyncFlags Bitmask of TDmaTransferSyncFlags for src and dst |
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|
622 |
@param aMode Address mode for src and dst |
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|
623 |
@param aDmaPILFlags Bitmask of TDmaPILFlags |
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|
624 |
@param aElementSize In bytes (1/2/4/8) for src and dst |
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|
625 |
@param aChannelPriority |
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|
626 |
@param aBurstSize for src and dst |
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|
627 |
@param aPslRequestInfo Info word passed to the PSL |
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|
628 |
@param aGraphicOp Graphics operation to be executed |
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|
629 |
@param aColour Colour value for graphics operation |
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Revision: 201003
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|
630 |
*/ |
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diff
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|
631 |
#ifdef DMA_APIV2 |
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|
632 |
KIMPORT_C |
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changeset
|
633 |
#endif |
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|
634 |
TDmaTransferArgs ( |
139
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|
635 |
TUint aSrcAddr, |
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|
636 |
TUint aDstAddr, |
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|
637 |
TUint aCount, |
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638 |
TUint aDmaTransferFlags, |
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639 |
TUint aDmaSyncFlags = KDmaSyncAuto, |
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TUint aDmaPILFlags = 0, |
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641 |
TDmaAddrMode aMode = KDmaAddrModePostIncrement, |
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TUint aElementSize = 0, |
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TUint aChannelPriority = KDmaPriorityNone, |
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644 |
TDmaBurstSize aBurstSize = KDmaBurstSizeAny, |
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645 |
TUint aPslRequestInfo = 0, |
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646 |
TDmaGraphicsOps aGraphicOp = KDmaGraphicsOpNone, |
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647 |
TUint32 aColour = 0 |
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|
648 |
); |
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|
649 |
|
139
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650 |
/** Alternate constructor. |
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|
651 |
|
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652 |
Intended for transfers needing specific options for source and |
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653 |
destination TDmaTransferConfig structs. |
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654 |
|
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655 |
@param aSrc Configuration values for the source |
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656 |
@param aDst Configuration values for the destination |
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@param aFlags @see TDmaPILFlags |
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658 |
@param aChannelPriority Use for this request (only) the indicated |
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659 |
channel priority. Requires KDmaRequestChannelPriority to be set in |
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660 |
iFlags as well. @see TDmaPriority |
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661 |
@param aPslRequestInfo Info word passed to the PSL |
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@param aGraphicOp Graphics operation to be executed |
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@param aColour Colour value for graphics operation |
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664 |
*/ |
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665 |
#ifdef DMA_APIV2 |
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666 |
KIMPORT_C |
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|
667 |
#endif |
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668 |
TDmaTransferArgs ( |
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const TDmaTransferConfig& aSrc, |
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670 |
const TDmaTransferConfig& aDst, |
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671 |
TUint32 aFlags = 0, |
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TUint aChannelPriority = KDmaPriorityNone, |
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TUint aPslRequestInfo = 0, |
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TDmaGraphicsOps aGraphicOp = KDmaGraphicsOpNone, |
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675 |
TUint32 aColour = 0 |
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|
676 |
); |
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|
677 |
|
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|
678 |
/** Configuration values for the source */ |
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|
679 |
TDmaTransferConfig iSrcConfig; |
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|
680 |
/** Configuration values for the destination */ |
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|
681 |
TDmaTransferConfig iDstConfig; |
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|
682 |
|
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|
683 |
/** Number of bytes to transfer (optional). |
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|
684 |
|
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|
685 |
A non-zero value here must be consistent with iElementSize, |
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|
686 |
iElementsPerFrame and iFramesPerTransfer in iSrcConfig and iDstConfig |
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|
687 |
if the latter are specified as well (or instead, they may be left at |
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|
688 |
their default values of zero). |
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|
689 |
|
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|
690 |
If zero, the PIL will fill in a value calculated from multiplying |
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|
691 |
iElementSize, iElementsPerFrame and iFramesPerTransfer in iSrcConfig, |
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692 |
so that the PSL can rely on it being always non-zero and valid. |
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|
693 |
*/ |
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|
694 |
TUint iTransferCount; |
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|
695 |
/** Graphics operation to be executed */ |
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|
696 |
TDmaGraphicsOps iGraphicsOps; |
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|
697 |
/** Colour value for graphics operations */ |
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|
698 |
TUint32 iColour; |
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|
699 |
/** PIL common flags |
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|
700 |
@see TDmaPILFlags |
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|
701 |
*/ |
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|
702 |
TUint32 iFlags; |
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|
703 |
/** Use for this request (only) the indicated channel priority. |
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|
704 |
Requires KDmaRequestChannelPriority to be set in iFlags as well. |
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|
705 |
@see TDmaPriority |
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|
706 |
*/ |
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|
707 |
TUint iChannelPriority; |
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|
708 |
/** Info word passed to the PSL */ |
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|
709 |
TUint iPslRequestInfo; |
139
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|
710 |
/** Stores the PSL cookie returned by TDmaChannel::PslId() at request |
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|
711 |
fragmentation time. |
36
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|
712 |
|
139
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|
713 |
The value PslId() is often (but not necessarily) identical with the |
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|
714 |
client's TDmaChannel::SCreateInfo::iCookie, which gets passed by the |
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|
715 |
PIL into DmaChannelMgr::Open() as 'aOpenId'. |
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|
716 |
*/ |
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|
717 |
TUint32 iChannelCookie; |
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|
718 |
/** Structure contents delta vector. |
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|
719 |
|
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|
720 |
(usage tbd) |
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|
721 |
|
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|
722 |
@prototype |
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|
723 |
*/ |
36
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|
724 |
TUint32 iDelta; |
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|
725 |
/** Reserved for future use */ |
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|
726 |
TUint32 iReserved1; |
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|
727 |
|
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|
728 |
private: |
139
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|
729 |
/** Private constructor. |
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|
730 |
|
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|
731 |
Initializes fields with the values passed in by the legacy version of |
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|
732 |
the DDmaRequest::Fragment() call. |
36
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|
733 |
*/ |
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|
734 |
TDmaTransferArgs(TUint32 aSrcAddr, TUint32 aDstAddr, TInt aCount, |
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|
735 |
TUint aFlags, TUint32 aPslInfo); |
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|
736 |
/** Reserved for future use */ |
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|
737 |
TUint32 iReserved2; |
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|
738 |
}; |
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|
739 |
|
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|
740 |
|
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Revision: 201003
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|
741 |
/** DMAC capabilities info structure. |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff
changeset
|
742 |
|
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff
changeset
|
743 |
Instances are to be filled in by the PSL and then linked to via TDmaChannel |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff
changeset
|
744 |
objects after they have been opened. |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff
changeset
|
745 |
|
139
95f71bcdcdb7
Revision: 201021
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parents:
36
diff
changeset
|
746 |
The contents may vary even between channels on the same DMAC (but should |
36
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff
changeset
|
747 |
remain constant for a given channel for the duration that it is open), |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff
changeset
|
748 |
depending on static or dynamic factors which only the PSL knows about. |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff
changeset
|
749 |
|
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff
changeset
|
750 |
@see TDmaChannel::Open |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff
changeset
|
751 |
@see TDmaChannel::DmacCaps |
139
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Revision: 201021
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parents:
36
diff
changeset
|
752 |
|
95f71bcdcdb7
Revision: 201021
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
753 |
@released |
36
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff
changeset
|
754 |
*/ |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff
changeset
|
755 |
struct SDmacCaps |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff
changeset
|
756 |
{ |
139
95f71bcdcdb7
Revision: 201021
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
757 |
/** DMAC supports n + 1 different channel priorities. |
95f71bcdcdb7
Revision: 201021
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
758 |
*/ |
36
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff
changeset
|
759 |
TUint iChannelPriorities; |
139
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Revision: 201021
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
760 |
/** DMAC supports the pausing and resuming of channels. |
95f71bcdcdb7
Revision: 201021
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
761 |
*/ |
36
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff
changeset
|
762 |
TBool iChannelPauseAndResume; |
139
95f71bcdcdb7
Revision: 201021
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
763 |
/** DMA addresses must be aligned on an element size boundary. |
95f71bcdcdb7
Revision: 201021
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
764 |
*/ |
36
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff
changeset
|
765 |
TBool iAddrAlignedToElementSize; |
139
95f71bcdcdb7
Revision: 201021
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
766 |
/** DMAC supports 1D (element) index addressing in hardware. |
95f71bcdcdb7
Revision: 201021
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
767 |
*/ |
36
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff
changeset
|
768 |
TBool i1DIndexAddressing; |
139
95f71bcdcdb7
Revision: 201021
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
769 |
/** DMAC supports 2D (frame) index addressing in hardware. |
95f71bcdcdb7
Revision: 201021
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
770 |
*/ |
36
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff
changeset
|
771 |
TBool i2DIndexAddressing; |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff
changeset
|
772 |
/** DMAC supports these transfer synchronization types (bitmap of values). |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff
changeset
|
773 |
|
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff
changeset
|
774 |
@see TDmaTransferSyncFlags |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff
changeset
|
775 |
*/ |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff
changeset
|
776 |
TUint iSynchronizationTypes; |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff
changeset
|
777 |
/** DMAC supports burst transactions with these sizes (bitmap of values). |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff
changeset
|
778 |
|
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff
changeset
|
779 |
@see TDmaBurstSize |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff
changeset
|
780 |
*/ |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff
changeset
|
781 |
TUint iBurstTransactions; |
139
95f71bcdcdb7
Revision: 201021
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
782 |
/** DMAC supports a 'h/w descriptor complete' interrupt. |
95f71bcdcdb7
Revision: 201021
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
783 |
*/ |
36
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff
changeset
|
784 |
TBool iDescriptorInterrupt; |
139
95f71bcdcdb7
Revision: 201021
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
785 |
/** DMAC supports a 'frame transfer complete' interrupt. |
95f71bcdcdb7
Revision: 201021
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
786 |
*/ |
36
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff
changeset
|
787 |
TBool iFrameInterrupt; |
139
95f71bcdcdb7
Revision: 201021
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
788 |
/** DMAC supports a 'linked-list pause event' interrupt. |
95f71bcdcdb7
Revision: 201021
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
789 |
*/ |
36
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff
changeset
|
790 |
TBool iLinkedListPausedInterrupt; |
139
95f71bcdcdb7
Revision: 201021
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
791 |
/** DMAC supports endianness conversion. |
95f71bcdcdb7
Revision: 201021
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
792 |
*/ |
36
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff
changeset
|
793 |
TBool iEndiannessConversion; |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff
changeset
|
794 |
/** DMAC supports these graphics operations (bitmap of values). |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff
changeset
|
795 |
|
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff
changeset
|
796 |
@see TDmaGraphicsOps |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff
changeset
|
797 |
*/ |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff
changeset
|
798 |
TUint iGraphicsOps; |
139
95f71bcdcdb7
Revision: 201021
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
799 |
/** DMAC supports repeated transfers (loops). |
95f71bcdcdb7
Revision: 201021
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
800 |
*/ |
36
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff
changeset
|
801 |
TBool iRepeatingTransfers; |
139
95f71bcdcdb7
Revision: 201021
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
802 |
/** DMAC supports logical channel linking (chaining). |
95f71bcdcdb7
Revision: 201021
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
803 |
*/ |
36
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff
changeset
|
804 |
TBool iChannelLinking; |
139
95f71bcdcdb7
Revision: 201021
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
805 |
/** DMAC supports scatter/gather mode (linked list items). |
95f71bcdcdb7
Revision: 201021
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
806 |
*/ |
36
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff
changeset
|
807 |
TBool iHwDescriptors; |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff
changeset
|
808 |
/** DMAC supports asymmetric source and destination transfer |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff
changeset
|
809 |
parameters (such as element size). |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff
changeset
|
810 |
*/ |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff
changeset
|
811 |
TBool iSrcDstAsymmetry; |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff
changeset
|
812 |
/** DMAC supports asymmetric h/w descriptor lists. |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff
changeset
|
813 |
|
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff
changeset
|
814 |
ETrue here requires ETrue for iHwDescriptors and iSrcDstAsymmetry as |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff
changeset
|
815 |
well. |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff
changeset
|
816 |
*/ |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff
changeset
|
817 |
TBool iAsymHwDescriptors; |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff
changeset
|
818 |
/** DMAC with asymmetric descriptor support has the limitation that the |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff
changeset
|
819 |
number of bytes transferred in source and destination must be equal in |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff
changeset
|
820 |
every link segment (i.e. in each src/dst descriptor pair). |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff
changeset
|
821 |
|
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff
changeset
|
822 |
ETrue here requires ETrue for iAsymHwDescriptors as well. |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff
changeset
|
823 |
*/ |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff
changeset
|
824 |
TBool iBalancedAsymSegments; |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff
changeset
|
825 |
/** DMAC supports separate transfer completion notifications for source and |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff
changeset
|
826 |
destination side subtransfers. |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff
changeset
|
827 |
|
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff
changeset
|
828 |
This capability is required for the asymmetric transfer completion |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff
changeset
|
829 |
callback API feature. |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff
changeset
|
830 |
|
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff
changeset
|
831 |
@see TDmaPILFlags::KDmaAsymCompletionCallback |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff
changeset
|
832 |
*/ |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff
changeset
|
833 |
TBool iAsymCompletionInterrupt; |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff
changeset
|
834 |
/** DMAC supports separate descriptor completion notifications for source and |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff
changeset
|
835 |
destination side. |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff
changeset
|
836 |
|
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff
changeset
|
837 |
This capability is required for the asymmetric descriptor completion |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff
changeset
|
838 |
callback API feature. |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff
changeset
|
839 |
|
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff
changeset
|
840 |
ETrue here requires ETrue for both iDescriptorInterrupt and |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff
changeset
|
841 |
iAsymHwDescriptors as well. |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff
changeset
|
842 |
|
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff
changeset
|
843 |
@see TDmaPILFlags::KDmaAsymDescriptorCallback |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff
changeset
|
844 |
*/ |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff
changeset
|
845 |
TBool iAsymDescriptorInterrupt; |
538db54a451d
Revision: 201003
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846 |
/** DMAC supports separate frame completion notifications for source and |
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847 |
destination side. |
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848 |
|
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849 |
This capability is required for the asymmetric frame completion |
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850 |
callback API feature. |
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|
851 |
|
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852 |
ETrue here requires ETrue for iFrameInterrupt as well. |
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853 |
|
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854 |
@see TDmaPILFlags::KDmaAsymFrameCallback |
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855 |
*/ |
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856 |
TBool iAsymFrameInterrupt; |
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857 |
|
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858 |
/** Reserved for future use */ |
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859 |
TUint32 iReserved[5]; |
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860 |
}; |
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861 |
|
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862 |
|
139
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863 |
////////////////////////////////////////////////////////////////////////////// |
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864 |
// INTERFACE WITH TEST HARNESS |
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////////////////////////////////////////////////////////////////////////////// |
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866 |
|
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867 |
/** Set of information used by test harness. |
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868 |
|
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869 |
@deprecated |
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870 |
*/ |
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871 |
#ifdef DMA_APIV2 |
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872 |
struct TDmaTestInfo |
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873 |
{ |
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/** Maximum transfer size in bytes for all channels (ie. the minimum of all |
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875 |
channels' maximum size) |
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876 |
*/ |
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877 |
TUint iMaxTransferSize; |
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878 |
/** 3->Memory buffers must be 4-byte aligned, 7->8-byte aligned, ... */ |
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879 |
TUint iMemAlignMask; |
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880 |
/** Cookie to pass to DDmaRequest::Fragment for memory-memory transfer */ |
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881 |
TUint32 iMemMemPslInfo; |
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882 |
/** Number of test single-buffer channels */ |
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883 |
TInt iMaxSbChannels; |
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/** Pointer to array containing single-buffer test channel ids */ |
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885 |
TUint32* iSbChannels; |
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886 |
/** Number of test double-buffer channels */ |
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887 |
TInt iMaxDbChannels; |
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888 |
/** Pointer to array containing double-buffer test channel ids */ |
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889 |
TUint32* iDbChannels; |
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890 |
/** Number of test scatter-gather channels */ |
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891 |
TInt iMaxSgChannels; |
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892 |
/** Pointer to array containing scatter-gather test channel ids */ |
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893 |
TUint32* iSgChannels; |
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894 |
}; |
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895 |
#endif |
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896 |
|
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897 |
|
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898 |
/** Set of information used by test harness. |
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899 |
|
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900 |
@released |
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901 |
*/ |
36
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902 |
struct TDmaV2TestInfo |
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903 |
{ |
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904 |
enum {KMaxChannels=32}; |
139
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905 |
/** Maximum transfer size in bytes for all channels (ie. the minimum of all |
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906 |
channels' maximum size) |
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907 |
*/ |
36
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908 |
TUint iMaxTransferSize; |
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909 |
/** 3->Memory buffers must be 4-byte aligned, 7->8-byte aligned, ... */ |
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910 |
TUint iMemAlignMask; |
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|
911 |
/** Cookie to pass to DDmaRequest::Fragment for memory-memory transfer */ |
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912 |
TUint32 iMemMemPslInfo; |
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913 |
/** Number of test single-buffer channels */ |
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914 |
TInt iMaxSbChannels; |
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915 |
/** Pointer to array containing single-buffer test channel ids */ |
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916 |
TUint32 iSbChannels[KMaxChannels]; |
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917 |
/** Number of test double-buffer channels */ |
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918 |
TInt iMaxDbChannels; |
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919 |
/** Pointer to array containing double-buffer test channel ids */ |
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920 |
TUint32 iDbChannels[KMaxChannels]; |
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921 |
/** Number of test scatter-gather channels */ |
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922 |
TInt iMaxSgChannels; |
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923 |
/** Pointer to array containing scatter-gather test channel ids */ |
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924 |
TUint32 iSgChannels[KMaxChannels]; |
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925 |
}; |
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926 |
|
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927 |
|
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928 |
#endif // #ifndef __DMADEFS_H__ |