kerneltest/e32test/misc/d_rndtim.cpp
author Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
Fri, 14 May 2010 17:13:29 +0300
changeset 109 b3a1d9898418
parent 0 a41df078684a
permissions -rw-r--r--
Revision: 201019 Kit: 201019
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// Copyright (c) 1997-2009 Nokia Corporation and/or its subsidiary(-ies).
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// All rights reserved.
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// This component and the accompanying materials are made available
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// under the terms of the License "Eclipse Public License v1.0"
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// which accompanies this distribution, and is available
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// at the URL "http://www.eclipse.org/legal/epl-v10.html".
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//
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// Initial Contributors:
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// Nokia Corporation - initial contribution.
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//
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// Contributors:
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//
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// Description:
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// e32test\misc\d_rndtim.cpp
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// LDD for generating random interrupts
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// 
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//
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#include "platform.h"
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#include <kernel/kern_priv.h>
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#include "d_rndtim.h"
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#include "../misc/prbs.h"
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#if defined(__MAWD__)
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#include <windermere.h>
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#elif defined(__MISA__)
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#define INT_ID KIntIdOstMatchGeneral
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#include <sa1100.h>
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#elif defined(__MCOT__)
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#define INT_ID KIntIdOstMatchGeneral
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#include <cotulla.h>
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#elif defined(__MI920__) || defined(__NI1136__)
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#include <integratorap.h>
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#elif defined(__EPOC32__) && defined(__CPU_X86)
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#include <x86.h>
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#endif
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#ifndef INT_ID
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#error Random timer ISR not supported on this platform
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#endif
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const TInt KMajorVersionNumber=0;
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const TInt KMinorVersionNumber=1;
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const TInt KBuildVersionNumber=1;
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class DRndTimFactory : public DLogicalDevice
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//
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// IPC copy LDD factory
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//
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	{
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public:
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	DRndTimFactory();
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	virtual TInt Install();						//overriding pure virtual
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	virtual void GetCaps(TDes8& aDes) const;	//overriding pure virtual
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	virtual TInt Create(DLogicalChannelBase*& aChannel);	//overriding pure virtual
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	};
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class DRndTim : public DLogicalChannelBase
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//
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// Millisecond timer LDD channel
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//
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	{
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	DRndTim();
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	virtual ~DRndTim();
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protected:
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	virtual TInt DoCreate(TInt aUnit, const TDesC8* aInfo, const TVersion& aVer);
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	virtual TInt Request(TInt aReqNo, TAny* a1, TAny* a2);
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public:
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	static void TimerIsr(TAny* aPtr);
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	static void IDfcFn(TAny* aPtr);
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	void StartTimer();
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	void StopTimer();
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	TInt SetPriority(TInt aHandle, TInt aPriority);
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	TInt Calibrate(TInt aMilliseconds);
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public:
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	TInt iIntId;
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	NFastSemaphore iSem;
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	volatile TUint32 iSeed[2];
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	volatile TUint32 iIsrCount;
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	DThread* iThread;
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	TDfc iIDfc;
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	};
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DECLARE_STANDARD_LDD()
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	{
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    return new DRndTimFactory;
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    }
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DRndTimFactory::DRndTimFactory()
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//
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// Constructor
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//
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    {
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    iVersion=TVersion(KMajorVersionNumber,KMinorVersionNumber,KBuildVersionNumber);
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    //iParseMask=0;//No units, no info, no PDD
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    //iUnitsMask=0;//Only one thing
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    }
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TInt DRndTimFactory::Create(DLogicalChannelBase*& aChannel)
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//
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// Create a new DRndTim on this logical device
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//
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    {
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	aChannel=new DRndTim;
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    return aChannel?KErrNone:KErrNoMemory;
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    }
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TInt DRndTimFactory::Install()
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//
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// Install the LDD - overriding pure virtual
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//
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    {
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    return SetName(&KRndTimLddName);
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    }
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void DRndTimFactory::GetCaps(TDes8& aDes) const
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//
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// Get capabilities - overriding pure virtual
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//
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    {
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    TCapsRndTimV01 b;
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    b.iVersion=TVersion(KMajorVersionNumber,KMinorVersionNumber,KBuildVersionNumber);
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    Kern::InfoCopy(aDes,(TUint8*)&b,sizeof(b));
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    }
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DRndTim::DRndTim()
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//
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// Constructor
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//
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	:	iIntId(-1),
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		iIDfc(&IDfcFn, this)
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    {
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	iThread=&Kern::CurrentThread();
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	iThread->Open();
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	iSem.iOwningThread = &iThread->iNThread;
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	iSeed[0] = 0xb504f333u;
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	iSeed[1] = 0xf9de6484u;
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    }
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DRndTim::~DRndTim()
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	{
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	StopTimer();
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	if (iIntId >= 0)
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		Interrupt::Unbind(iIntId);
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	Kern::SafeClose((DObject*&)iThread, NULL);
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	}
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TInt DRndTim::DoCreate(TInt /*aUnit*/, const TDesC8* /*anInfo*/, const TVersion& aVer)
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//
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// Create channel
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//
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    {
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    if (!Kern::QueryVersionSupported(TVersion(KMajorVersionNumber,KMinorVersionNumber,KBuildVersionNumber),aVer))
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    	return KErrNotSupported;
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	StopTimer();
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	TInt r = Interrupt::Bind(INT_ID, &TimerIsr, this);
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	if (r == KErrNone)
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		iIntId = INT_ID;
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	return r;
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	}
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TInt DRndTim::Request(TInt aFunction, TAny* a1, TAny* a2)
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	{
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	TInt r = KErrNotSupported;
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	switch (aFunction)
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		{
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		case RRndTim::EControlWait:
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			NKern::FSWait(&iSem);
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			r = KErrNone;
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			break;
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		case RRndTim::EControlSetPriority:
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			r = SetPriority(TInt(a1), TInt(a2));
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			break;
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		case RRndTim::EControlStartTimer:
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			NKern::ThreadEnterCS();
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			StartTimer();
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			NKern::ThreadLeaveCS();
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			break;
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		case RRndTim::EControlStopTimer:
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			NKern::ThreadEnterCS();
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			StopTimer();
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			NKern::ThreadLeaveCS();
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			break;
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		case RRndTim::EControlCalibrate:
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			NKern::ThreadEnterCS();
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			r = Calibrate(TInt(a1));
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			NKern::ThreadLeaveCS();
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			break;
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		default:
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			break;
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		}
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	return r;
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	}
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TInt DRndTim::SetPriority(TInt aHandle, TInt aPriority)
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	{
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	TInt r = KErrBadHandle;
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	DThread& c = Kern::CurrentThread();
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	NKern::ThreadEnterCS();
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	NKern::LockSystem();
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	DThread* t = (DThread*)Kern::ObjectFromHandle(&c, aHandle, EThread);
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	if (t && !t->Open())
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		{
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		NKern::UnlockSystem();
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		r = Kern::SetThreadPriority(aPriority, t);
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		t->Close(NULL);
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		}
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	else
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		NKern::UnlockSystem();
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	NKern::ThreadLeaveCS();
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	return r;
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	}
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TInt DRndTim::Calibrate(TInt aMilliseconds)
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	{
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	TUint32 n1, n2;
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	TInt ticks = NKern::TimerTicks(aMilliseconds);
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	n1 = iIsrCount;
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	NKern::Sleep(ticks);
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	n2 = iIsrCount;
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	return (TInt)(n2-n1);
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	}
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void DRndTim::StartTimer()
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	{
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#if defined(__MISA__) 
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	// for SA11x0 use OST match 0
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	TSa1100::ModifyIntLevels(0,KHtIntsOstMatchGeneral);	// route new timer interrupt to FIQ
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	TSa1100::SetOstMatchEOI(KHwOstMatchGeneral);
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	TUint oscr=TSa1100::OstData();
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	TSa1100::SetOstMatch(KHwOstMatchGeneral, oscr + 5000);
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	TSa1100::EnableOstInterrupt(KHwOstMatchGeneral);
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#elif defined(__MCOT__)
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	// for SA11x0 use OST match 0
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	TCotulla::ModifyIntLevels(0,KHtIntsOstMatchGeneral);	// route new timer interrupt to FIQ
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	TCotulla::SetOstMatchEOI(KHwOstMatchGeneral);
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	TUint oscr=TCotulla::OstData();
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	TCotulla::SetOstMatch(KHwOstMatchGeneral, oscr + 5000);
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	TCotulla::EnableOstInterrupt(KHwOstMatchGeneral);
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#endif
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	Interrupt::Enable(INT_ID);
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	}
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void DRndTim::StopTimer()
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	{
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#if defined(__MISA__) 
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	Interrupt::Disable(KIntIdOstMatchGeneral);
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	TSa1100::DisableOstInterrupt(KHwOstMatchGeneral);
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	TSa1100::SetOstMatchEOI(KHwOstMatchGeneral);
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#elif defined(__MCOT__)
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	Interrupt::Disable(KIntIdOstMatchGeneral);
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	TCotulla::DisableOstInterrupt(KHwOstMatchGeneral);
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	TCotulla::SetOstMatchEOI(KHwOstMatchGeneral);
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#endif
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	}
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void DRndTim::TimerIsr(TAny* aPtr)
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	{
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	DRndTim* d = (DRndTim*)aPtr;
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	++d->iIsrCount;
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#if defined(__MISA__) 
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	TUint interval = Random((TUint*)d->iSeed);
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	interval &= 0x3ff;
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	interval += 256;	// 256-1279 ticks = approx 69 to 347 microseconds
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	TUint oscr=TSa1100::OstData();
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	TSa1100::SetOstMatch(KHwOstMatchGeneral, oscr + interval);
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	TSa1100::SetOstMatchEOI(KHwOstMatchGeneral);
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#elif defined(__MCOT__)
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	TUint interval = Random((TUint*)d->iSeed);
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	interval &= 0x3ff;
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	interval += 256;	// 256-1279 ticks = approx 69 to 347 microseconds
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	TUint oscr=TCotulla::OstData();
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	TCotulla::SetOstMatch(KHwOstMatchGeneral, oscr + interval);
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	TCotulla::SetOstMatchEOI(KHwOstMatchGeneral);
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#endif
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	d->iIDfc.Add();
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	}
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void DRndTim::IDfcFn(TAny* aPtr)
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	{
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	DRndTim* d = (DRndTim*)aPtr;
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	d->iSem.Signal();
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	}
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   288