author | Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com> |
Mon, 15 Mar 2010 12:45:50 +0200 | |
branch | RCL_3 |
changeset 81 | e7d2d738d3c2 |
parent 80 | 597aaf25e343 |
child 87 | 2f92ad2dc5db |
child 102 | ef2a444a7410 |
child 132 | e4a7b1cbe40c |
permissions | -rw-r--r-- |
0 | 1 |
// Copyright (c) 1998-2009 Nokia Corporation and/or its subsidiary(-ies). |
2 |
// All rights reserved. |
|
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// This component and the accompanying materials are made available |
|
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// under the terms of the License "Eclipse Public License v1.0" |
|
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// which accompanies this distribution, and is available |
|
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// at the URL "http://www.eclipse.org/legal/epl-v10.html". |
|
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// |
|
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// Initial Contributors: |
|
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// Nokia Corporation - initial contribution. |
|
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// |
|
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// Contributors: |
|
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// |
|
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// Description: |
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// |
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||
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#include "memmodel.h" |
|
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#include "kernel/cache_maintenance.inl" |
|
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#include <kernel/cache.h> |
|
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#include <ramalloc.h> |
|
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#include <defrag.h> |
|
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#include "mm.h" |
|
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#include "mmu.h" |
|
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#include "mpager.h" |
|
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#include "mmapping.h" |
|
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#include "mobject.h" |
|
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#include "mmanager.h" |
|
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#include "mpagearray.h" |
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28 |
||
29 |
||
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// |
|
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// SPageInfo |
|
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// |
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33 |
||
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// check enough space for page infos... |
|
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__ASSERT_COMPILE((KPageInfoLinearEnd-KPageInfoLinearBase)/sizeof(SPageInfo)==(1<<(32-KPageShift))); |
|
36 |
||
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// check KPageInfoShift... |
|
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__ASSERT_COMPILE(sizeof(SPageInfo)==(1<<KPageInfoShift)); |
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39 |
||
40 |
||
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SPageInfo* SPageInfo::SafeFromPhysAddr(TPhysAddr aAddress) |
|
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{ |
|
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__NK_ASSERT_DEBUG((aAddress&KPageMask)==0); |
|
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TUint index = aAddress>>(KPageShift+KPageShift-KPageInfoShift); |
|
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TUint flags = ((TUint8*)KPageInfoMap)[index>>3]; |
|
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TUint mask = 1<<(index&7); |
|
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if(!(flags&mask)) |
|
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return 0; // no SPageInfo for aAddress |
|
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SPageInfo* info = FromPhysAddr(aAddress); |
|
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if(info->iType==SPageInfo::EInvalid) |
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return 0; |
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return info; |
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} |
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||
55 |
||
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#ifdef _DEBUG |
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||
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void SPageInfo::CheckAccess(const char* aMessage, TUint aFlags) |
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{ |
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if(K::Initialising || NKern::Crashed()) |
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return; |
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||
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if((aFlags&ECheckNotAllocated) && (iType!=EUnknown)) |
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{ |
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Kern::Printf("SPageInfo[0x%08x]::CheckAccess failed, PhysAddr()=0x%08x, iType==%d : %s",this,PhysAddr(),iType,aMessage); |
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__NK_ASSERT_DEBUG(0); |
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goto fail; |
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} |
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||
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if((aFlags&ECheckNotUnused) && (iType==EUnused)) |
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{ |
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Kern::Printf("SPageInfo[0x%08x]::CheckAccess failed, PhysAddr()=0x%08x, iType==%d : %s",this,PhysAddr(),iType,aMessage); |
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__NK_ASSERT_DEBUG(0); |
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goto fail; |
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} |
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||
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if((aFlags&ECheckUnused) && (iType!=EUnused)) |
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{ |
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Kern::Printf("SPageInfo[0x%08x]::CheckAccess failed, PhysAddr()=0x%08x, iType==%d : %s",this,PhysAddr(),iType,aMessage); |
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__NK_ASSERT_DEBUG(0); |
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goto fail; |
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} |
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||
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if((aFlags&ECheckNotPaged) && (iPagedState!=EUnpaged)) |
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{ |
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Kern::Printf("SPageInfo[0x%08x]::CheckAccess failed, PhysAddr()=0x%08x, iPagedState=%d : %s",this,PhysAddr(),iPagedState,aMessage); |
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__NK_ASSERT_DEBUG(0); |
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goto fail; |
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} |
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||
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if((aFlags&ECheckRamAllocLock) && !RamAllocLock::IsHeld()) |
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{ |
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Kern::Printf("SPageInfo[0x%08x]::CheckAccess failed, PhysAddr()=0x%08x, iType==%d : %s",this,PhysAddr(),iType,aMessage); |
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__NK_ASSERT_DEBUG(0); |
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goto fail; |
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} |
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||
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if((aFlags&ENoCheckMmuLock) || MmuLock::IsHeld()) |
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return; |
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fail: |
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Kern::Printf("SPageInfo[0x%08x]::CheckAccess failed, PhysAddr()=0x%08x : %s",this,PhysAddr(),aMessage); |
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Mmu::Panic(Mmu::EUnsafePageInfoAccess); |
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} |
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||
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||
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void SPageInfo::Dump() |
|
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{ |
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Kern::Printf("SPageInfo for page %x = %d,%d,%02x,0x%08x,0x%x,%d",PhysAddr(),iType,iPagedState,iFlags,iOwner,iIndex,iPinCount); |
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} |
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||
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#endif |
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// |
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// SPageTableInfo |
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// |
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// check enough space for page table infos... |
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__ASSERT_COMPILE((KPageTableInfoEnd-KPageTableInfoBase)/sizeof(SPageTableInfo) |
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>=(KPageTableEnd-KPageTableBase)/KPageTableSize); |
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||
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// check KPtBlockShift... |
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__ASSERT_COMPILE((sizeof(SPageTableInfo)<<KPtBlockShift)==KPageSize); |
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#ifdef _DEBUG |
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TBool SPageTableInfo::CheckPageCount() |
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{ |
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__NK_ASSERT_DEBUG(MmuLock::IsHeld()); |
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TPte* pt = PageTable(); |
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TUint realCount = 0; |
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do if(*pt++) ++realCount; |
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while(TLinAddr(pt)&(KPageTableMask/sizeof(TPte)*sizeof(TPte))); |
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if(iPageCount==realCount) |
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return true; |
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Kern::Printf("CheckPageCount Failed: pt=0x%08x count=%d realCount=%d",TLinAddr(pt)-KPageTableSize,iPageCount,realCount); |
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return false; |
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} |
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||
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||
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void SPageTableInfo::CheckChangeUse(const char* aName) |
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{ |
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if(K::Initialising) |
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return; |
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if(PageTablesLockIsHeld() && MmuLock::IsHeld()) |
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return; |
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Kern::Printf("SPageTableInfo::CheckChangeUse failed : %s",aName); |
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Mmu::Panic(Mmu::EUnsafePageTableInfoAccess); |
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} |
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void SPageTableInfo::CheckCheckUse(const char* aName) |
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{ |
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if(K::Initialising) |
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return; |
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if(PageTablesLockIsHeld() || MmuLock::IsHeld()) |
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return; |
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Kern::Printf("SPageTableInfo::CheckCheckUse failed : %s",aName); |
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Mmu::Panic(Mmu::EUnsafePageTableInfoAccess); |
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} |
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||
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void SPageTableInfo::CheckAccess(const char* aName) |
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{ |
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if(K::Initialising) |
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return; |
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if(MmuLock::IsHeld()) |
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return; |
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Kern::Printf("SPageTableInfo::CheckAccess failed : %s",aName); |
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Mmu::Panic(Mmu::EUnsafePageTableInfoAccess); |
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} |
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void SPageTableInfo::CheckInit(const char* aName) |
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{ |
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if(K::Initialising) |
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return; |
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if(PageTablesLockIsHeld() && iType==EUnused) |
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return; |
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Kern::Printf("SPageTableInfo::CheckInit failed : %s",aName); |
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Mmu::Panic(Mmu::EUnsafePageTableInfoAccess); |
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} |
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#endif |
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// |
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// RamAllocLock |
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// |
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_LIT(KLitRamAlloc,"RamAlloc"); |
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_LIT(KLitPhysMemSync,"PhysMemSync"); |
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void RamAllocLock::Lock() |
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{ |
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Mmu& m = TheMmu; |
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Kern::MutexWait(*m.iRamAllocatorMutex); |
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if(!m.iRamAllocLockCount++) |
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{ |
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// first lock, so setup memory fail data... |
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m.iRamAllocFailed = EFalse; |
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__NK_ASSERT_DEBUG(m.iRamAllocInitialFreePages==m.FreeRamInPages()); // free RAM shouldn't have changed whilst lock was held |
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} |
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} |
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void RamAllocLock::Unlock() |
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{ |
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Mmu& m = TheMmu; |
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if(--m.iRamAllocLockCount) |
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{ |
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Kern::MutexSignal(*m.iRamAllocatorMutex); |
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return; |
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} |
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TBool failed = m.iRamAllocFailed; |
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TUint initial = m.iRamAllocInitialFreePages; |
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TUint final = m.FreeRamInPages(); |
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m.iRamAllocInitialFreePages = final; // new baseline value |
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TUint changes = K::CheckFreeMemoryLevel(initial*KPageSize,final*KPageSize,failed); |
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if(changes) |
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{ |
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__KTRACE_OPT(KMMU,Kern::Printf("RamAllocLock::Unlock() changes=%x",changes)); |
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} |
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Kern::MutexSignal(*m.iRamAllocatorMutex); |
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} |
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TBool RamAllocLock::Flash() |
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{ |
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Unlock(); |
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Lock(); |
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return true; // lock was released |
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} |
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TBool RamAllocLock::IsHeld() |
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{ |
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Mmu& m = TheMmu; |
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return m.iRamAllocatorMutex->iCleanup.iThread == &Kern::CurrentThread() && m.iRamAllocLockCount; |
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} |
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// |
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// MmuLock |
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// |
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#ifdef _DEBUG |
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TUint MmuLock::UnlockGuardNest =0; |
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TUint MmuLock::UnlockGuardFail =0; |
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#endif |
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NFastMutex MmuLock::iLock; |
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void MmuLock::Lock() |
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{ |
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NKern::FMWait(&iLock); |
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} |
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void MmuLock::Unlock() |
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{ |
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UnlockGuardCheck(); |
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NKern::FMSignal(&iLock); |
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} |
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TBool MmuLock::Flash() |
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{ |
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UnlockGuardCheck(); |
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return NKern::FMFlash(&iLock); |
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} |
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TBool MmuLock::IsHeld() |
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{ |
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NFastMutex& m = iLock; |
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return m.HeldByCurrentThread(); |
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} |
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281 |
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282 |
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// |
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// Initialisation |
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// |
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286 |
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Mmu TheMmu; |
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288 |
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void Mmu::Init1Common() |
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{ |
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__KTRACE_OPT2(KBOOT,KMMU,Kern::Printf("Mmu::Init1Common")); |
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// Mmu data |
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TUint pteType = PteType(ESupervisorReadWrite,true); |
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iTempPteCached = BlankPte((TMemoryAttributes)(EMemoryAttributeNormalCached|EMemoryAttributeDefaultShareable),pteType); |
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iTempPteUncached = BlankPte((TMemoryAttributes)(EMemoryAttributeNormalUncached|EMemoryAttributeDefaultShareable),pteType); |
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iTempPteCacheMaintenance = BlankPte((TMemoryAttributes)(CacheMaintenance::TemporaryMapping()|EMemoryAttributeDefaultShareable),pteType); |
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// other |
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PP::MaxUserThreadStack=0x14000; // 80K - STDLIB asks for 64K for PosixServer!!!! |
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PP::UserThreadStackGuard=0x2000; // 8K |
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PP::MaxStackSpacePerProcess=0x200000; // 2Mb |
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K::SupervisorThreadStackSize=0x1000; // 4K |
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PP::SupervisorThreadStackGuard=0x1000; // 4K |
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K::MachineConfig=(TMachineConfig*)KMachineConfigLinAddr; |
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PP::RamDriveStartAddress=0; |
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PP::RamDriveRange=0; |
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PP::RamDriveMaxSize=0x20000000; // 512MB, probably will be reduced later |
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K::MemModelAttributes=EMemModelTypeFlexible|EMemModelAttrNonExProt|EMemModelAttrKernProt|EMemModelAttrWriteProt| |
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EMemModelAttrVA|EMemModelAttrProcessProt|EMemModelAttrSameVA|EMemModelAttrSvKernProt| |
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EMemModelAttrIPCKernProt|EMemModelAttrRamCodeProt; |
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} |
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313 |
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314 |
||
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#if 0 |
|
316 |
void Mmu::VerifyRam() |
|
317 |
{ |
|
318 |
Kern::Printf("Mmu::VerifyRam() pass 1"); |
|
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RamAllocLock::Lock(); |
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320 |
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321 |
TPhysAddr p = 0; |
|
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do |
|
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{ |
|
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SPageInfo* pi = SPageInfo::SafeFromPhysAddr(p); |
|
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if(pi) |
|
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{ |
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327 |
Kern::Printf("%08x %d",p,pi->Type()); |
|
328 |
if(pi->Type()==SPageInfo::EUnused) |
|
329 |
{ |
|
330 |
volatile TPhysAddr* b = (volatile TPhysAddr*)MapTemp(p,0); |
|
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b[0] = p; |
|
332 |
b[1] = ~p; |
|
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__NK_ASSERT_DEBUG(b[0]==p); |
|
334 |
__NK_ASSERT_DEBUG(b[1]==~p); |
|
335 |
UnmapTemp(); |
|
336 |
} |
|
337 |
} |
|
338 |
p += KPageSize; |
|
339 |
} |
|
340 |
while(p); |
|
341 |
||
342 |
TBool fail = false; |
|
343 |
Kern::Printf("Mmu::VerifyRam() pass 2"); |
|
344 |
do |
|
345 |
{ |
|
346 |
SPageInfo* pi = SPageInfo::SafeFromPhysAddr(p); |
|
347 |
if(pi) |
|
348 |
{ |
|
349 |
if(pi->Type()==SPageInfo::EUnused) |
|
350 |
{ |
|
351 |
volatile TPhysAddr* b = (volatile TPhysAddr*)MapTemp(p,0); |
|
352 |
if(b[0]!=p || b[1]!=~p) |
|
353 |
{ |
|
354 |
fail = true; |
|
355 |
Kern::Printf("%08x FAILED %x %x",b[0],b[1]); |
|
356 |
} |
|
357 |
UnmapTemp(); |
|
358 |
} |
|
359 |
} |
|
360 |
p += KPageSize; |
|
361 |
} |
|
362 |
while(p); |
|
363 |
||
364 |
__NK_ASSERT_DEBUG(!fail); |
|
365 |
RamAllocLock::Unlock(); |
|
366 |
} |
|
367 |
#endif |
|
368 |
||
369 |
||
370 |
void Mmu::Init2Common() |
|
371 |
{ |
|
372 |
__KTRACE_OPT2(KBOOT,KMMU,Kern::Printf("Mmu::Init2Common")); |
|
373 |
||
374 |
// create allocator... |
|
375 |
const SRamInfo& info = *(const SRamInfo*)TheSuperPage().iRamBootData; |
|
376 |
iRamPageAllocator = DRamAllocator::New(info, iRamZones, iRamZoneCallback); |
|
377 |
||
378 |
// initialise all pages in banks as unused... |
|
379 |
const SRamBank* bank = info.iBanks; |
|
380 |
while(bank->iSize) |
|
381 |
{ |
|
382 |
TUint32 base = bank->iBase; |
|
383 |
TUint32 size = bank->iSize; |
|
384 |
__KTRACE_OPT2(KBOOT,KMMU,Kern::Printf("Found RAM bank 0x%08x size %d",base,size)); |
|
385 |
if(base+size<=base || ((base|size)&KPageMask)) |
|
386 |
Panic(EInvalidRamBankAtBoot); |
|
387 |
||
388 |
SPageInfo* pi = SPageInfo::FromPhysAddr(base); |
|
389 |
SPageInfo* piEnd = pi+(size>>KPageShift); |
|
390 |
while(pi<piEnd) |
|
391 |
(pi++)->SetUnused(); |
|
392 |
++bank; |
|
393 |
} |
|
394 |
// step over the last bank to get to the reserved banks. |
|
395 |
++bank; |
|
396 |
// mark any reserved regions as allocated... |
|
397 |
while(bank->iSize) |
|
398 |
{ |
|
399 |
TUint32 base = bank->iBase; |
|
400 |
TUint32 size = bank->iSize; |
|
401 |
__KTRACE_OPT2(KBOOT,KMMU,Kern::Printf("Found reserved bank 0x%08x size %d",base,size)); |
|
402 |
if(base+size<=base || ((base|size)&KPageMask)) |
|
403 |
Panic(EInvalidReservedBankAtBoot); |
|
404 |
||
405 |
SPageInfo* pi = SPageInfo::FromPhysAddr(base); |
|
406 |
SPageInfo* piEnd = pi+(size>>KPageShift); |
|
407 |
while(pi<piEnd) |
|
408 |
(pi++)->SetPhysAlloc(); |
|
409 |
++bank; |
|
410 |
} |
|
411 |
||
412 |
// Clear the inital (and only so far) page table info page so all unused |
|
413 |
// page tables infos will be marked as unused. |
|
414 |
__ASSERT_COMPILE(SPageTableInfo::EUnused == 0); |
|
415 |
memclr((TAny*)KPageTableInfoBase, KPageSize); |
|
416 |
||
417 |
// look for page tables - assume first page table maps page tables |
|
418 |
TPte* pPte = (TPte*)KPageTableBase; |
|
419 |
TInt i; |
|
420 |
for(i=0; i<KChunkSize/KPageSize; ++i) |
|
421 |
{ |
|
422 |
TPte pte = *pPte++; |
|
423 |
if(pte==KPteUnallocatedEntry) // after boot, page tables are contiguous |
|
424 |
break; |
|
425 |
TPhysAddr ptpgPhys = Mmu::PtePhysAddr(pte,i); |
|
426 |
__KTRACE_OPT(KBOOT,Kern::Printf("Page Table Group %08x -> Phys %08x", KPageTableBase+i*KPageSize, ptpgPhys)); |
|
427 |
SPageInfo* pi = SPageInfo::SafeFromPhysAddr(ptpgPhys); |
|
428 |
__ASSERT_ALWAYS(pi, Panic(EInvalidPageTableAtBoot)); |
|
429 |
pi->SetFixed(i); // this also sets the SPageInfo::iOffset so that linear-to-physical works |
|
430 |
} |
|
431 |
||
432 |
// look for mapped pages |
|
433 |
TPde* pd = Mmu::PageDirectory(KKernelOsAsid); |
|
434 |
for(i=0; i<(1<<(32-KChunkShift)); ++i) |
|
435 |
{ |
|
436 |
TPde pde = pd[i]; |
|
437 |
if(pde==KPdeUnallocatedEntry) |
|
438 |
continue; |
|
439 |
TPhysAddr pdePhys = Mmu::PdePhysAddr(pde); |
|
440 |
TPte* pt = 0; |
|
441 |
if(pdePhys!=KPhysAddrInvalid) |
|
442 |
{ |
|
443 |
__KTRACE_OPT(KBOOT,Kern::Printf("Addr %08x -> Whole PDE Phys %08x", i<<KChunkShift, pdePhys)); |
|
444 |
} |
|
445 |
else |
|
446 |
{ |
|
447 |
pt = Mmu::PageTableFromPde(pde); |
|
448 |
__KTRACE_OPT(KBOOT,Kern::Printf("Addr %08x -> page table %08x", i<<KChunkShift, pt)); |
|
449 |
__ASSERT_ALWAYS(pt,Panic(EInvalidPdeAtBoot)); // bad PDE |
|
450 |
} |
|
451 |
||
452 |
TInt j; |
|
453 |
TInt np = 0; |
|
454 |
for(j=0; j<KChunkSize/KPageSize; ++j) |
|
455 |
{ |
|
456 |
TBool present = ETrue; // all pages present if whole PDE mapping |
|
457 |
TPte pte = 0; |
|
458 |
if(pt) |
|
459 |
{ |
|
460 |
pte = pt[j]; |
|
461 |
present = pte!=KPteUnallocatedEntry; |
|
462 |
} |
|
463 |
if(present) |
|
464 |
{ |
|
465 |
++np; |
|
466 |
TPhysAddr pa = pt ? Mmu::PtePhysAddr(pte,j) : (pdePhys + (j<<KPageShift)); |
|
467 |
SPageInfo* pi = SPageInfo::SafeFromPhysAddr(pa); |
|
468 |
__KTRACE_OPT(KBOOT,Kern::Printf("Addr: %08x PA=%08x", |
|
469 |
(i<<KChunkShift)+(j<<KPageShift), pa)); |
|
470 |
if(pi) // ignore non-RAM mappings |
|
471 |
{ |
|
472 |
TInt r = iRamPageAllocator->MarkPageAllocated(pa, EPageFixed); |
|
473 |
// allow KErrAlreadyExists since it's possible that a page is doubly mapped |
|
474 |
__ASSERT_ALWAYS(r==KErrNone || r==KErrAlreadyExists, Panic(EBadMappedPageAfterBoot)); |
|
475 |
if(pi->Type()==SPageInfo::EUnused) |
|
476 |
pi->SetFixed(); |
|
477 |
} |
|
478 |
} |
|
479 |
} |
|
480 |
__KTRACE_OPT(KBOOT,Kern::Printf("Addr: %08x #PTEs=%d",(i<<KChunkShift),np)); |
|
481 |
if(pt) |
|
482 |
{ |
|
483 |
SPageTableInfo* pti = SPageTableInfo::FromPtPtr(pt); |
|
484 |
pti->Boot(np); |
|
485 |
} |
|
486 |
} |
|
487 |
||
488 |
TInt r = K::MutexCreate(iRamAllocatorMutex, KLitRamAlloc, NULL, EFalse, KMutexOrdRamAlloc); |
|
489 |
if(r!=KErrNone) |
|
490 |
Panic(ERamAllocMutexCreateFailed); |
|
491 |
iRamAllocLockCount = 0; |
|
492 |
iRamAllocInitialFreePages = FreeRamInPages(); |
|
493 |
||
494 |
__KTRACE_OPT2(KBOOT,KMMU,Kern::Printf("Mmu::DoInit2")); |
|
495 |
||
496 |
for(i=0; i<KNumTempMappingSlots; ++i) |
|
497 |
iTempMap[i].Alloc(1); |
|
498 |
||
499 |
iPhysMemSyncTemp.Alloc(1); |
|
500 |
r = K::MutexCreate(iPhysMemSyncMutex, KLitPhysMemSync, NULL, EFalse, KMutexOrdSyncPhysMem); |
|
501 |
if(r!=KErrNone) |
|
502 |
Panic(EPhysMemSyncMutexCreateFailed); |
|
503 |
// VerifyRam(); |
|
504 |
} |
|
505 |
||
506 |
||
507 |
void Mmu::Init2FinalCommon() |
|
508 |
{ |
|
509 |
__KTRACE_OPT2(KBOOT,KMMU,Kern::Printf("Mmu::Init2FinalCommon")); |
|
510 |
// hack, reduce free memory to <2GB... |
|
511 |
while(FreeRamInPages()>=0x80000000/KPageSize) |
|
512 |
{ |
|
513 |
TPhysAddr dummyPage; |
|
514 |
TInt r = iRamPageAllocator->AllocRamPages(&dummyPage,1, EPageFixed); |
|
515 |
__NK_ASSERT_ALWAYS(r==KErrNone); |
|
516 |
} |
|
517 |
// hack, reduce total RAM to <2GB... |
|
518 |
if(TheSuperPage().iTotalRamSize<0) |
|
519 |
TheSuperPage().iTotalRamSize = 0x80000000-KPageSize; |
|
520 |
||
521 |
// Save current free RAM size - there can never be more free RAM than this |
|
522 |
TUint maxFreePages = FreeRamInPages(); |
|
523 |
K::MaxFreeRam = maxFreePages*KPageSize; |
|
524 |
if(maxFreePages < (TUint(PP::RamDriveMaxSize)>>KPageShift)) |
|
525 |
PP::RamDriveMaxSize = maxFreePages*KPageSize; |
|
526 |
||
527 |
// update this to stop assert triggering in RamAllocLock::Lock() |
|
528 |
iRamAllocInitialFreePages = maxFreePages; |
|
80
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parents:
39
diff
changeset
|
529 |
|
597aaf25e343
Revision: 201008
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
39
diff
changeset
|
530 |
// Get the allocator to signal to the variant which RAM zones are in use so far |
597aaf25e343
Revision: 201008
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
39
diff
changeset
|
531 |
iRamPageAllocator->InitialCallback(); |
0 | 532 |
} |
533 |
||
534 |
||
535 |
void Mmu::Init3() |
|
536 |
{ |
|
537 |
iDefrag = new Defrag; |
|
538 |
if (!iDefrag) |
|
539 |
Panic(EDefragAllocFailed); |
|
540 |
iDefrag->Init3(TheMmu.iRamPageAllocator); |
|
541 |
} |
|
542 |
||
543 |
// |
|
544 |
// Utils |
|
545 |
// |
|
546 |
||
547 |
void Mmu::Panic(TPanic aPanic) |
|
548 |
{ |
|
549 |
Kern::Fault("MMU",aPanic); |
|
550 |
} |
|
551 |
||
552 |
||
553 |
TUint Mmu::FreeRamInPages() |
|
554 |
{ |
|
555 |
return iRamPageAllocator->FreeRamInPages()+ThePager.NumberOfFreePages(); |
|
556 |
} |
|
557 |
||
558 |
||
559 |
TUint Mmu::TotalPhysicalRamPages() |
|
560 |
{ |
|
561 |
return iRamPageAllocator->TotalPhysicalRamPages(); |
|
562 |
} |
|
563 |
||
564 |
||
565 |
const SRamZone* Mmu::RamZoneConfig(TRamZoneCallback& aCallback) const |
|
566 |
{ |
|
567 |
aCallback = iRamZoneCallback; |
|
568 |
return iRamZones; |
|
569 |
} |
|
570 |
||
571 |
||
572 |
void Mmu::SetRamZoneConfig(const SRamZone* aZones, TRamZoneCallback aCallback) |
|
573 |
{ |
|
574 |
iRamZones = aZones; |
|
575 |
iRamZoneCallback = aCallback; |
|
576 |
} |
|
577 |
||
578 |
||
579 |
TInt Mmu::ModifyRamZoneFlags(TUint aId, TUint aClearMask, TUint aSetMask) |
|
580 |
{ |
|
581 |
return iRamPageAllocator->ModifyZoneFlags(aId, aClearMask, aSetMask); |
|
582 |
} |
|
583 |
||
584 |
||
585 |
TInt Mmu::GetRamZonePageCount(TUint aId, SRamZonePageCount& aPageData) |
|
586 |
{ |
|
587 |
return iRamPageAllocator->GetZonePageCount(aId, aPageData); |
|
588 |
} |
|
589 |
||
590 |
||
591 |
TInt Mmu::ZoneAllocPhysicalRam(TUint* aZoneIdList, TUint aZoneIdCount, TInt aBytes, TPhysAddr& aPhysAddr, TInt aAlign) |
|
592 |
{ |
|
593 |
__KTRACE_OPT(KMMU,Kern::Printf("Mmu::ZoneAllocPhysicalRam(?,%d,%d,?,%d)", aZoneIdCount, aBytes, aPhysAddr, aAlign)); |
|
594 |
__NK_ASSERT_DEBUG(RamAllocLock::IsHeld()); |
|
595 |
||
596 |
TInt r = iRamPageAllocator->ZoneAllocContiguousRam(aZoneIdList, aZoneIdCount, aBytes, aPhysAddr, EPageFixed, aAlign); |
|
597 |
if(r!=KErrNone) |
|
598 |
iRamAllocFailed = ETrue; |
|
599 |
else |
|
600 |
{ |
|
601 |
TUint pages = MM::RoundToPageCount(aBytes); |
|
602 |
AllocatedPhysicalRam(aPhysAddr, pages, (Mmu::TRamAllocFlags)EMemAttStronglyOrdered); |
|
603 |
} |
|
604 |
__KTRACE_OPT(KMMU,Kern::Printf("Mmu::ZoneAllocPhysicalRam returns %d and aPhysAddr=0x%08x",r,aPhysAddr)); |
|
605 |
return r; |
|
606 |
} |
|
607 |
||
608 |
||
609 |
TInt Mmu::ZoneAllocPhysicalRam(TUint* aZoneIdList, TUint aZoneIdCount, TInt aNumPages, TPhysAddr* aPageList) |
|
610 |
{ |
|
611 |
__KTRACE_OPT(KMMU,Kern::Printf("Mmu::ZoneAllocPhysicalRam(?,%d,%d,?)", aZoneIdCount, aNumPages)); |
|
612 |
__NK_ASSERT_DEBUG(RamAllocLock::IsHeld()); |
|
613 |
||
614 |
TInt r = iRamPageAllocator->ZoneAllocRamPages(aZoneIdList, aZoneIdCount, aPageList, aNumPages, EPageFixed); |
|
615 |
if(r!=KErrNone) |
|
616 |
iRamAllocFailed = ETrue; |
|
617 |
else |
|
618 |
{ |
|
619 |
PagesAllocated(aPageList, aNumPages, (Mmu::TRamAllocFlags)EMemAttStronglyOrdered); |
|
620 |
||
621 |
// update page infos... |
|
622 |
TUint flash = 0; |
|
623 |
TPhysAddr* pageEnd = aPageList + aNumPages; |
|
624 |
MmuLock::Lock(); |
|
625 |
TPhysAddr* page = aPageList; |
|
626 |
while (page < pageEnd) |
|
627 |
{ |
|
628 |
MmuLock::Flash(flash,KMaxPageInfoUpdatesInOneGo/2); |
|
629 |
TPhysAddr pagePhys = *page++; |
|
630 |
__NK_ASSERT_DEBUG(pagePhys != KPhysAddrInvalid); |
|
631 |
SPageInfo::FromPhysAddr(pagePhys)->SetPhysAlloc(); |
|
632 |
} |
|
633 |
MmuLock::Unlock(); |
|
634 |
} |
|
635 |
__KTRACE_OPT(KMMU,Kern::Printf("Mmu::ZoneAllocPhysicalRam returns %d",r)); |
|
636 |
return r; |
|
637 |
} |
|
638 |
||
639 |
||
640 |
TInt Mmu::RamHalFunction(TInt aFunction, TAny* a1, TAny* a2) |
|
641 |
{ |
|
642 |
// This function should only be registered with hal and therefore can only |
|
643 |
// be invoked after the ram allocator has been created. |
|
644 |
__NK_ASSERT_DEBUG(iRamPageAllocator); |
|
645 |
return iRamPageAllocator->HalFunction(aFunction, a1, a2); |
|
646 |
} |
|
647 |
||
648 |
||
649 |
void Mmu::ChangePageType(SPageInfo* aPageInfo, TZonePageType aOldPageType, TZonePageType aNewPageType) |
|
650 |
{ |
|
651 |
iRamPageAllocator->ChangePageType(aPageInfo, aOldPageType, aNewPageType); |
|
652 |
} |
|
653 |
||
654 |
TInt Mmu::HandlePageFault(TLinAddr aPc, TLinAddr aFaultAddress, TUint aAccessPermissions, TAny* aExceptionInfo) |
|
655 |
{ |
|
656 |
TRACE(("Mmu::HandlePageFault(0x%08x,0x%08x,%d)",aPc,aFaultAddress,aAccessPermissions)); |
|
657 |
||
658 |
DMemModelThread* thread = (DMemModelThread*)TheCurrentThread; |
|
659 |
// Get the os asid of the process taking the fault, no need to open a reference |
|
660 |
// as it is the current thread's process so can't be freed. |
|
661 |
TUint faultOsAsid = ((DMemModelProcess*)thread->iNThread.iAddressSpace)->OsAsid(); |
|
662 |
||
663 |
// check if any fast mutexes held... |
|
664 |
NFastMutex* fm = NKern::HeldFastMutex(); |
|
665 |
TPagingExcTrap* trap = thread->iPagingExcTrap; |
|
666 |
if(fm) |
|
667 |
{ |
|
668 |
// check there is an XTRAP_PAGING in effect... |
|
669 |
if(!trap) |
|
670 |
{ |
|
671 |
// oops, kill system... |
|
672 |
__KTRACE_OPT2(KPAGING,KPANIC,Kern::Printf("Fault with FM Held! addr=0x%08x (%O pc=%x)",aFaultAddress,thread,aPc)); |
|
673 |
Exc::Fault(aExceptionInfo); |
|
674 |
} |
|
675 |
||
676 |
// release the fast mutex... |
|
677 |
NKern::FMSignal(fm); |
|
678 |
} |
|
679 |
||
680 |
NKern::ThreadEnterCS(); |
|
681 |
||
682 |
// work out address space for aFaultAddress... |
|
683 |
TUint osAsid = faultOsAsid; |
|
684 |
TLinAddr addr = aFaultAddress; |
|
685 |
if(thread->iAliasLinAddr && TUint(addr - thread->iAliasLinAddr) < TUint(KPageSize)) |
|
686 |
{ |
|
687 |
// Address in aliased memory... |
|
688 |
addr = (addr - thread->iAliasLinAddr) + thread->iAliasTarget; |
|
689 |
// Get the os asid of the process thread is aliasing, no need to open |
|
690 |
// a reference on it as one was already opened when the alias was created. |
|
691 |
osAsid = thread->iAliasProcess->OsAsid(); |
|
692 |
} |
|
693 |
else if(addr>=KGlobalMemoryBase) |
|
694 |
{ |
|
695 |
// Address in global region, so look it up in kernel's address space... |
|
696 |
osAsid = KKernelOsAsid; |
|
697 |
} |
|
698 |
||
699 |
// NOTE, osAsid will remain valid for duration of this function because it is either |
|
700 |
// - The current thread's address space, which can't go away whilst the thread |
|
701 |
// is running. |
|
702 |
// - The address space of another thread which we are aliasing memory from, |
|
703 |
// and we would only do this if we have a reference on this other thread, |
|
704 |
// which has a reference on it's process, which should own the address space! |
|
705 |
||
706 |
#ifdef __BROADCAST_CACHE_MAINTENANCE__ |
|
36
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
31
diff
changeset
|
707 |
TInt aliasAsid = -1; |
0 | 708 |
if (thread->iAliasLinAddr) |
709 |
{ |
|
710 |
// If an alias is in effect, the the thread will be locked to the current CPU, |
|
711 |
// but we need to be able to migrate between CPUs for cache maintainance. This |
|
712 |
// must be dealt with by removing the alias and restoring it with a paging trap |
|
713 |
// handler. |
|
714 |
if(!trap) |
|
715 |
{ |
|
716 |
// oops, kill system... |
|
717 |
__KTRACE_OPT2(KPAGING,KPANIC,Kern::Printf("Fault with thread locked to current CPU! addr=0x%08x (%O pc=%x)",aFaultAddress,thread,aPc)); |
|
718 |
Exc::Fault(aExceptionInfo); |
|
719 |
} |
|
36
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
31
diff
changeset
|
720 |
// Open a reference on the aliased process's os asid before removing the alias |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
31
diff
changeset
|
721 |
// so that the address space can't be freed while we try to access its members. |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
31
diff
changeset
|
722 |
aliasAsid = thread->iAliasProcess->TryOpenOsAsid(); |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
31
diff
changeset
|
723 |
// This should never fail as until we remove the alias there will |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
31
diff
changeset
|
724 |
// always be at least one reference on the os asid. |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
31
diff
changeset
|
725 |
__NK_ASSERT_DEBUG(aliasAsid >= 0); |
0 | 726 |
thread->RemoveAlias(); |
727 |
} |
|
728 |
#endif |
|
729 |
||
730 |
// find mapping... |
|
731 |
TUint offsetInMapping; |
|
732 |
TUint mapInstanceCount; |
|
733 |
DMemoryMapping* mapping = MM::FindMappingInAddressSpace(osAsid, addr, 1, offsetInMapping, mapInstanceCount); |
|
734 |
// TRACE(("%O mapping=0x%08x",TheCurrentThread,mapping)); |
|
735 |
TInt r = KErrNotFound; |
|
736 |
||
737 |
if(mapping) |
|
738 |
{ |
|
739 |
MmuLock::Lock(); |
|
740 |
||
741 |
// check if we need to process page fault... |
|
742 |
if(!Mmu::CheckPteTypePermissions(mapping->PteType(),aAccessPermissions) || |
|
743 |
mapInstanceCount != mapping->MapInstanceCount()) |
|
744 |
{ |
|
745 |
// Invalid access to the page. |
|
746 |
MmuLock::Unlock(); |
|
747 |
r = KErrAbort; |
|
748 |
} |
|
749 |
else |
|
750 |
{ |
|
39
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
751 |
// Should not be able to take a fault on a pinned mapping if accessing it |
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
752 |
// with the correct permissions. |
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
753 |
__NK_ASSERT_DEBUG(!mapping->IsPinned()); |
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
754 |
|
0 | 755 |
// we do need to handle fault so is this a demand paging or page moving fault |
756 |
DMemoryObject* memory = mapping->Memory(); |
|
757 |
if(!memory) |
|
758 |
MmuLock::Unlock(); |
|
759 |
else |
|
760 |
{ |
|
761 |
TUint faultIndex = (offsetInMapping >> KPageShift) + mapping->iStartIndex; |
|
762 |
memory->Open(); |
|
763 |
||
764 |
// This is safe as we have the instance count so can detect the mapping |
|
765 |
// being reused and we have a reference to the memory object so it can't |
|
766 |
// be deleted. |
|
767 |
MmuLock::Unlock(); |
|
768 |
||
769 |
if(memory->IsDemandPaged()) |
|
770 |
{ |
|
771 |
// Let the pager handle the fault... |
|
772 |
r = ThePager.HandlePageFault( aPc, aFaultAddress, faultOsAsid, faultIndex, |
|
773 |
aAccessPermissions, memory, mapping, mapInstanceCount, |
|
774 |
thread, aExceptionInfo); |
|
775 |
} |
|
776 |
else |
|
777 |
{// The page could be being moved so verify that with its manager. |
|
778 |
DMemoryManager* manager = memory->iManager; |
|
779 |
r = manager->HandleFault(memory, faultIndex, mapping, mapInstanceCount, aAccessPermissions); |
|
780 |
} |
|
781 |
if (r == KErrNone) |
|
782 |
{// alias PDE needs updating because page tables have changed... |
|
783 |
thread->RefreshAlias(); |
|
784 |
} |
|
785 |
memory->Close(); |
|
786 |
} |
|
787 |
} |
|
788 |
mapping->Close(); |
|
789 |
} |
|
790 |
||
791 |
if (trap) |
|
792 |
{ |
|
793 |
// restore address space (because the trap will bypass any code |
|
794 |
// which would have done this.)... |
|
795 |
DMemModelThread::RestoreAddressSpace(); |
|
796 |
} |
|
797 |
||
36
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
31
diff
changeset
|
798 |
#ifdef __BROADCAST_CACHE_MAINTENANCE__ |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
31
diff
changeset
|
799 |
// Close any reference on the aliased process's os asid before we leave the |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
31
diff
changeset
|
800 |
// critical section. |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
31
diff
changeset
|
801 |
if (aliasAsid >= 0) |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
31
diff
changeset
|
802 |
{ |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
31
diff
changeset
|
803 |
thread->iAliasProcess->CloseOsAsid(); |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
31
diff
changeset
|
804 |
} |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
31
diff
changeset
|
805 |
#endif |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
31
diff
changeset
|
806 |
|
0 | 807 |
NKern::ThreadLeaveCS(); // thread will die now if CheckRealtimeThreadFault caused a panic |
808 |
||
809 |
// deal with XTRAP_PAGING... |
|
810 |
if(trap) |
|
811 |
{ |
|
812 |
// re-acquire any fast mutex which was held before the page fault... |
|
813 |
if(fm) |
|
814 |
NKern::FMWait(fm); |
|
815 |
if (r == KErrNone) |
|
816 |
{ |
|
817 |
trap->Exception(1); // return from exception trap with result '1' (value>0) |
|
818 |
// code doesn't continue beyond this point. |
|
819 |
__NK_ASSERT_DEBUG(0); |
|
820 |
} |
|
821 |
} |
|
822 |
||
823 |
return r; |
|
824 |
} |
|
825 |
||
826 |
||
827 |
// |
|
828 |
// Memory allocation |
|
829 |
// |
|
830 |
||
831 |
TInt Mmu::AllocRam( TPhysAddr* aPages, TUint aCount, TRamAllocFlags aFlags, TZonePageType aZonePageType, |
|
832 |
TUint aBlockZoneId, TBool aBlockRest) |
|
833 |
{ |
|
834 |
__KTRACE_OPT(KMMU,Kern::Printf("Mmu::AllocRam(?,%d,%x)",aCount,aFlags)); |
|
835 |
__NK_ASSERT_DEBUG(RamAllocLock::IsHeld()); |
|
836 |
#ifdef _DEBUG |
|
837 |
if(K::CheckForSimulatedAllocFail()) |
|
838 |
{ |
|
839 |
__KTRACE_OPT(KMMU,Kern::Printf("Mmu::AllocRam returns simulated OOM %d",KErrNoMemory)); |
|
840 |
return KErrNoMemory; |
|
841 |
} |
|
842 |
#endif |
|
843 |
TInt missing = iRamPageAllocator->AllocRamPages(aPages, aCount, aZonePageType, aBlockZoneId, aBlockRest); |
|
844 |
if(missing && !(aFlags&EAllocNoPagerReclaim) && ThePager.GetFreePages(missing)) |
|
845 |
missing = iRamPageAllocator->AllocRamPages(aPages, aCount, aZonePageType, aBlockZoneId, aBlockRest); |
|
846 |
TInt r = missing ? KErrNoMemory : KErrNone; |
|
847 |
if(r!=KErrNone) |
|
848 |
iRamAllocFailed = ETrue; |
|
849 |
else |
|
850 |
PagesAllocated(aPages,aCount,aFlags); |
|
851 |
__KTRACE_OPT(KMMU,Kern::Printf("Mmu::AllocRam returns %d",r)); |
|
852 |
return r; |
|
853 |
} |
|
854 |
||
855 |
||
856 |
void Mmu::FreeRam(TPhysAddr* aPages, TUint aCount, TZonePageType aZonePageType) |
|
857 |
{ |
|
858 |
__KTRACE_OPT(KMMU,Kern::Printf("Mmu::FreeRam(?,%d)",aCount)); |
|
859 |
__NK_ASSERT_DEBUG(RamAllocLock::IsHeld()); |
|
860 |
||
861 |
// update page infos... |
|
862 |
TPhysAddr* pages = aPages; |
|
863 |
TPhysAddr* pagesEnd = pages+aCount; |
|
864 |
TPhysAddr* pagesOut = aPages; |
|
865 |
MmuLock::Lock(); |
|
866 |
TUint flash = 0; |
|
867 |
while(pages<pagesEnd) |
|
868 |
{ |
|
869 |
MmuLock::Flash(flash,KMaxPageInfoUpdatesInOneGo/2); |
|
870 |
TPhysAddr pagePhys = *pages++; |
|
871 |
__NK_ASSERT_DEBUG(pagePhys!=KPhysAddrInvalid); |
|
872 |
SPageInfo* pi = SPageInfo::FromPhysAddr(pagePhys); |
|
873 |
PageFreed(pi); |
|
874 |
||
875 |
// If this is an old page of a page being moved that was previously pinned |
|
876 |
// then make sure it is freed as discardable otherwise despite DPager::DonatePages() |
|
877 |
// having marked it as discardable it would be freed as movable. |
|
878 |
__NK_ASSERT_DEBUG(pi->PagedState() != SPageInfo::EPagedPinnedMoved || aCount == 1); |
|
879 |
if (pi->PagedState() == SPageInfo::EPagedPinnedMoved) |
|
880 |
aZonePageType = EPageDiscard; |
|
881 |
||
882 |
if(ThePager.PageFreed(pi)==KErrNone) |
|
883 |
--aCount; // pager has dealt with this page, so one less for us |
|
884 |
else |
|
885 |
{ |
|
886 |
// All paged pages should have been dealt with by the pager above. |
|
887 |
__NK_ASSERT_DEBUG(pi->PagedState() == SPageInfo::EUnpaged); |
|
888 |
*pagesOut++ = pagePhys; // store page address for freeing later |
|
889 |
} |
|
890 |
} |
|
891 |
MmuLock::Unlock(); |
|
892 |
||
893 |
iRamPageAllocator->FreeRamPages(aPages, aCount, aZonePageType); |
|
894 |
} |
|
895 |
||
896 |
||
897 |
TInt Mmu::AllocContiguousRam(TPhysAddr& aPhysAddr, TUint aCount, TUint aAlign, TRamAllocFlags aFlags) |
|
898 |
{ |
|
899 |
__KTRACE_OPT(KMMU,Kern::Printf("Mmu::AllocContiguousRam(?,0x%x,%d,%x)",aCount,aAlign,aFlags)); |
|
900 |
__NK_ASSERT_DEBUG(RamAllocLock::IsHeld()); |
|
901 |
#ifdef _DEBUG |
|
902 |
if(K::CheckForSimulatedAllocFail()) |
|
903 |
{ |
|
904 |
__KTRACE_OPT(KMMU,Kern::Printf("Mmu::AllocContiguousRam returns simulated OOM %d",KErrNoMemory)); |
|
905 |
return KErrNoMemory; |
|
906 |
} |
|
907 |
// Only the page sets EAllocNoPagerReclaim and it shouldn't allocate contiguous ram. |
|
908 |
__NK_ASSERT_DEBUG(!(aFlags&EAllocNoPagerReclaim)); |
|
909 |
#endif |
|
910 |
TInt r = iRamPageAllocator->AllocContiguousRam(aCount, aPhysAddr, EPageFixed, aAlign+KPageShift); |
|
911 |
if(r==KErrNoMemory && aCount > KMaxFreeableContiguousPages) |
|
912 |
{ |
|
913 |
// flush paging cache and retry... |
|
914 |
ThePager.FlushAll(); |
|
915 |
r = iRamPageAllocator->AllocContiguousRam(aCount, aPhysAddr, EPageFixed, aAlign+KPageShift); |
|
916 |
} |
|
917 |
if(r!=KErrNone) |
|
918 |
iRamAllocFailed = ETrue; |
|
919 |
else |
|
920 |
PagesAllocated((TPhysAddr*)(aPhysAddr|1), aCount, aFlags); |
|
921 |
__KTRACE_OPT(KMMU,Kern::Printf("AllocContiguouseRam returns %d and aPhysAddr=0x%08x",r,aPhysAddr)); |
|
922 |
return r; |
|
923 |
} |
|
924 |
||
925 |
||
926 |
void Mmu::FreeContiguousRam(TPhysAddr aPhysAddr, TUint aCount) |
|
927 |
{ |
|
928 |
__KTRACE_OPT(KMMU,Kern::Printf("Mmu::FreeContiguousRam(0x%08x,0x%x)",aPhysAddr,aCount)); |
|
929 |
__NK_ASSERT_DEBUG(RamAllocLock::IsHeld()); |
|
930 |
__NK_ASSERT_DEBUG((aPhysAddr&KPageMask)==0); |
|
931 |
||
932 |
TUint pageCount = aCount; |
|
933 |
||
934 |
// update page infos... |
|
935 |
SPageInfo* pi = SPageInfo::FromPhysAddr(aPhysAddr); |
|
936 |
SPageInfo* piEnd = pi+pageCount; |
|
937 |
TUint flash = 0; |
|
938 |
MmuLock::Lock(); |
|
939 |
while(pi<piEnd) |
|
940 |
{ |
|
941 |
MmuLock::Flash(flash,KMaxPageInfoUpdatesInOneGo); |
|
942 |
PageFreed(pi++); |
|
943 |
} |
|
944 |
MmuLock::Unlock(); |
|
945 |
||
946 |
// free pages... |
|
947 |
while(pageCount) |
|
948 |
{ |
|
949 |
iRamPageAllocator->FreeRamPage(aPhysAddr, EPageFixed); |
|
950 |
aPhysAddr += KPageSize; |
|
951 |
--pageCount; |
|
952 |
} |
|
953 |
} |
|
954 |
||
955 |
||
956 |
TInt Mmu::AllocPhysicalRam(TPhysAddr* aPages, TUint aCount, TRamAllocFlags aFlags) |
|
957 |
{ |
|
958 |
__KTRACE_OPT(KMMU,Kern::Printf("Mmu::AllocPhysicalRam(?,%d,%x)",aCount,aFlags)); |
|
959 |
__NK_ASSERT_DEBUG(RamAllocLock::IsHeld()); |
|
960 |
// Allocate fixed pages as physically allocated pages aren't movable or discardable. |
|
961 |
TInt r = AllocRam(aPages, aCount, aFlags, EPageFixed); |
|
962 |
if (r!=KErrNone) |
|
963 |
return r; |
|
964 |
||
965 |
// update page infos... |
|
966 |
TPhysAddr* pages = aPages; |
|
967 |
TPhysAddr* pagesEnd = pages+aCount; |
|
968 |
MmuLock::Lock(); |
|
969 |
TUint flash = 0; |
|
970 |
while(pages<pagesEnd) |
|
971 |
{ |
|
972 |
MmuLock::Flash(flash,KMaxPageInfoUpdatesInOneGo/2); |
|
973 |
TPhysAddr pagePhys = *pages++; |
|
974 |
__NK_ASSERT_DEBUG(pagePhys!=KPhysAddrInvalid); |
|
975 |
SPageInfo* pi = SPageInfo::FromPhysAddr(pagePhys); |
|
976 |
pi->SetPhysAlloc(); |
|
977 |
} |
|
978 |
MmuLock::Unlock(); |
|
979 |
||
980 |
return KErrNone; |
|
981 |
} |
|
982 |
||
983 |
||
984 |
void Mmu::FreePhysicalRam(TPhysAddr* aPages, TUint aCount) |
|
985 |
{ |
|
986 |
__KTRACE_OPT(KMMU,Kern::Printf("Mmu::FreePhysicalRam(?,%d)",aCount)); |
|
987 |
__NK_ASSERT_DEBUG(RamAllocLock::IsHeld()); |
|
988 |
||
989 |
// update page infos... |
|
990 |
TPhysAddr* pages = aPages; |
|
991 |
TPhysAddr* pagesEnd = pages+aCount; |
|
992 |
MmuLock::Lock(); |
|
993 |
TUint flash = 0; |
|
994 |
while(pages<pagesEnd) |
|
995 |
{ |
|
996 |
MmuLock::Flash(flash,KMaxPageInfoUpdatesInOneGo/2); |
|
997 |
TPhysAddr pagePhys = *pages++; |
|
998 |
__NK_ASSERT_DEBUG(pagePhys!=KPhysAddrInvalid); |
|
999 |
SPageInfo* pi = SPageInfo::FromPhysAddr(pagePhys); |
|
1000 |
__ASSERT_ALWAYS(pi->Type()==SPageInfo::EPhysAlloc, Panic(EBadFreePhysicalRam)); |
|
1001 |
__ASSERT_ALWAYS(!pi->UseCount(), Panic(EBadFreePhysicalRam)); |
|
1002 |
pi->SetUnused(); |
|
1003 |
} |
|
1004 |
MmuLock::Unlock(); |
|
1005 |
||
1006 |
iRamPageAllocator->FreeRamPages(aPages,aCount, EPageFixed); |
|
1007 |
} |
|
1008 |
||
1009 |
||
1010 |
TInt Mmu::AllocPhysicalRam(TPhysAddr& aPhysAddr, TUint aCount, TUint aAlign, TRamAllocFlags aFlags) |
|
1011 |
{ |
|
1012 |
__KTRACE_OPT(KMMU,Kern::Printf("Mmu::AllocPhysicalRam(?,0x%x,d,%x)",aCount,aAlign,aFlags)); |
|
1013 |
TInt r = AllocContiguousRam(aPhysAddr,aCount,aAlign,aFlags); |
|
1014 |
if (r!=KErrNone) |
|
1015 |
return r; |
|
1016 |
||
1017 |
// update page infos... |
|
1018 |
SPageInfo* pi = SPageInfo::FromPhysAddr(aPhysAddr); |
|
1019 |
SPageInfo* piEnd = pi+aCount; |
|
1020 |
TUint flash = 0; |
|
1021 |
MmuLock::Lock(); |
|
1022 |
while(pi<piEnd) |
|
1023 |
{ |
|
1024 |
MmuLock::Flash(flash,KMaxPageInfoUpdatesInOneGo); |
|
1025 |
pi->SetPhysAlloc(); |
|
1026 |
++pi; |
|
1027 |
} |
|
1028 |
MmuLock::Unlock(); |
|
1029 |
||
1030 |
return KErrNone; |
|
1031 |
} |
|
1032 |
||
1033 |
||
1034 |
void Mmu::FreePhysicalRam(TPhysAddr aPhysAddr, TUint aCount) |
|
1035 |
{ |
|
1036 |
__KTRACE_OPT(KMMU,Kern::Printf("Mmu::FreePhysicalRam(0x%08x,0x%x)",aPhysAddr,aCount)); |
|
1037 |
||
1038 |
// update page infos... |
|
1039 |
SPageInfo* pi = SPageInfo::FromPhysAddr(aPhysAddr); |
|
1040 |
SPageInfo* piEnd = pi+aCount; |
|
1041 |
TUint flash = 0; |
|
1042 |
MmuLock::Lock(); |
|
1043 |
while(pi<piEnd) |
|
1044 |
{ |
|
1045 |
MmuLock::Flash(flash,KMaxPageInfoUpdatesInOneGo); |
|
1046 |
__ASSERT_ALWAYS(pi->Type()==SPageInfo::EPhysAlloc, Panic(EBadFreePhysicalRam)); |
|
1047 |
__ASSERT_ALWAYS(!pi->UseCount(), Panic(EBadFreePhysicalRam)); |
|
1048 |
pi->SetUnused(); |
|
1049 |
++pi; |
|
1050 |
} |
|
1051 |
MmuLock::Unlock(); |
|
1052 |
||
1053 |
iRamPageAllocator->FreePhysicalRam(aPhysAddr, aCount << KPageShift); |
|
1054 |
} |
|
1055 |
||
1056 |
||
1057 |
TInt Mmu::ClaimPhysicalRam(TPhysAddr aPhysAddr, TUint aCount, TRamAllocFlags aFlags) |
|
1058 |
{ |
|
1059 |
__KTRACE_OPT(KMMU,Kern::Printf("Mmu::ClaimPhysicalRam(0x%08x,0x%x,0x%08x)",aPhysAddr,aCount,aFlags)); |
|
1060 |
aPhysAddr &= ~KPageMask; |
|
31
56f325a607ea
Revision: 200951
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1061 |
TInt r = iRamPageAllocator->ClaimPhysicalRam(aPhysAddr,(aCount << KPageShift)); |
0 | 1062 |
if(r!=KErrNone) |
1063 |
return r; |
|
1064 |
||
1065 |
PagesAllocated((TPhysAddr*)(aPhysAddr|1), aCount, aFlags); |
|
1066 |
||
1067 |
// update page infos... |
|
1068 |
SPageInfo* pi = SPageInfo::FromPhysAddr(aPhysAddr); |
|
1069 |
SPageInfo* piEnd = pi+aCount; |
|
1070 |
TUint flash = 0; |
|
1071 |
MmuLock::Lock(); |
|
1072 |
while(pi<piEnd) |
|
1073 |
{ |
|
1074 |
MmuLock::Flash(flash,KMaxPageInfoUpdatesInOneGo); |
|
1075 |
pi->SetPhysAlloc(); |
|
1076 |
++pi; |
|
1077 |
} |
|
1078 |
MmuLock::Unlock(); |
|
1079 |
||
1080 |
return KErrNone; |
|
1081 |
} |
|
1082 |
||
1083 |
||
1084 |
void Mmu::AllocatedPhysicalRam(TPhysAddr aPhysAddr, TUint aCount, TRamAllocFlags aFlags) |
|
1085 |
{ |
|
1086 |
__KTRACE_OPT(KMMU,Kern::Printf("Mmu::AllocatedPhysicalRam(0x%08x,0x%x,d,%x)",aPhysAddr,aCount,aFlags)); |
|
1087 |
||
1088 |
PagesAllocated((TPhysAddr*)(aPhysAddr|1), aCount, aFlags); |
|
1089 |
||
1090 |
// update page infos... |
|
1091 |
SPageInfo* pi = SPageInfo::FromPhysAddr(aPhysAddr); |
|
1092 |
SPageInfo* piEnd = pi+aCount; |
|
1093 |
TUint flash = 0; |
|
1094 |
MmuLock::Lock(); |
|
1095 |
while(pi<piEnd) |
|
1096 |
{ |
|
1097 |
MmuLock::Flash(flash,KMaxPageInfoUpdatesInOneGo); |
|
1098 |
pi->SetPhysAlloc(); |
|
1099 |
++pi; |
|
1100 |
} |
|
1101 |
MmuLock::Unlock(); |
|
1102 |
} |
|
1103 |
||
1104 |
||
1105 |
// |
|
1106 |
// Misc |
|
1107 |
// |
|
1108 |
||
1109 |
#ifdef _DEBUG |
|
1110 |
/** |
|
1111 |
Perform a page table walk to return the physical address of |
|
1112 |
the memory mapped at virtual address \a aLinAddr in the |
|
1113 |
address space \a aOsAsid. |
|
1114 |
||
1115 |
If the page table used was not one allocated by the kernel |
|
1116 |
then the results are unpredictable and may cause a system fault. |
|
1117 |
||
1118 |
@pre #MmuLock held. |
|
1119 |
*/ |
|
1120 |
TPhysAddr Mmu::LinearToPhysical(TLinAddr aLinAddr, TInt aOsAsid) |
|
1121 |
{ |
|
1122 |
__NK_ASSERT_DEBUG(MmuLock::IsHeld() || K::Initialising); |
|
1123 |
return UncheckedLinearToPhysical(aLinAddr,aOsAsid); |
|
1124 |
} |
|
1125 |
#endif |
|
1126 |
||
1127 |
||
1128 |
/** |
|
1129 |
Next virtual address available for allocation by TTempMapping. |
|
1130 |
This is initialised to #KTempAddr and addresses may be allocated |
|
1131 |
until they reach #KTempAddrEnd. |
|
1132 |
*/ |
|
1133 |
TLinAddr Mmu::TTempMapping::iNextLinAddr = KTempAddr; |
|
1134 |
||
1135 |
||
1136 |
/** |
|
1137 |
Allocate virtual address space required to map a given number of memory pages. |
|
1138 |
||
1139 |
The actual size of allocated virtual allocated needs to accommodate \a aNumPages |
|
1140 |
number of pages of any colour. For example: if \a aNumPages == 4 and #KPageColourCount == 4, |
|
1141 |
then at least 7 pages are required. |
|
1142 |
||
1143 |
@param aNumPages Maximum number of pages that can be mapped into this temporary mapping. |
|
1144 |
||
1145 |
@pre Called in single threaded content (boot) only. |
|
1146 |
||
1147 |
@pre #iNextLinAddr points to virtual page with zero colour. |
|
1148 |
@post #iNextLinAddr points to virtual page with zero colour. |
|
1149 |
*/ |
|
1150 |
void Mmu::TTempMapping::Alloc(TUint aNumPages) |
|
1151 |
{ |
|
1152 |
__NK_ASSERT_DEBUG(aNumPages<=(KTempAddrEnd-KTempAddr)/KPageSize); |
|
1153 |
||
1154 |
// This runs during the boot only (single threaded context) so the access to iNextLinAddr is not guarded by any mutex. |
|
1155 |
TLinAddr tempAddr = iNextLinAddr; |
|
1156 |
TUint numPages = (KPageColourMask+aNumPages+KPageColourMask)&~KPageColourMask; |
|
1157 |
iNextLinAddr = tempAddr+numPages*KPageSize; |
|
1158 |
||
1159 |
__NK_ASSERT_ALWAYS(iNextLinAddr<=KTempAddrEnd); |
|
1160 |
||
1161 |
__NK_ASSERT_DEBUG(iSize==0); |
|
1162 |
iLinAddr = tempAddr; |
|
1163 |
MmuLock::Lock(); |
|
1164 |
iPtePtr = Mmu::PtePtrFromLinAddr(tempAddr,KKernelOsAsid); |
|
1165 |
__NK_ASSERT_DEBUG(iPtePtr); |
|
1166 |
MmuLock::Unlock(); |
|
1167 |
iBlankPte = TheMmu.iTempPteCached; |
|
1168 |
iSize = aNumPages; |
|
1169 |
iCount = 0; |
|
1170 |
||
1171 |
TRACEB(("Mmu::TTempMapping::Alloc(%d) iLinAddr=0x%08x, iPtePtr=0x%08x",aNumPages,iLinAddr,iPtePtr)); |
|
1172 |
} |
|
1173 |
||
1174 |
||
1175 |
/** |
|
1176 |
Map a single physical page into this temporary mapping. |
|
1177 |
||
1178 |
Supervisor read/write access and EMemoryAttributeStandard memory attributes apply. |
|
1179 |
||
1180 |
@param aPage The physical page to map. |
|
1181 |
@param aColour The required colour for the mapping. |
|
1182 |
||
1183 |
@return The linear address at which the page is mapped. |
|
1184 |
*/ |
|
1185 |
TLinAddr Mmu::TTempMapping::Map(TPhysAddr aPage, TUint aColour) |
|
1186 |
{ |
|
1187 |
__NK_ASSERT_DEBUG(iSize>=1); |
|
1188 |
__NK_ASSERT_DEBUG(iCount==0); |
|
1189 |
||
1190 |
TUint colour = aColour&KPageColourMask; |
|
1191 |
TLinAddr addr = iLinAddr+(colour<<KPageShift); |
|
1192 |
TPte* pPte = iPtePtr+colour; |
|
1193 |
iColour = colour; |
|
1194 |
||
1195 |
__ASSERT_DEBUG(*pPte==KPteUnallocatedEntry,MM::Panic(MM::ETempMappingAlreadyInUse)); |
|
1196 |
*pPte = (aPage&~KPageMask) | iBlankPte; |
|
1197 |
CacheMaintenance::SinglePteUpdated((TLinAddr)pPte); |
|
1198 |
InvalidateTLBForPage(addr|KKernelOsAsid); |
|
1199 |
||
1200 |
iCount = 1; |
|
1201 |
return addr; |
|
1202 |
} |
|
1203 |
||
1204 |
/** |
|
1205 |
Map a single physical page into this temporary mapping using the given page table entry (PTE) value. |
|
1206 |
||
1207 |
@param aPage The physical page to map. |
|
1208 |
@param aColour The required colour for the mapping. |
|
1209 |
@param aBlankPte The PTE value to use for mapping the page, |
|
1210 |
with the physical address component equal to zero. |
|
1211 |
||
1212 |
@return The linear address at which the page is mapped. |
|
1213 |
*/ |
|
1214 |
TLinAddr Mmu::TTempMapping::Map(TPhysAddr aPage, TUint aColour, TPte aBlankPte) |
|
1215 |
{ |
|
1216 |
__NK_ASSERT_DEBUG(iSize>=1); |
|
1217 |
__NK_ASSERT_DEBUG(iCount==0); |
|
1218 |
||
1219 |
TUint colour = aColour&KPageColourMask; |
|
1220 |
TLinAddr addr = iLinAddr+(colour<<KPageShift); |
|
1221 |
TPte* pPte = iPtePtr+colour; |
|
1222 |
iColour = colour; |
|
1223 |
||
1224 |
__ASSERT_DEBUG(*pPte==KPteUnallocatedEntry,MM::Panic(MM::ETempMappingAlreadyInUse)); |
|
1225 |
*pPte = (aPage&~KPageMask) | aBlankPte; |
|
1226 |
CacheMaintenance::SinglePteUpdated((TLinAddr)pPte); |
|
1227 |
InvalidateTLBForPage(addr|KKernelOsAsid); |
|
1228 |
||
1229 |
iCount = 1; |
|
1230 |
return addr; |
|
1231 |
} |
|
1232 |
||
1233 |
||
1234 |
/** |
|
1235 |
Map a number of physical pages into this temporary mapping. |
|
1236 |
||
1237 |
Supervisor read/write access and EMemoryAttributeStandard memory attributes apply. |
|
1238 |
||
1239 |
@param aPages The array of physical pages to map. |
|
1240 |
@param aCount The number of pages to map. |
|
1241 |
@param aColour The required colour for the first page. |
|
1242 |
Consecutive pages will be coloured accordingly. |
|
1243 |
||
1244 |
@return The linear address at which the first page is mapped. |
|
1245 |
*/ |
|
1246 |
TLinAddr Mmu::TTempMapping::Map(TPhysAddr* aPages, TUint aCount, TUint aColour) |
|
1247 |
{ |
|
1248 |
__NK_ASSERT_DEBUG(iSize>=aCount); |
|
1249 |
__NK_ASSERT_DEBUG(iCount==0); |
|
1250 |
||
1251 |
TUint colour = aColour&KPageColourMask; |
|
1252 |
TLinAddr addr = iLinAddr+(colour<<KPageShift); |
|
1253 |
TPte* pPte = iPtePtr+colour; |
|
1254 |
iColour = colour; |
|
1255 |
||
1256 |
for(TUint i=0; i<aCount; ++i) |
|
1257 |
{ |
|
1258 |
__ASSERT_DEBUG(pPte[i]==KPteUnallocatedEntry,MM::Panic(MM::ETempMappingAlreadyInUse)); |
|
1259 |
pPte[i] = (aPages[i]&~KPageMask) | iBlankPte; |
|
1260 |
CacheMaintenance::SinglePteUpdated((TLinAddr)&pPte[i]); |
|
1261 |
InvalidateTLBForPage((addr+i*KPageSize)|KKernelOsAsid); |
|
1262 |
} |
|
1263 |
||
1264 |
iCount = aCount; |
|
1265 |
return addr; |
|
1266 |
} |
|
1267 |
||
1268 |
||
1269 |
/** |
|
1270 |
Unmap all pages from this temporary mapping. |
|
1271 |
||
1272 |
@param aIMBRequired True if IMB barrier is required prior unmapping. |
|
1273 |
*/ |
|
1274 |
void Mmu::TTempMapping::Unmap(TBool aIMBRequired) |
|
1275 |
{ |
|
1276 |
__NK_ASSERT_DEBUG(iSize>=1); |
|
1277 |
if(aIMBRequired) |
|
1278 |
CacheMaintenance::CodeChanged(iLinAddr+iColour*KPageSize,iCount*KPageSize); |
|
1279 |
Unmap(); |
|
1280 |
} |
|
1281 |
||
1282 |
||
1283 |
/** |
|
1284 |
Unmap all pages from this temporary mapping. |
|
1285 |
*/ |
|
1286 |
void Mmu::TTempMapping::Unmap() |
|
1287 |
{ |
|
1288 |
__NK_ASSERT_DEBUG(iSize>=1); |
|
1289 |
||
1290 |
TUint colour = iColour; |
|
1291 |
TLinAddr addr = iLinAddr+(colour<<KPageShift); |
|
1292 |
TPte* pPte = iPtePtr+colour; |
|
1293 |
TUint count = iCount; |
|
1294 |
||
1295 |
while(count) |
|
1296 |
{ |
|
1297 |
*pPte = KPteUnallocatedEntry; |
|
1298 |
CacheMaintenance::SinglePteUpdated((TLinAddr)pPte); |
|
1299 |
InvalidateTLBForPage(addr|KKernelOsAsid); |
|
1300 |
addr += KPageSize; |
|
1301 |
++pPte; |
|
1302 |
--count; |
|
1303 |
} |
|
1304 |
||
1305 |
iCount = 0; |
|
1306 |
} |
|
1307 |
||
36
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
31
diff
changeset
|
1308 |
#ifdef __SMP__ |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
31
diff
changeset
|
1309 |
/** |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
31
diff
changeset
|
1310 |
Dummy IPI to be invoked when a thread's alias pde members are updated remotely |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
31
diff
changeset
|
1311 |
by another thread. |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
31
diff
changeset
|
1312 |
|
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
31
diff
changeset
|
1313 |
@internalComponent |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
31
diff
changeset
|
1314 |
*/ |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
31
diff
changeset
|
1315 |
class TAliasIPI : public TGenericIPI |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
31
diff
changeset
|
1316 |
{ |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
31
diff
changeset
|
1317 |
public: |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
31
diff
changeset
|
1318 |
static void RefreshIsr(TGenericIPI*); |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
31
diff
changeset
|
1319 |
void RefreshAlias(); |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
31
diff
changeset
|
1320 |
}; |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
31
diff
changeset
|
1321 |
|
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
31
diff
changeset
|
1322 |
|
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
31
diff
changeset
|
1323 |
/** |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
31
diff
changeset
|
1324 |
Dummy isr method. |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
31
diff
changeset
|
1325 |
*/ |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
31
diff
changeset
|
1326 |
void TAliasIPI::RefreshIsr(TGenericIPI*) |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
31
diff
changeset
|
1327 |
{ |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
31
diff
changeset
|
1328 |
TRACE2(("TAliasIPI")); |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
31
diff
changeset
|
1329 |
} |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
31
diff
changeset
|
1330 |
|
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
31
diff
changeset
|
1331 |
|
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
31
diff
changeset
|
1332 |
/** |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
31
diff
changeset
|
1333 |
Queue the dummy IPI on all other processors. This ensures that DoProcessSwitch will |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
31
diff
changeset
|
1334 |
have completed updating iAliasPdePtr once this method returns. |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
31
diff
changeset
|
1335 |
*/ |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
31
diff
changeset
|
1336 |
void TAliasIPI::RefreshAlias() |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
31
diff
changeset
|
1337 |
{ |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
31
diff
changeset
|
1338 |
NKern::Lock(); |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
31
diff
changeset
|
1339 |
QueueAllOther(&RefreshIsr); |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
31
diff
changeset
|
1340 |
NKern::Unlock(); |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
31
diff
changeset
|
1341 |
WaitCompletion(); |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
31
diff
changeset
|
1342 |
} |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
31
diff
changeset
|
1343 |
|
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
31
diff
changeset
|
1344 |
|
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
31
diff
changeset
|
1345 |
/** |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
31
diff
changeset
|
1346 |
Perform a dummy ipi on all the other processors to ensure if any of them are |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
31
diff
changeset
|
1347 |
executing DoProcessSwitch they will see the new value of iAliasPde before they |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
31
diff
changeset
|
1348 |
update iAliasPdePtr or will finish updating iAliasPdePtr before we continue. |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
31
diff
changeset
|
1349 |
This works as DoProcessSwitch() has interrupts disabled while reading iAliasPde |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
31
diff
changeset
|
1350 |
and updating iAliasPdePtr. |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
31
diff
changeset
|
1351 |
*/ |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
31
diff
changeset
|
1352 |
void BroadcastAliasRefresh() |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
31
diff
changeset
|
1353 |
{ |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
31
diff
changeset
|
1354 |
TAliasIPI ipi; |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
31
diff
changeset
|
1355 |
ipi.RefreshAlias(); |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
31
diff
changeset
|
1356 |
} |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
31
diff
changeset
|
1357 |
#endif //__SMP__ |
0 | 1358 |
|
1359 |
/** |
|
1360 |
Remove any thread IPC aliases which use the specified page table. |
|
1361 |
This is used by the page table allocator when a page table is freed. |
|
1362 |
||
1363 |
@pre #PageTablesLockIsHeld |
|
1364 |
*/ |
|
1365 |
void Mmu::RemoveAliasesForPageTable(TPhysAddr aPageTable) |
|
1366 |
{ |
|
1367 |
__NK_ASSERT_DEBUG(PageTablesLockIsHeld()); |
|
1368 |
||
1369 |
MmuLock::Lock(); |
|
1370 |
||
1371 |
SDblQue checkedList; |
|
1372 |
||
1373 |
TUint ptId = aPageTable>>KPageTableShift; |
|
1374 |
while(!iAliasList.IsEmpty()) |
|
1375 |
{ |
|
1376 |
SDblQueLink* next = iAliasList.First()->Deque(); |
|
1377 |
checkedList.Add(next); |
|
1378 |
DMemModelThread* thread = (DMemModelThread*)((TInt)next-_FOFF(DMemModelThread,iAliasLink)); |
|
1379 |
if((thread->iAliasPde>>KPageTableShift)==ptId) |
|
1380 |
{ |
|
1381 |
// the page table is being aliased by the thread, so remove it... |
|
1382 |
TRACE2(("Thread %O RemoveAliasesForPageTable", this)); |
|
1383 |
thread->iAliasPde = KPdeUnallocatedEntry; |
|
1384 |
#ifdef __SMP__ // we need to also unmap the page table in case thread is running on another core... |
|
36
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
31
diff
changeset
|
1385 |
|
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
31
diff
changeset
|
1386 |
// Ensure other processors see the update to iAliasPde. |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
31
diff
changeset
|
1387 |
BroadcastAliasRefresh(); |
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
31
diff
changeset
|
1388 |
|
0 | 1389 |
*thread->iAliasPdePtr = KPdeUnallocatedEntry; |
36
538db54a451d
Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
31
diff
changeset
|
1390 |
|
0 | 1391 |
SinglePdeUpdated(thread->iAliasPdePtr); |
1392 |
__NK_ASSERT_DEBUG((thread->iAliasLinAddr&KPageMask)==0); |
|
1393 |
// Invalidate the tlb for the page using os asid of the process that created the alias |
|
1394 |
// this is safe as the os asid will be valid as thread must be running otherwise the alias |
|
1395 |
// would have been removed. |
|
1396 |
InvalidateTLBForPage(thread->iAliasLinAddr | ((DMemModelProcess*)thread->iOwningProcess)->OsAsid()); |
|
1397 |
// note, race condition with 'thread' updating its iAliasLinAddr is |
|
1398 |
// not a problem because 'thread' will not the be accessing the aliased |
|
1399 |
// region and will take care of invalidating the TLB. |
|
1400 |
#endif |
|
1401 |
} |
|
1402 |
MmuLock::Flash(); |
|
1403 |
} |
|
1404 |
||
1405 |
// copy checkedList back to iAliasList |
|
1406 |
iAliasList.MoveFrom(&checkedList); |
|
1407 |
||
1408 |
MmuLock::Unlock(); |
|
1409 |
} |
|
1410 |
||
1411 |
||
1412 |
void DMemModelThread::RefreshAlias() |
|
1413 |
{ |
|
1414 |
if(iAliasLinAddr) |
|
1415 |
{ |
|
1416 |
TRACE2(("Thread %O RefreshAlias", this)); |
|
1417 |
// Get the os asid, this is the current thread so no need to open a reference. |
|
1418 |
TUint thisAsid = ((DMemModelProcess*)iOwningProcess)->OsAsid(); |
|
1419 |
MmuLock::Lock(); |
|
1420 |
TInt osAsid = iAliasProcess->OsAsid(); |
|
1421 |
TPde pde = *Mmu::PageDirectoryEntry(osAsid,iAliasTarget); |
|
1422 |
iAliasPde = pde; |
|
1423 |
*iAliasPdePtr = pde; |
|
1424 |
SinglePdeUpdated(iAliasPdePtr); |
|
1425 |
InvalidateTLBForPage(iAliasLinAddr|thisAsid); |
|
1426 |
MmuLock::Unlock(); |
|
1427 |
} |
|
1428 |
} |
|
1429 |
||
1430 |
||
1431 |
||
1432 |
// |
|
1433 |
// Mapping/unmapping functions |
|
1434 |
// |
|
1435 |
||
1436 |
||
1437 |
/** |
|
1438 |
Modify page table entries (PTEs) so they map the given memory pages. |
|
1439 |
Entries are only updated if the current state of the corresponding page |
|
1440 |
is RPageArray::ECommitted. |
|
1441 |
||
1442 |
@param aPtePtr Pointer into a page table for the PTE of the first page. |
|
1443 |
@param aCount The number of pages to modify. |
|
1444 |
@param aPages Pointer to the entry for the first page in a memory object's #RPageArray. |
|
1445 |
Each entry contains the physical address of a page together with its |
|
1446 |
current state (RPageArray::TState). |
|
1447 |
@param aBlankPte The value to use for each PTE, with the physical address component equal |
|
1448 |
to zero. |
|
1449 |
||
1450 |
@return False, if the page table no longer maps any entries and may be freed. |
|
1451 |
True otherwise, to indicate that the page table is still needed. |
|
1452 |
||
1453 |
@pre #MmuLock held. |
|
1454 |
@post #MmuLock held and has not been released by this function. |
|
1455 |
*/ |
|
1456 |
TBool Mmu::MapPages(TPte* const aPtePtr, const TUint aCount, TPhysAddr* aPages, TPte aBlankPte) |
|
1457 |
{ |
|
1458 |
__NK_ASSERT_DEBUG(MmuLock::IsHeld()); |
|
1459 |
__NK_ASSERT_DEBUG(aCount); |
|
1460 |
__NK_ASSERT_DEBUG(aBlankPte!=KPteUnallocatedEntry); |
|
1461 |
||
1462 |
TUint count = 0; |
|
1463 |
if(aCount==1) |
|
1464 |
{ |
|
1465 |
// get page to map... |
|
1466 |
TPhysAddr pagePhys = *aPages; |
|
1467 |
TPte pte = *aPtePtr; |
|
1468 |
if(!RPageArray::TargetStateIsCommitted(pagePhys)) |
|
1469 |
goto done; // page no longer needs mapping |
|
1470 |
||
1471 |
// clear type flags... |
|
1472 |
pagePhys &= ~KPageMask; |
|
1473 |
||
1474 |
// check nobody has already mapped the page... |
|
1475 |
if(pte!=KPteUnallocatedEntry) |
|
1476 |
{ |
|
1477 |
// already mapped... |
|
1478 |
#ifdef _DEBUG |
|
1479 |
if((pte^pagePhys)>=TPte(KPageSize)) |
|
1480 |
{ |
|
1481 |
// but different! |
|
1482 |
Kern::Printf("Mmu::MapPages already mapped %x->%x",pagePhys,pte); |
|
1483 |
__NK_ASSERT_DEBUG(0); |
|
1484 |
} |
|
1485 |
#endif |
|
1486 |
return true; // return true to keep page table (it already had at least page mapped) |
|
1487 |
} |
|
1488 |
||
1489 |
// map page... |
|
1490 |
pte = pagePhys|aBlankPte; |
|
1491 |
TRACE2(("!PTE %x=%x",aPtePtr,pte)); |
|
1492 |
*aPtePtr = pte; |
|
1493 |
count = 1; |
|
1494 |
||
1495 |
// clean cache... |
|
1496 |
CacheMaintenance::SinglePteUpdated((TLinAddr)aPtePtr); |
|
1497 |
} |
|
1498 |
else |
|
1499 |
{ |
|
1500 |
// check we are only updating a single page table... |
|
1501 |
__NK_ASSERT_DEBUG(((TLinAddr(aPtePtr)^TLinAddr(aPtePtr+aCount-1))>>KPageTableShift)==0); |
|
1502 |
||
1503 |
// map pages... |
|
1504 |
TPte* pPte = aPtePtr; |
|
1505 |
TPte* pPteEnd = aPtePtr+aCount; |
|
1506 |
do |
|
1507 |
{ |
|
1508 |
// map page... |
|
1509 |
TPhysAddr pagePhys = *aPages++; |
|
1510 |
TPte pte = *pPte++; |
|
1511 |
if(RPageArray::TargetStateIsCommitted(pagePhys)) |
|
1512 |
{ |
|
1513 |
// clear type flags... |
|
1514 |
pagePhys &= ~KPageMask; |
|
1515 |
||
1516 |
// page not being freed, so try and map it... |
|
1517 |
if(pte!=KPteUnallocatedEntry) |
|
1518 |
{ |
|
1519 |
// already mapped... |
|
1520 |
#ifdef _DEBUG |
|
1521 |
if((pte^pagePhys)>=TPte(KPageSize)) |
|
1522 |
{ |
|
1523 |
// but different! |
|
1524 |
Kern::Printf("Mmu::MapPages already mapped %x->%x",pagePhys,pte); |
|
1525 |
__NK_ASSERT_DEBUG(0); |
|
1526 |
} |
|
1527 |
#endif |
|
1528 |
} |
|
1529 |
else |
|
1530 |
{ |
|
1531 |
// map page... |
|
1532 |
pte = pagePhys|aBlankPte; |
|
1533 |
TRACE2(("!PTE %x=%x",pPte-1,pte)); |
|
1534 |
pPte[-1] = pte; |
|
1535 |
++count; |
|
1536 |
} |
|
1537 |
} |
|
1538 |
} |
|
1539 |
while(pPte!=pPteEnd); |
|
1540 |
||
1541 |
// clean cache... |
|
1542 |
CacheMaintenance::MultiplePtesUpdated((TLinAddr)aPtePtr,(TLinAddr)pPte-(TLinAddr)aPtePtr); |
|
1543 |
} |
|
1544 |
||
1545 |
done: |
|
1546 |
// update page counts... |
|
1547 |
SPageTableInfo* pti = SPageTableInfo::FromPtPtr(aPtePtr); |
|
1548 |
count = pti->IncPageCount(count); |
|
1549 |
TRACE2(("pt %x page count=%d",TLinAddr(aPtePtr)&~KPageTableMask,pti->PageCount())); |
|
1550 |
__NK_ASSERT_DEBUG(pti->CheckPageCount()); |
|
1551 |
||
1552 |
// see if page table needs freeing... |
|
1553 |
TUint keepPt = count | pti->PermanenceCount(); |
|
1554 |
||
1555 |
__NK_ASSERT_DEBUG(!pti->IsDemandPaged()); // check not demand paged page table |
|
1556 |
||
1557 |
return keepPt; |
|
1558 |
} |
|
1559 |
||
1560 |
||
1561 |
/** |
|
1562 |
Modify page table entries (PTEs) so they map a new page. |
|
1563 |
Entries are only updated if the current state of the corresponding page |
|
1564 |
is RPageArray::ECommitted or RPageArray::EMoving. |
|
1565 |
||
1566 |
@param aPtePtr Pointer into a page table for the PTE of the page. |
|
1567 |
@param aPage Pointer to the entry for the page in a memory object's #RPageArray. |
|
1568 |
The entry contains the physical address of a page together with its |
|
1569 |
current state (RPageArray::TState). |
|
1570 |
@param aBlankPte The value to use for each PTE, with the physical address component equal |
|
1571 |
to zero. |
|
1572 |
||
1573 |
@pre #MmuLock held. |
|
1574 |
@post #MmuLock held and has not been released by this function. |
|
1575 |
*/ |
|
1576 |
void Mmu::RemapPage(TPte* const aPtePtr, TPhysAddr& aPage, TPte aBlankPte) |
|
1577 |
{ |
|
1578 |
__NK_ASSERT_DEBUG(MmuLock::IsHeld()); |
|
1579 |
__NK_ASSERT_DEBUG(aBlankPte!=KPteUnallocatedEntry); |
|
1580 |
||
1581 |
// get page to remap... |
|
1582 |
TPhysAddr pagePhys = aPage; |
|
1583 |
||
1584 |
// Only remap the page if it is committed or it is being moved and |
|
1585 |
// no other operation has been performed on the page. |
|
1586 |
if(!RPageArray::TargetStateIsCommitted(pagePhys)) |
|
1587 |
return; // page no longer needs mapping |
|
1588 |
||
1589 |
// Only remap the page if it is currently mapped, i.e. doesn't have an unallocated pte. |
|
1590 |
// This will only be true if a new mapping is being added but it hasn't yet updated |
|
1591 |
// all the ptes for the pages that it maps. |
|
1592 |
TPte pte = *aPtePtr; |
|
1593 |
if (pte == KPteUnallocatedEntry) |
|
1594 |
return; |
|
1595 |
||
1596 |
// clear type flags... |
|
1597 |
pagePhys &= ~KPageMask; |
|
1598 |
||
1599 |
SPageInfo* pi = SPageInfo::SafeFromPhysAddr(pagePhys); |
|
1600 |
if (pi) |
|
1601 |
{ |
|
1602 |
SPageInfo::TPagedState pagedState = pi->PagedState(); |
|
1603 |
if (pagedState != SPageInfo::EUnpaged) |
|
1604 |
{ |
|
1605 |
// The page is demand paged. Only remap the page if it is pinned or is currently |
|
1606 |
// accessible but to the old physical page. |
|
1607 |
if (pagedState != SPageInfo::EPagedPinned && |
|
1608 |
(Mmu::IsPteInaccessible(pte) || (pte^pagePhys) < TPte(KPageSize))) |
|
1609 |
return; |
|
1610 |
if (!pi->IsDirty()) |
|
1611 |
{ |
|
1612 |
// Ensure that the page is mapped as read only to prevent pages being marked dirty |
|
1613 |
// by page moving despite not having been written to |
|
1614 |
Mmu::MakePteInaccessible(aBlankPte, EFalse); |
|
1615 |
} |
|
1616 |
} |
|
1617 |
} |
|
1618 |
||
1619 |
// Map the page in the page array entry as this is always the physical |
|
1620 |
// page that the memory object's page should be mapped to. |
|
1621 |
pte = pagePhys|aBlankPte; |
|
1622 |
TRACE2(("!PTE %x=%x",aPtePtr,pte)); |
|
1623 |
*aPtePtr = pte; |
|
1624 |
||
1625 |
// clean cache... |
|
1626 |
CacheMaintenance::SinglePteUpdated((TLinAddr)aPtePtr); |
|
1627 |
} |
|
1628 |
||
1629 |
||
1630 |
/** |
|
1631 |
Modify page table entries (PTEs) so they no longer map any memory pages. |
|
1632 |
||
1633 |
@param aPtePtr Pointer into a page table for the PTE of the first page. |
|
1634 |
@param aCount The number of pages to modify. |
|
1635 |
||
1636 |
@return False, if the page table no longer maps any entries and may be freed. |
|
1637 |
True otherwise, to indicate that the page table is still needed. |
|
1638 |
||
1639 |
@pre #MmuLock held. |
|
1640 |
@post #MmuLock held and has not been released by this function. |
|
1641 |
*/ |
|
1642 |
TBool Mmu::UnmapPages(TPte* const aPtePtr, TUint aCount) |
|
1643 |
{ |
|
1644 |
__NK_ASSERT_DEBUG(MmuLock::IsHeld()); |
|
1645 |
__NK_ASSERT_DEBUG(aCount); |
|
1646 |
||
1647 |
TUint count = 0; |
|
1648 |
if(aCount==1) |
|
1649 |
{ |
|
1650 |
if(*aPtePtr==KPteUnallocatedEntry) |
|
1651 |
return true; // page already unmapped |
|
1652 |
||
1653 |
// unmap page... |
|
1654 |
++count; |
|
1655 |
TPte pte = KPteUnallocatedEntry; |
|
1656 |
TRACE2(("!PTE %x=%x",aPtePtr,pte)); |
|
1657 |
*aPtePtr = pte; |
|
1658 |
||
1659 |
// clean cache... |
|
1660 |
CacheMaintenance::SinglePteUpdated((TLinAddr)aPtePtr); |
|
1661 |
} |
|
1662 |
else |
|
1663 |
{ |
|
1664 |
// check we are only updating a single page table... |
|
1665 |
__NK_ASSERT_DEBUG(((TLinAddr(aPtePtr)^TLinAddr(aPtePtr+aCount-1))>>KPageTableShift)==0); |
|
1666 |
||
1667 |
// unmap pages... |
|
1668 |
TPte* pPte = aPtePtr; |
|
1669 |
TPte* pPteEnd = aPtePtr+aCount; |
|
1670 |
do |
|
1671 |
{ |
|
1672 |
if(*pPte!=KPteUnallocatedEntry) |
|
1673 |
{ |
|
1674 |
// unmap page... |
|
1675 |
++count; |
|
1676 |
TPte pte = KPteUnallocatedEntry; |
|
1677 |
TRACE2(("!PTE %x=%x",pPte,pte)); |
|
1678 |
*pPte = pte; |
|
1679 |
} |
|
1680 |
} |
|
1681 |
while(++pPte<pPteEnd); |
|
1682 |
||
1683 |
if(!count) |
|
1684 |
return true; // no PTEs changed, so nothing more to do |
|
1685 |
||
1686 |
// clean cache... |
|
1687 |
CacheMaintenance::MultiplePtesUpdated((TLinAddr)aPtePtr,(TLinAddr)pPte-(TLinAddr)aPtePtr); |
|
1688 |
} |
|
1689 |
||
1690 |
// update page table info... |
|
1691 |
SPageTableInfo* pti = SPageTableInfo::FromPtPtr(aPtePtr); |
|
1692 |
count = pti->DecPageCount(count); |
|
1693 |
TRACE2(("pt %x page count=%d",TLinAddr(aPtePtr)&~KPageTableMask,count)); |
|
1694 |
__NK_ASSERT_DEBUG(pti->CheckPageCount()); |
|
1695 |
||
1696 |
// see if page table needs freeing... |
|
1697 |
TUint keepPt = count | pti->PermanenceCount(); |
|
1698 |
||
1699 |
return keepPt; |
|
1700 |
} |
|
1701 |
||
1702 |
||
1703 |
/** |
|
1704 |
Modify page table entries (PTEs) so they no longer map the given memory pages. |
|
1705 |
Entries are only updated if the current state of the corresponding page |
|
1706 |
is 'decommitted' i.e. RPageArray::TargetStateIsDecommitted returns true. |
|
1707 |
||
1708 |
@param aPtePtr Pointer into a page table for the PTE of the first page. |
|
1709 |
@param aCount The number of pages to modify. |
|
1710 |
@param aPages Pointer to the entry for the first page in a memory object's #RPageArray. |
|
1711 |
Each entry contains the physical address of a page together with its |
|
1712 |
current state (RPageArray::TState). |
|
1713 |
||
1714 |
@return False, if the page table no longer maps any entries and may be freed. |
|
1715 |
True otherwise, to indicate that the page table is still needed. |
|
1716 |
||
1717 |
@pre #MmuLock held. |
|
1718 |
@post #MmuLock held and has not been released by this function. |
|
1719 |
*/ |
|
1720 |
TBool Mmu::UnmapPages(TPte* const aPtePtr, TUint aCount, TPhysAddr* aPages) |
|
1721 |
{ |
|
1722 |
__NK_ASSERT_DEBUG(MmuLock::IsHeld()); |
|
1723 |
__NK_ASSERT_DEBUG(aCount); |
|
1724 |
||
1725 |
TUint count = 0; |
|
1726 |
if(aCount==1) |
|
1727 |
{ |
|
1728 |
if(*aPtePtr==KPteUnallocatedEntry) |
|
1729 |
return true; // page already unmapped |
|
1730 |
||
1731 |
if(!RPageArray::TargetStateIsDecommitted(*aPages)) |
|
1732 |
return true; // page has been reallocated |
|
1733 |
||
1734 |
// unmap page... |
|
1735 |
++count; |
|
1736 |
TPte pte = KPteUnallocatedEntry; |
|
1737 |
TRACE2(("!PTE %x=%x",aPtePtr,pte)); |
|
1738 |
*aPtePtr = pte; |
|
1739 |
||
1740 |
// clean cache... |
|
1741 |
CacheMaintenance::SinglePteUpdated((TLinAddr)aPtePtr); |
|
1742 |
} |
|
1743 |
else |
|
1744 |
{ |
|
1745 |
// check we are only updating a single page table... |
|
1746 |
__NK_ASSERT_DEBUG(((TLinAddr(aPtePtr)^TLinAddr(aPtePtr+aCount-1))>>KPageTableShift)==0); |
|
1747 |
||
1748 |
// unmap pages... |
|
1749 |
TPte* pPte = aPtePtr; |
|
1750 |
TPte* pPteEnd = aPtePtr+aCount; |
|
1751 |
do |
|
1752 |
{ |
|
1753 |
if(RPageArray::TargetStateIsDecommitted(*aPages++) && *pPte!=KPteUnallocatedEntry) |
|
1754 |
{ |
|
1755 |
// unmap page... |
|
1756 |
++count; |
|
1757 |
TPte pte = KPteUnallocatedEntry; |
|
1758 |
TRACE2(("!PTE %x=%x",pPte,pte)); |
|
1759 |
*pPte = pte; |
|
1760 |
} |
|
1761 |
} |
|
1762 |
while(++pPte<pPteEnd); |
|
1763 |
||
1764 |
if(!count) |
|
1765 |
return true; // no PTEs changed, so nothing more to do |
|
1766 |
||
1767 |
// clean cache... |
|
1768 |
CacheMaintenance::MultiplePtesUpdated((TLinAddr)aPtePtr,(TLinAddr)pPte-(TLinAddr)aPtePtr); |
|
1769 |
} |
|
1770 |
||
1771 |
// update page table info... |
|
1772 |
SPageTableInfo* pti = SPageTableInfo::FromPtPtr(aPtePtr); |
|
1773 |
count = pti->DecPageCount(count); |
|
1774 |
TRACE2(("pt %x page count=%d",TLinAddr(aPtePtr)&~KPageTableMask,count)); |
|
1775 |
__NK_ASSERT_DEBUG(pti->CheckPageCount()); |
|
1776 |
||
1777 |
// see if page table needs freeing... |
|
1778 |
TUint keepPt = count | pti->PermanenceCount(); |
|
1779 |
||
1780 |
return keepPt; |
|
1781 |
} |
|
1782 |
||
1783 |
||
1784 |
/** |
|
1785 |
Modify page table entries (PTEs) so the given memory pages are not accessible. |
|
1786 |
Entries are only updated if the current state of the corresponding page |
|
1787 |
is RPageArray::ERestrictingNA. |
|
1788 |
||
1789 |
@param aPtePtr Pointer into a page table for the PTE of the first page. |
|
1790 |
@param aCount The number of pages to modify. |
|
1791 |
@param aPages Pointer to the entry for the first page in a memory object's #RPageArray. |
|
1792 |
Each entry contains the physical address of a page together with its |
|
1793 |
current state (RPageArray::TState). |
|
1794 |
||
1795 |
@pre #MmuLock held. |
|
1796 |
@post #MmuLock held and has not been released by this function. |
|
1797 |
*/ |
|
1798 |
void Mmu::RestrictPagesNA(TPte* const aPtePtr, TUint aCount, TPhysAddr* aPages) |
|
1799 |
{ |
|
1800 |
__NK_ASSERT_DEBUG(MmuLock::IsHeld()); |
|
1801 |
__NK_ASSERT_DEBUG(aCount); |
|
1802 |
||
1803 |
if(aCount==1) |
|
1804 |
{ |
|
1805 |
TPhysAddr page = *aPages; |
|
1806 |
TPte pte = *aPtePtr; |
|
1807 |
RPageArray::TState state = RPageArray::State(page); |
|
1808 |
if(state != RPageArray::ERestrictingNA && state != RPageArray::EMoving) |
|
1809 |
return; // page no longer needs restricting |
|
1810 |
||
1811 |
if(pte==KPteUnallocatedEntry) |
|
1812 |
return; // page gone |
|
1813 |
||
1814 |
// restrict page... |
|
1815 |
pte = Mmu::MakePteInaccessible(pte,false); |
|
1816 |
TRACE2(("!PTE %x=%x",aPtePtr,pte)); |
|
1817 |
*aPtePtr = pte; |
|
1818 |
||
1819 |
// clean cache... |
|
1820 |
CacheMaintenance::SinglePteUpdated((TLinAddr)aPtePtr); |
|
1821 |
} |
|
1822 |
else |
|
1823 |
{ |
|
1824 |
// check we are only updating a single page table... |
|
1825 |
__NK_ASSERT_DEBUG(((TLinAddr(aPtePtr)^TLinAddr(aPtePtr+aCount-1))>>KPageTableShift)==0); |
|
1826 |
||
1827 |
// restrict pages... |
|
1828 |
TPte* pPte = aPtePtr; |
|
1829 |
TPte* pPteEnd = aPtePtr+aCount; |
|
1830 |
do |
|
1831 |
{ |
|
1832 |
TPhysAddr page = *aPages++; |
|
1833 |
TPte pte = *pPte++; |
|
1834 |
if(RPageArray::State(page)==RPageArray::ERestrictingNA && pte!=KPteUnallocatedEntry) |
|
1835 |
{ |
|
1836 |
pte = Mmu::MakePteInaccessible(pte,false); |
|
1837 |
TRACE2(("!PTE %x=%x",pPte-1,pte)); |
|
1838 |
pPte[-1] = pte; |
|
1839 |
} |
|
1840 |
} |
|
1841 |
while(pPte<pPteEnd); |
|
1842 |
||
1843 |
// clean cache... |
|
1844 |
CacheMaintenance::MultiplePtesUpdated((TLinAddr)aPtePtr,(TLinAddr)pPte-(TLinAddr)aPtePtr); |
|
1845 |
} |
|
1846 |
} |
|
1847 |
||
1848 |
||
1849 |
/** |
|
1850 |
Modify page table entries (PTEs) so they map the given demand paged memory pages. |
|
1851 |
||
1852 |
Entries are only updated if the current state of the corresponding page |
|
1853 |
is RPageArray::ECommitted. |
|
1854 |
||
1855 |
This function is used for demand paged memory when handling a page fault or |
|
1856 |
memory pinning operation. It will widen the access permission of existing entries |
|
1857 |
if required to match \a aBlankPte and will 'rejuvenate' the page table. |
|
1858 |
||
1859 |
@param aPtePtr Pointer into a page table for the PTE of the first page. |
|
1860 |
@param aCount The number of pages to modify. |
|
1861 |
@param aPages Pointer to the entry for the first page in a memory object's #RPageArray. |
|
1862 |
Each entry contains the physical address of a page together with its |
|
1863 |
current state (RPageArray::TState). |
|
1864 |
@param aBlankPte The value to use for each PTE, with the physical address component equal |
|
1865 |
to zero. |
|
1866 |
||
1867 |
@return False, if the page table no longer maps any entries and may be freed. |
|
1868 |
True otherwise, to indicate that the page table is still needed. |
|
1869 |
||
1870 |
@pre #MmuLock held. |
|
1871 |
@post MmuLock held (but may have been released by this function) |
|
1872 |
*/ |
|
1873 |
TBool Mmu::PageInPages(TPte* const aPtePtr, const TUint aCount, TPhysAddr* aPages, TPte aBlankPte) |
|
1874 |
{ |
|
1875 |
__NK_ASSERT_DEBUG(MmuLock::IsHeld()); |
|
1876 |
__NK_ASSERT_DEBUG(aCount); |
|
1877 |
__NK_ASSERT_DEBUG(aBlankPte!=KPteUnallocatedEntry); |
|
1878 |
||
1879 |
TUint count = 0; |
|
1880 |
||
1881 |
if(aCount==1) |
|
1882 |
{ |
|
1883 |
// get page to map... |
|
1884 |
TPhysAddr page = *aPages; |
|
1885 |
TPte pte = *aPtePtr; |
|
1886 |
if(!RPageArray::TargetStateIsCommitted(page)) |
|
1887 |
goto done; // page no longer needs mapping |
|
1888 |
||
1889 |
#ifdef _DEBUG |
|
1890 |
if(pte!=KPteUnallocatedEntry) |
|
1891 |
{ |
|
1892 |
if ((pte^page)>=TPte(KPageSize) && !Mmu::IsPteInaccessible(pte) && |
|
1893 |
!Mmu::IsPteReadOnly(pte)) |
|
1894 |
{ |
|
1895 |
// Page has been mapped before but the physical address is different |
|
1896 |
// and the page hasn't been moved as it is not inaccessible. |
|
1897 |
Kern::Printf("Mmu::PageInPages already mapped %x->%x",page,pte); |
|
1898 |
__NK_ASSERT_DEBUG(0); |
|
1899 |
} |
|
1900 |
} |
|
1901 |
#endif |
|
1902 |
if(!Mmu::IsPteMoreAccessible(aBlankPte,pte)) |
|
1903 |
return true; // return true to keep page table (it already had at least page mapped) |
|
1904 |
||
1905 |
// remap page with new increased permissions... |
|
1906 |
if(pte==KPteUnallocatedEntry) |
|
1907 |
count = 1; // we'll be adding a new pte entry, count it |
|
1908 |
if(!Mmu::IsPteReadOnly(aBlankPte)) |
|
1909 |
ThePager.SetWritable(*SPageInfo::FromPhysAddr(page)); |
|
1910 |
pte = (page&~KPageMask)|aBlankPte; |
|
1911 |
TRACE2(("!PTE %x=%x",aPtePtr,pte)); |
|
1912 |
*aPtePtr = pte; |
|
1913 |
||
1914 |
// clean cache... |
|
1915 |
CacheMaintenance::SinglePteUpdated((TLinAddr)aPtePtr); |
|
1916 |
} |
|
1917 |
else |
|
1918 |
{ |
|
1919 |
// check we are only updating a single page table... |
|
1920 |
__NK_ASSERT_DEBUG(((TLinAddr(aPtePtr)^TLinAddr(aPtePtr+aCount-1))>>KPageTableShift)==0); |
|
1921 |
||
1922 |
// map pages... |
|
1923 |
TPte* pPte = aPtePtr; |
|
1924 |
TPte* pPteEnd = aPtePtr+aCount; |
|
1925 |
do |
|
1926 |
{ |
|
1927 |
// map page... |
|
1928 |
TPhysAddr page = *aPages++; |
|
1929 |
TPte pte = *pPte++; |
|
1930 |
if(RPageArray::TargetStateIsCommitted(page)) |
|
1931 |
{ |
|
1932 |
#ifdef _DEBUG |
|
1933 |
if(pte!=KPteUnallocatedEntry) |
|
1934 |
{ |
|
1935 |
if ((pte^page)>=TPte(KPageSize) && !Mmu::IsPteInaccessible(pte) && |
|
1936 |
!Mmu::IsPteReadOnly(pte)) |
|
1937 |
{ |
|
1938 |
// Page has been mapped before but the physical address is different |
|
1939 |
// and the page hasn't been moved as it is not inaccessible. |
|
1940 |
Kern::Printf("Mmu::PageInPages already mapped %x->%x",page,pte); |
|
1941 |
__NK_ASSERT_DEBUG(0); |
|
1942 |
} |
|
1943 |
} |
|
1944 |
#endif |
|
1945 |
if(Mmu::IsPteMoreAccessible(aBlankPte,pte)) |
|
1946 |
{ |
|
1947 |
// remap page with new increased permissions... |
|
1948 |
if(pte==KPteUnallocatedEntry) |
|
1949 |
++count; // we'll be adding a new pte entry, count it |
|
1950 |
if(!Mmu::IsPteReadOnly(aBlankPte)) |
|
1951 |
ThePager.SetWritable(*SPageInfo::FromPhysAddr(page)); |
|
1952 |
pte = (page&~KPageMask)|aBlankPte; |
|
1953 |
TRACE2(("!PTE %x=%x",pPte-1,pte)); |
|
1954 |
pPte[-1] = pte; |
|
1955 |
} |
|
1956 |
} |
|
1957 |
} |
|
1958 |
while(pPte!=pPteEnd); |
|
1959 |
||
1960 |
// clean cache... |
|
1961 |
CacheMaintenance::MultiplePtesUpdated((TLinAddr)aPtePtr,(TLinAddr)pPte-(TLinAddr)aPtePtr); |
|
1962 |
} |
|
1963 |
||
1964 |
done: |
|
1965 |
// update page counts... |
|
1966 |
SPageTableInfo* pti = SPageTableInfo::FromPtPtr(aPtePtr); |
|
1967 |
count = pti->IncPageCount(count); |
|
1968 |
TRACE2(("pt %x page count=%d",TLinAddr(aPtePtr)&~KPageTableMask,pti->PageCount())); |
|
1969 |
__NK_ASSERT_DEBUG(pti->CheckPageCount()); |
|
1970 |
||
1971 |
// see if page table needs freeing... |
|
1972 |
TUint keepPt = count | pti->PermanenceCount(); |
|
1973 |
||
1974 |
// rejuvenate demand paged page tables... |
|
1975 |
ThePager.RejuvenatePageTable(aPtePtr); |
|
1976 |
||
1977 |
return keepPt; |
|
1978 |
} |
|
1979 |
||
1980 |
||
1981 |
// |
|
1982 |
// CodeModifier |
|
1983 |
// |
|
1984 |
||
1985 |
#ifdef __DEBUGGER_SUPPORT__ |
|
1986 |
||
1987 |
void DoWriteCode(TUint32* aAddress, TUint32 aValue); |
|
1988 |
||
1989 |
#ifdef __SMP__ |
|
1990 |
||
1991 |
extern "C" void __e32_instruction_barrier(); |
|
1992 |
||
1993 |
class TCodeModifierBroadcast : public TGenericIPI |
|
1994 |
{ |
|
1995 |
public: |
|
1996 |
TCodeModifierBroadcast(TUint32* aAddress, TUint32 aValue); |
|
1997 |
static void Isr(TGenericIPI*); |
|
1998 |
void Go(); |
|
1999 |
public: |
|
2000 |
TUint32* iAddress; |
|
2001 |
TUint32 iValue; |
|
2002 |
volatile TInt iFlag; |
|
2003 |
}; |
|
2004 |
||
2005 |
TCodeModifierBroadcast::TCodeModifierBroadcast(TUint32* aAddress, TUint32 aValue) |
|
2006 |
: iAddress(aAddress), iValue(aValue), iFlag(0) |
|
2007 |
{ |
|
2008 |
} |
|
2009 |
||
2010 |
void TCodeModifierBroadcast::Isr(TGenericIPI* aPtr) |
|
2011 |
{ |
|
2012 |
TCodeModifierBroadcast& a = *(TCodeModifierBroadcast*)aPtr; |
|
2013 |
while (!__e32_atomic_load_acq32(&a.iFlag)) |
|
2014 |
__chill(); |
|
2015 |
#ifdef __BROADCAST_CACHE_MAINTENANCE__ |
|
2016 |
CacheMaintenance::CodeChanged((TLinAddr)a.iAddress, sizeof (TInt), CacheMaintenance::ECodeModifier); // need to do separate Clean-D, Purge-I on each core |
|
2017 |
#else |
|
2018 |
__e32_instruction_barrier(); // synchronize instruction execution |
|
2019 |
#endif |
|
2020 |
} |
|
2021 |
||
2022 |
void TCodeModifierBroadcast::Go() |
|
2023 |
{ |
|
2024 |
NKern::Lock(); |
|
2025 |
QueueAllOther(&Isr); |
|
2026 |
WaitEntry(); // wait for other cores to stop |
|
2027 |
DoWriteCode(iAddress, iValue); |
|
2028 |
iFlag = 1; |
|
2029 |
__e32_instruction_barrier(); // synchronize instruction execution |
|
2030 |
WaitCompletion(); // wait for other cores to resume |
|
2031 |
NKern::Unlock(); |
|
2032 |
} |
|
2033 |
#endif |
|
2034 |
||
2035 |
/** |
|
2036 |
@pre Calling thread must be in critical section |
|
2037 |
@pre CodeSeg mutex held |
|
2038 |
*/ |
|
2039 |
TInt CodeModifier::SafeWriteCode(DProcess* aProcess, TLinAddr aAddress, TInt aSize, TUint aValue, void* aOldValue) |
|
2040 |
{ |
|
2041 |
__ASSERT_CRITICAL; |
|
2042 |
Mmu& m=TheMmu; |
|
2043 |
RamAllocLock::Lock(); |
|
2044 |
MmuLock::Lock(); |
|
2045 |
__UNLOCK_GUARD_START(MmuLock); |
|
2046 |
||
2047 |
// Check aProcess is still alive by opening a reference on its os asid. |
|
2048 |
TInt osAsid = ((DMemModelProcess*)aProcess)->TryOpenOsAsid(); |
|
2049 |
if (osAsid < 0) |
|
2050 |
{ |
|
2051 |
__KTRACE_OPT(KDEBUGGER,Kern::Printf("CodeModifier::SafeWriteCode - zombie process")); |
|
2052 |
__UNLOCK_GUARD_END(MmuLock); |
|
2053 |
MmuLock::Unlock(); |
|
2054 |
RamAllocLock::Unlock(); |
|
2055 |
return KErrBadDescriptor; |
|
2056 |
} |
|
2057 |
||
2058 |
// Find physical address of the page, the breakpoint belongs to |
|
2059 |
TPhysAddr physAddr = Mmu::LinearToPhysical(aAddress, osAsid); |
|
2060 |
__KTRACE_OPT(KDEBUGGER,Kern::Printf("CodeModifier::SafeWriteCode - PA:%x", physAddr)); |
|
2061 |
||
2062 |
||
2063 |
if (physAddr==KPhysAddrInvalid) |
|
2064 |
{ |
|
2065 |
__KTRACE_OPT(KDEBUGGER,Kern::Printf("CodeModifier::SafeWriteCode - invalid VA")); |
|
2066 |
__UNLOCK_GUARD_END(MmuLock); |
|
2067 |
MmuLock::Unlock(); |
|
2068 |
RamAllocLock::Unlock(); |
|
2069 |
// The os asid is no longer required. |
|
2070 |
((DMemModelProcess*)aProcess)->CloseOsAsid(); |
|
2071 |
return KErrBadDescriptor; |
|
2072 |
} |
|
2073 |
||
2074 |
// Temporary map physical page |
|
2075 |
TLinAddr tempAddr = m.MapTemp(physAddr&~KPageMask, aAddress>>KPageShift); |
|
2076 |
tempAddr |= aAddress & KPageMask; |
|
2077 |
__KTRACE_OPT(KDEBUGGER,Kern::Printf("CodeModifier::SafeWriteCode - tempAddr:%x",tempAddr)); |
|
2078 |
||
2079 |
TInt r = KErrBadDescriptor; |
|
2080 |
TUint32* ptr = (TUint32*)(tempAddr&~3); |
|
2081 |
TUint32 oldWord; |
|
2082 |
||
2083 |
if(Kern::SafeRead(ptr,&oldWord,sizeof(oldWord))==0 // safely read the original value... |
|
2084 |
&& Kern::SafeWrite(ptr,&oldWord,sizeof(oldWord))==0 ) // and write it back |
|
2085 |
{ |
|
2086 |
// We have successfully probed the memory by reading and writing to it |
|
2087 |
// so we assume it is now safe to access without generating exceptions. |
|
2088 |
// If this is wrong it will kill the system horribly. |
|
2089 |
||
2090 |
TUint32 newWord; |
|
2091 |
TUint badAlign; |
|
2092 |
TUint shift = (aAddress&3)*8; |
|
2093 |
||
2094 |
switch(aSize) |
|
2095 |
{ |
|
2096 |
case 1: // 1 byte value |
|
2097 |
badAlign = 0; |
|
2098 |
*(TUint8*)aOldValue = oldWord>>shift; |
|
2099 |
newWord = (oldWord&~(0xff<<shift)) | ((aValue&0xff)<<shift); |
|
2100 |
break; |
|
2101 |
||
2102 |
case 2: // 2 byte value |
|
2103 |
badAlign = tempAddr&1; |
|
2104 |
if(!badAlign) |
|
2105 |
*(TUint16*)aOldValue = oldWord>>shift; |
|
2106 |
newWord = (oldWord&~(0xffff<<shift)) | ((aValue&0xffff)<<shift); |
|
2107 |
break; |
|
2108 |
||
2109 |
default: // 4 byte value |
|
2110 |
badAlign = tempAddr&3; |
|
2111 |
if(!badAlign) |
|
2112 |
*(TUint32*)aOldValue = oldWord; |
|
2113 |
newWord = aValue; |
|
2114 |
break; |
|
2115 |
} |
|
2116 |
||
2117 |
if(!badAlign) |
|
2118 |
{ |
|
2119 |
// write the new value... |
|
2120 |
#ifdef __SMP__ |
|
2121 |
TCodeModifierBroadcast b(ptr, newWord); |
|
2122 |
b.Go(); |
|
2123 |
#else |
|
2124 |
DoWriteCode(ptr, newWord); |
|
2125 |
#endif |
|
2126 |
r = KErrNone; |
|
2127 |
} |
|
2128 |
} |
|
2129 |
||
2130 |
__UNLOCK_GUARD_END(MmuLock); |
|
2131 |
m.UnmapTemp(); |
|
2132 |
MmuLock::Unlock(); |
|
2133 |
RamAllocLock::Unlock(); |
|
2134 |
// The os asid is no longer required. |
|
2135 |
((DMemModelProcess*)aProcess)->CloseOsAsid(); |
|
2136 |
return r; |
|
2137 |
} |
|
2138 |
||
2139 |
/** |
|
2140 |
@pre Calling thread must be in critical section |
|
2141 |
@pre CodeSeg mutex held |
|
2142 |
*/ |
|
2143 |
void DoWriteCode(TUint32* aAddress, TUint32 aValue) |
|
2144 |
{ |
|
2145 |
// We do not want to be interrupted by e.g. ISR that will run altered code before IMB-Range. |
|
2146 |
// Therefore, copy data and clean/invalidate caches with interrupts disabled. |
|
2147 |
TInt irq = NKern::DisableAllInterrupts(); |
|
2148 |
*aAddress = aValue; |
|
2149 |
CacheMaintenance::CodeChanged((TLinAddr)aAddress, sizeof(TUint32), CacheMaintenance::ECodeModifier); |
|
2150 |
NKern::RestoreInterrupts(irq); |
|
2151 |
} |
|
2152 |
||
2153 |
#endif //__DEBUGGER_SUPPORT__ |
|
2154 |
||
2155 |
||
2156 |
||
2157 |
// |
|
2158 |
// Virtual pinning |
|
2159 |
// |
|
2160 |
||
2161 |
TInt M::CreateVirtualPinObject(TVirtualPinObject*& aPinObject) |
|
2162 |
{ |
|
2163 |
aPinObject = (TVirtualPinObject*)new DVirtualPinMapping; |
|
2164 |
return aPinObject != NULL ? KErrNone : KErrNoMemory; |
|
2165 |
} |
|
2166 |
||
2167 |
TInt M::PinVirtualMemory(TVirtualPinObject* aPinObject, TLinAddr aStart, TUint aSize, DThread* aThread) |
|
2168 |
{ |
|
39
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2169 |
__ASSERT_CRITICAL; |
0 | 2170 |
TUint offsetInMapping; |
2171 |
TUint mapInstanceCount; |
|
2172 |
DMemoryMapping* mapping = MM::FindMappingInThread( (DMemModelThread*)aThread, |
|
2173 |
aStart, |
|
2174 |
aSize, |
|
2175 |
offsetInMapping, |
|
2176 |
mapInstanceCount); |
|
2177 |
TInt r = KErrBadDescriptor; |
|
2178 |
if (mapping) |
|
2179 |
{ |
|
2180 |
TInt count = ((aStart & KPageMask) + aSize + KPageMask) >> KPageShift; |
|
2181 |
if(mapping->IsPinned()) |
|
2182 |
{ |
|
2183 |
// Mapping for specified virtual address is pinned so we don't need to |
|
2184 |
// do anything. Also, we can't safely pin the memory in this case |
|
2185 |
// anyway, as pinned mappings may move between memory objects |
|
2186 |
r = KErrNone; |
|
2187 |
} |
|
2188 |
else |
|
2189 |
{ |
|
2190 |
MmuLock::Lock(); |
|
2191 |
DMemoryObject* memory = mapping->Memory(); |
|
2192 |
if (mapInstanceCount != mapping->MapInstanceCount() || |
|
2193 |
!memory || !memory->IsDemandPaged()) |
|
2194 |
{ |
|
2195 |
// mapping has been reused, no memory, or it's not paged, so no need to pin... |
|
2196 |
MmuLock::Unlock(); |
|
2197 |
r = KErrNone; |
|
2198 |
} |
|
2199 |
else |
|
2200 |
{ |
|
2201 |
// paged memory needs pinning... |
|
2202 |
// Open a reference on the memory so it doesn't get deleted. |
|
2203 |
memory->Open(); |
|
2204 |
MmuLock::Unlock(); |
|
2205 |
||
2206 |
TUint startInMemory = (offsetInMapping >> KPageShift) + mapping->iStartIndex; |
|
2207 |
r = ((DVirtualPinMapping*)aPinObject)->Pin( memory, startInMemory, count, mapping->Permissions(), |
|
2208 |
mapping, mapInstanceCount); |
|
2209 |
memory->Close(); |
|
2210 |
} |
|
2211 |
} |
|
2212 |
mapping->Close(); |
|
39
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2213 |
} |
0 | 2214 |
return r; |
2215 |
} |
|
2216 |
||
2217 |
TInt M::CreateAndPinVirtualMemory(TVirtualPinObject*& aPinObject, TLinAddr aStart, TUint aSize) |
|
2218 |
{ |
|
39
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2219 |
__ASSERT_CRITICAL; |
0 | 2220 |
aPinObject = 0; |
2221 |
TUint offsetInMapping; |
|
2222 |
TUint mapInstanceCount; |
|
2223 |
DMemoryMapping* mapping = MM::FindMappingInThread( (DMemModelThread*)&Kern::CurrentThread(), |
|
2224 |
aStart, |
|
2225 |
aSize, |
|
2226 |
offsetInMapping, |
|
2227 |
mapInstanceCount); |
|
2228 |
TInt r = KErrBadDescriptor; |
|
2229 |
if (mapping) |
|
2230 |
{ |
|
2231 |
TInt count = ((aStart & KPageMask) + aSize + KPageMask) >> KPageShift; |
|
2232 |
if(mapping->IsPinned()) |
|
2233 |
{ |
|
2234 |
// Mapping for specified virtual address is pinned so we don't need to |
|
2235 |
// do anything. Also, we can't safely pin the memory in this case |
|
2236 |
// anyway, as pinned mappings may move between memory objects |
|
2237 |
r = KErrNone; |
|
2238 |
} |
|
2239 |
else |
|
2240 |
{ |
|
2241 |
MmuLock::Lock(); |
|
2242 |
DMemoryObject* memory = mapping->Memory(); |
|
2243 |
if (mapInstanceCount != mapping->MapInstanceCount() || |
|
2244 |
!memory || !memory->IsDemandPaged()) |
|
2245 |
{ |
|
2246 |
// mapping has been reused, no memory, or it's not paged, so no need to pin... |
|
2247 |
MmuLock::Unlock(); |
|
2248 |
r = KErrNone; |
|
2249 |
} |
|
2250 |
else |
|
2251 |
{// The memory is demand paged so create a pin object and pin it. |
|
2252 |
// Open a reference on the memory so it doesn't get deleted. |
|
2253 |
memory->Open(); |
|
2254 |
MmuLock::Unlock(); |
|
2255 |
r = CreateVirtualPinObject(aPinObject); |
|
2256 |
if (r == KErrNone) |
|
2257 |
{ |
|
2258 |
TUint startInMemory = (offsetInMapping >> KPageShift) + mapping->iStartIndex; |
|
2259 |
r = ((DVirtualPinMapping*)aPinObject)->Pin( memory, startInMemory, count, mapping->Permissions(), |
|
2260 |
mapping, mapInstanceCount); |
|
2261 |
if (r != KErrNone) |
|
2262 |
{// Failed to pin the memory so pin object is not required. |
|
2263 |
DestroyVirtualPinObject(aPinObject); |
|
2264 |
} |
|
2265 |
} |
|
2266 |
memory->Close(); |
|
2267 |
} |
|
2268 |
} |
|
2269 |
mapping->Close(); |
|
39
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2270 |
} |
0 | 2271 |
return r; |
2272 |
} |
|
2273 |
||
2274 |
void M::UnpinVirtualMemory(TVirtualPinObject* aPinObject) |
|
2275 |
{ |
|
2276 |
DVirtualPinMapping* mapping = (DVirtualPinMapping*)aPinObject; |
|
2277 |
if (mapping->IsAttached()) |
|
2278 |
mapping->Unpin(); |
|
2279 |
} |
|
2280 |
||
2281 |
void M::DestroyVirtualPinObject(TVirtualPinObject*& aPinObject) |
|
2282 |
{ |
|
2283 |
DVirtualPinMapping* mapping = (DVirtualPinMapping*)__e32_atomic_swp_ord_ptr(&aPinObject, 0); |
|
2284 |
if (mapping) |
|
2285 |
{ |
|
2286 |
if (mapping->IsAttached()) |
|
2287 |
mapping->Unpin(); |
|
2288 |
mapping->AsyncClose(); |
|
2289 |
} |
|
2290 |
} |
|
2291 |
||
39
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2292 |
// |
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2293 |
// Physical pinning |
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2294 |
// |
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2295 |
|
0 | 2296 |
TInt M::CreatePhysicalPinObject(TPhysicalPinObject*& aPinObject) |
2297 |
{ |
|
2298 |
aPinObject = (TPhysicalPinObject*)new DPhysicalPinMapping; |
|
2299 |
return aPinObject != NULL ? KErrNone : KErrNoMemory; |
|
2300 |
} |
|
2301 |
||
2302 |
TInt M::PinPhysicalMemory(TPhysicalPinObject* aPinObject, TLinAddr aStart, TUint aSize, TBool aReadOnly, |
|
2303 |
TPhysAddr& aAddress, TPhysAddr* aPages, TUint32& aMapAttr, TUint& aColour, DThread* aThread) |
|
2304 |
{ |
|
39
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2305 |
__ASSERT_CRITICAL; |
0 | 2306 |
TUint offsetInMapping; |
2307 |
TUint mapInstanceCount; |
|
2308 |
DMemoryMapping* mapping = MM::FindMappingInThread( (DMemModelThread*)aThread, |
|
2309 |
aStart, |
|
2310 |
aSize, |
|
2311 |
offsetInMapping, |
|
2312 |
mapInstanceCount); |
|
2313 |
TInt r = KErrBadDescriptor; |
|
2314 |
if (mapping) |
|
2315 |
{ |
|
2316 |
TInt count = ((aStart & KPageMask) + aSize + KPageMask) >> KPageShift; |
|
2317 |
||
2318 |
MmuLock::Lock(); |
|
2319 |
DMemoryObject* memory = mapping->Memory(); |
|
2320 |
if (mapInstanceCount == mapping->MapInstanceCount() && memory) |
|
2321 |
{ |
|
2322 |
memory->Open(); |
|
2323 |
MmuLock::Unlock(); |
|
2324 |
||
2325 |
TUint startInMemory = (offsetInMapping >> KPageShift) + mapping->iStartIndex; |
|
2326 |
TMappingPermissions permissions = aReadOnly ? ESupervisorReadOnly : ESupervisorReadWrite; |
|
2327 |
r = ((DPhysicalPinMapping*)aPinObject)->Pin(memory, startInMemory, count, permissions); |
|
2328 |
if (r == KErrNone) |
|
2329 |
{ |
|
2330 |
r = ((DPhysicalPinMapping*)aPinObject)->PhysAddr(0, count, aAddress, aPages); |
|
2331 |
if (r>=KErrNone) |
|
2332 |
{ |
|
2333 |
r = KErrNone; //Do not report discontiguous memory in return value. |
|
2334 |
const TMappingAttributes2& mapAttr2 = |
|
2335 |
MM::LegacyMappingAttributes(memory->Attributes(), mapping->Permissions()); |
|
2336 |
*(TMappingAttributes2*)&aMapAttr = mapAttr2; |
|
2337 |
} |
|
2338 |
else |
|
2339 |
UnpinPhysicalMemory(aPinObject); |
|
2340 |
} |
|
2341 |
memory->Close(); |
|
2342 |
} |
|
2343 |
else // mapping has been reused or no memory... |
|
2344 |
{ |
|
2345 |
MmuLock::Unlock(); |
|
2346 |
} |
|
2347 |
mapping->Close(); |
|
2348 |
} |
|
2349 |
aColour = (aStart >>KPageShift) & KPageColourMask; |
|
2350 |
return r; |
|
2351 |
} |
|
2352 |
||
2353 |
void M::UnpinPhysicalMemory(TPhysicalPinObject* aPinObject) |
|
2354 |
{ |
|
2355 |
DPhysicalPinMapping* mapping = (DPhysicalPinMapping*)aPinObject; |
|
2356 |
if (mapping->IsAttached()) |
|
2357 |
mapping->Unpin(); |
|
2358 |
} |
|
2359 |
||
2360 |
void M::DestroyPhysicalPinObject(TPhysicalPinObject*& aPinObject) |
|
2361 |
{ |
|
2362 |
DPhysicalPinMapping* mapping = (DPhysicalPinMapping*)__e32_atomic_swp_ord_ptr(&aPinObject, 0); |
|
2363 |
if (mapping) |
|
2364 |
{ |
|
2365 |
if (mapping->IsAttached()) |
|
2366 |
mapping->Unpin(); |
|
2367 |
mapping->AsyncClose(); |
|
2368 |
} |
|
2369 |
} |
|
2370 |
||
2371 |
||
39
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
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36
diff
changeset
|
2372 |
// |
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2373 |
// Kernel map and pin. |
5d2844f35677
Revision: 201004
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parents:
36
diff
changeset
|
2374 |
// |
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2375 |
|
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2376 |
TInt M::CreateKernelMapObject(TKernelMapObject*& aMapObject, TUint aMaxReserveSize) |
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2377 |
{ |
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2378 |
DKernelPinMapping* pinObject = new DKernelPinMapping(); |
5d2844f35677
Revision: 201004
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parents:
36
diff
changeset
|
2379 |
aMapObject = (TKernelMapObject*) pinObject; |
5d2844f35677
Revision: 201004
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parents:
36
diff
changeset
|
2380 |
if (pinObject == NULL) |
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2381 |
{ |
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2382 |
return KErrNoMemory; |
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2383 |
} |
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2384 |
// Ensure we reserve enough bytes for all possible alignments of the start and |
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2385 |
// end of the region to map. |
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2386 |
TUint reserveBytes = aMaxReserveSize? ((aMaxReserveSize + KPageMask) & ~KPageMask) + KPageSize : 0; |
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2387 |
TInt r = pinObject->Construct(reserveBytes); |
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2388 |
if (r != KErrNone) |
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2389 |
{// Failed so delete the kernel mapping object. |
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2390 |
pinObject->Close(); |
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2391 |
aMapObject = NULL; |
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2392 |
} |
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2393 |
return r; |
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2394 |
} |
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2395 |
|
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2396 |
|
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2397 |
TInt M::MapAndPinMemory(TKernelMapObject* aMapObject, DThread* aThread, TLinAddr aStart, |
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2398 |
TUint aSize, TUint aMapAttributes, TLinAddr& aKernelAddr, TPhysAddr* aPages) |
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2399 |
{ |
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2400 |
__ASSERT_CRITICAL; |
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2401 |
TUint offsetInMapping; |
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2402 |
TUint mapInstanceCount; |
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2403 |
DMemoryMapping* mapping = MM::FindMappingInThread( (DMemModelThread*)aThread, |
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2404 |
aStart, |
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2405 |
aSize, |
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2406 |
offsetInMapping, |
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2407 |
mapInstanceCount); |
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2408 |
TInt r = KErrBadDescriptor; |
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2409 |
if (mapping) |
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2410 |
{ |
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2411 |
DKernelPinMapping* kernelMap = (DKernelPinMapping*)aMapObject; |
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2412 |
TInt count = (((aStart + aSize + KPageMask) & ~KPageMask) - (aStart & ~KPageMask)) >> KPageShift; |
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2413 |
if (kernelMap->iReservePages && kernelMap->iReservePages < count) |
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2414 |
{ |
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2415 |
mapping->Close(); |
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2416 |
return KErrArgument; |
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2417 |
} |
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2418 |
|
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2419 |
MmuLock::Lock(); |
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2420 |
DMemoryObject* memory = mapping->Memory(); |
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2421 |
if (mapInstanceCount == mapping->MapInstanceCount() && memory) |
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2422 |
{ |
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2423 |
memory->Open(); |
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2424 |
MmuLock::Unlock(); |
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2425 |
|
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2426 |
TUint startInMemory = (offsetInMapping >> KPageShift) + mapping->iStartIndex; |
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2427 |
TBool readOnly = aMapAttributes & Kern::EKernelMap_ReadOnly; |
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2428 |
TMappingPermissions permissions = readOnly ? ESupervisorReadOnly : ESupervisorReadWrite; |
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2429 |
r = kernelMap->MapAndPin(memory, startInMemory, count, permissions); |
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2430 |
if (r == KErrNone) |
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2431 |
{ |
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2432 |
__NK_ASSERT_DEBUG(!kernelMap->IsUserMapping()); |
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2433 |
aKernelAddr = kernelMap->Base(); |
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2434 |
TPhysAddr contigAddr; // Ignore this value as aPages will be populated |
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2435 |
// whether the memory is contiguous or not. |
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2436 |
r = kernelMap->PhysAddr(0, count, contigAddr, aPages); |
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2437 |
if (r>=KErrNone) |
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2438 |
{ |
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2439 |
r = KErrNone; //Do not report discontiguous memory in return value. |
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2440 |
} |
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2441 |
else |
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2442 |
{ |
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2443 |
UnmapAndUnpinMemory((TKernelMapObject*)kernelMap); |
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2444 |
} |
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2445 |
} |
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2446 |
memory->Close(); |
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2447 |
} |
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2448 |
else // mapping has been reused or no memory... |
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2449 |
{ |
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2450 |
MmuLock::Unlock(); |
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2451 |
} |
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2452 |
mapping->Close(); |
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2453 |
} |
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2454 |
return r; |
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2455 |
} |
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2456 |
|
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2457 |
|
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2458 |
void M::UnmapAndUnpinMemory(TKernelMapObject* aMapObject) |
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2459 |
{ |
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2460 |
DKernelPinMapping* mapping = (DKernelPinMapping*)aMapObject; |
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2461 |
if (mapping->IsAttached()) |
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2462 |
mapping->UnmapAndUnpin(); |
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2463 |
} |
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2464 |
|
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2465 |
|
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2466 |
void M::DestroyKernelMapObject(TKernelMapObject*& aMapObject) |
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2467 |
{ |
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2468 |
DKernelPinMapping* mapping = (DKernelPinMapping*)__e32_atomic_swp_ord_ptr(&aMapObject, 0); |
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2469 |
if (mapping) |
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2470 |
{ |
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2471 |
if (mapping->IsAttached()) |
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2472 |
mapping->UnmapAndUnpin(); |
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2473 |
mapping->AsyncClose(); |
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2474 |
} |
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2475 |
} |
5d2844f35677
Revision: 201004
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
36
diff
changeset
|
2476 |
|
0 | 2477 |
|
2478 |
// |
|
2479 |
// Cache sync operations |
|
2480 |
// |
|
2481 |
||
2482 |
//@pre As for MASK_THREAD_STANDARD |
|
2483 |
void Mmu::SyncPhysicalMemoryBeforeDmaWrite(TPhysAddr* aPages, TUint aColour, TUint aOffset, TUint aSize, TUint32 aMapAttr) |
|
2484 |
{ |
|
2485 |
//Jump over the pages we do not have to sync |
|
2486 |
aPages += aOffset>>KPageShift; |
|
2487 |
aOffset &=KPageMask; |
|
2488 |
aColour = (aColour + (aOffset>>KPageShift)) & KPageColourMask; |
|
2489 |
||
2490 |
//Calculate page table entry for the temporary mapping. |
|
2491 |
TUint pteType = PteType(ESupervisorReadWrite,true); |
|
2492 |
TMappingAttributes2 mapAttr2(aMapAttr); |
|
2493 |
TPte pte = Mmu::BlankPte((TMemoryAttributes)mapAttr2.Type(), pteType); |
|
2494 |
||
2495 |
while (aSize) //A single pass of loop operates within page boundaries. |
|
2496 |
{ |
|
2497 |
TUint sizeInLoopPass = Min (KPageSize, aOffset+aSize) - aOffset; //The size of the region in this pass. |
|
2498 |
||
2499 |
NKern::ThreadEnterCS(); |
|
2500 |
Kern::MutexWait(*iPhysMemSyncMutex); |
|
2501 |
||
2502 |
TLinAddr linAddr = iPhysMemSyncTemp.Map(*aPages, aColour, pte); |
|
2503 |
CacheMaintenance::MakeCPUChangesVisible(linAddr+aOffset, sizeInLoopPass, aMapAttr, *aPages+aOffset); |
|
2504 |
iPhysMemSyncTemp.Unmap(); |
|
2505 |
||
2506 |
Kern::MutexSignal(*iPhysMemSyncMutex); |
|
2507 |
NKern::ThreadLeaveCS(); |
|
2508 |
||
2509 |
aSize-=sizeInLoopPass; // Remaining bytes to sync |
|
2510 |
aOffset=0; // In all the pages after the first, sync will always start with zero offset. |
|
2511 |
aPages++; // Point to the next page |
|
2512 |
aColour = (aColour+1) & KPageColourMask; |
|
2513 |
} |
|
2514 |
} |
|
2515 |
||
2516 |
//@pre As for MASK_THREAD_STANDARD |
|
2517 |
void Mmu::SyncPhysicalMemoryBeforeDmaRead(TPhysAddr* aPages, TUint aColour, TUint aOffset, TUint aSize, TUint32 aMapAttr) |
|
2518 |
{ |
|
2519 |
//Jump over the pages we do not have to sync |
|
2520 |
aPages += aOffset>>KPageShift; |
|
2521 |
aOffset &=KPageMask; |
|
2522 |
aColour = (aColour + (aOffset>>KPageShift)) & KPageColourMask; |
|
2523 |
||
2524 |
//Calculate page table entry for the temporary mapping. |
|
2525 |
TUint pteType = PteType(ESupervisorReadWrite,true); |
|
2526 |
TMappingAttributes2 mapAttr2(aMapAttr); |
|
2527 |
TPte pte = Mmu::BlankPte((TMemoryAttributes)mapAttr2.Type(), pteType); |
|
2528 |
||
2529 |
while (aSize) //A single pass of loop operates within page boundaries. |
|
2530 |
{ |
|
2531 |
TUint sizeInLoopPass = Min (KPageSize, aOffset+aSize) - aOffset; //The size of the region in this pass. |
|
2532 |
||
2533 |
NKern::ThreadEnterCS(); |
|
2534 |
Kern::MutexWait(*iPhysMemSyncMutex); |
|
2535 |
||
2536 |
TLinAddr linAddr = iPhysMemSyncTemp.Map(*aPages, aColour, pte); |
|
2537 |
CacheMaintenance::PrepareMemoryForExternalWrites(linAddr+aOffset, sizeInLoopPass, aMapAttr, *aPages+aOffset); |
|
2538 |
iPhysMemSyncTemp.Unmap(); |
|
2539 |
||
2540 |
Kern::MutexSignal(*iPhysMemSyncMutex); |
|
2541 |
NKern::ThreadLeaveCS(); |
|
2542 |
||
2543 |
aSize-=sizeInLoopPass; // Remaining bytes to sync |
|
2544 |
aOffset=0; // In all the pages after the first, sync will always start with zero offset. |
|
2545 |
aPages++; // Point to the next page |
|
2546 |
aColour = (aColour+1) & KPageColourMask; |
|
2547 |
} |
|
2548 |
} |
|
2549 |
||
2550 |
//@pre As for MASK_THREAD_STANDARD |
|
2551 |
void Mmu::SyncPhysicalMemoryAfterDmaRead(TPhysAddr* aPages, TUint aColour, TUint aOffset, TUint aSize, TUint32 aMapAttr) |
|
2552 |
{ |
|
2553 |
//Jump over the pages we do not have to sync |
|
2554 |
aPages += aOffset>>KPageShift; |
|
2555 |
aOffset &=KPageMask; |
|
2556 |
aColour = (aColour + (aOffset>>KPageShift)) & KPageColourMask; |
|
2557 |
||
2558 |
//Calculate page table entry for the temporary mapping. |
|
2559 |
TUint pteType = PteType(ESupervisorReadWrite,true); |
|
2560 |
TMappingAttributes2 mapAttr2(aMapAttr); |
|
2561 |
TPte pte = Mmu::BlankPte((TMemoryAttributes)mapAttr2.Type(), pteType); |
|
2562 |
||
2563 |
while (aSize) //A single pass of loop operates within page boundaries. |
|
2564 |
{ |
|
2565 |
TUint sizeInLoopPass = Min (KPageSize, aOffset+aSize) - aOffset; //The size of the region in this pass. |
|
2566 |
||
2567 |
NKern::ThreadEnterCS(); |
|
2568 |
Kern::MutexWait(*iPhysMemSyncMutex); |
|
2569 |
||
2570 |
TLinAddr linAddr = iPhysMemSyncTemp.Map(*aPages, aColour, pte); |
|
2571 |
CacheMaintenance::MakeExternalChangesVisible(linAddr+aOffset, sizeInLoopPass, aMapAttr, *aPages+aOffset); |
|
2572 |
iPhysMemSyncTemp.Unmap(); |
|
2573 |
||
2574 |
Kern::MutexSignal(*iPhysMemSyncMutex); |
|
2575 |
NKern::ThreadLeaveCS(); |
|
2576 |
||
2577 |
aSize-=sizeInLoopPass; // Remaining bytes to sync |
|
2578 |
aOffset=0; // In all the pages after the first, sync will always start with zero offset. |
|
2579 |
aPages++; // Point to the next page |
|
2580 |
aColour = (aColour+1) & KPageColourMask; |
|
2581 |
} |
|
2582 |
} |
|
2583 |
||
2584 |
EXPORT_C TInt Cache::SyncPhysicalMemoryBeforeDmaWrite(TPhysAddr* aPages, TUint aColour, TUint aOffset, TUint aSize, TUint32 aMapAttr) |
|
2585 |
{ |
|
2586 |
CHECK_PRECONDITIONS(MASK_THREAD_STANDARD,"Cache::SyncPhysicalMemoryBeforeDmaWrite"); |
|
2587 |
TheMmu.SyncPhysicalMemoryBeforeDmaWrite(aPages, aColour, aOffset, aSize, aMapAttr); |
|
2588 |
return KErrNone; |
|
2589 |
} |
|
2590 |
||
2591 |
EXPORT_C TInt Cache::SyncPhysicalMemoryBeforeDmaRead(TPhysAddr* aPages, TUint aColour, TUint aOffset, TUint aSize, TUint32 aMapAttr) |
|
2592 |
{ |
|
2593 |
CHECK_PRECONDITIONS(MASK_THREAD_STANDARD,"Cache::SyncPhysicalMemoryBeforeDmaRead"); |
|
2594 |
TheMmu.SyncPhysicalMemoryBeforeDmaRead(aPages, aColour, aOffset, aSize, aMapAttr); |
|
2595 |
return KErrNone; |
|
2596 |
} |
|
2597 |
||
2598 |
EXPORT_C TInt Cache::SyncPhysicalMemoryAfterDmaRead(TPhysAddr* aPages, TUint aColour, TUint aOffset, TUint aSize, TUint32 aMapAttr) |
|
2599 |
{ |
|
2600 |
CHECK_PRECONDITIONS(MASK_THREAD_STANDARD,"Cache::SyncPhysicalMemoryAfterDmaRead"); |
|
2601 |
TheMmu.SyncPhysicalMemoryAfterDmaRead(aPages, aColour, aOffset, aSize, aMapAttr); |
|
2602 |
return KErrNone; |
|
2603 |
} |