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replaced
40 // If client assumes Master mode, should be informed not available |
40 // If client assumes Master mode, should be informed not available |
41 #endif/*MASTER_MODE*/ |
41 #endif/*MASTER_MODE*/ |
42 #endif/*STANDALONE_CHANNEL*/ |
42 #endif/*STANDALONE_CHANNEL*/ |
43 |
43 |
44 |
44 |
45 #if defined(MASTER_MODE) |
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46 const TInt KI2cThreadPriority = 5; // Arbitrary, can be 0-7, 7 highest |
45 const TInt KI2cThreadPriority = 5; // Arbitrary, can be 0-7, 7 highest |
47 #endif |
|
48 |
46 |
49 const TInt16 KI2cSlaveChannelIdBase = 0x1D00; // Arbitrary |
47 const TInt16 KI2cSlaveChannelIdBase = 0x1D00; // Arbitrary |
50 |
48 |
51 const TInt KI2cSlaveAsyncDelaySim = 20; // Arbitrary delay, for timer to simulate asynchronous processing |
49 const TInt KI2cSlaveAsyncDelaySim = 20; // Arbitrary delay, for timer to simulate asynchronous processing |
52 |
50 |
53 #ifdef MASTER_MODE |
51 //Macros MASTER_MODE and SLAVE_MODE are intentionally omitted from this file |
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52 //This is for master and slave stubs to exercise the channel class, |
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53 //and we need these stubs for code coverage tests. |
54 class DSimulatedIicBusChannelMasterI2c : public DIicBusChannelMaster |
54 class DSimulatedIicBusChannelMasterI2c : public DIicBusChannelMaster |
55 { |
55 { |
56 // platform specific implementation |
56 // platform specific implementation |
57 public: |
57 public: |
58 #ifdef STANDALONE_CHANNEL |
58 #ifdef STANDALONE_CHANNEL |
85 TBool iReqDelayed; |
85 TBool iReqDelayed; |
86 }; |
86 }; |
87 #ifndef STANDALONE_CHANNEL |
87 #ifndef STANDALONE_CHANNEL |
88 TInt8 DSimulatedIicBusChannelMasterI2c::iCurrentChanNum = KI2cChannelNumBase; // Initialise static member of DSimulatedIicBusChannelMasterI2c |
88 TInt8 DSimulatedIicBusChannelMasterI2c::iCurrentChanNum = KI2cChannelNumBase; // Initialise static member of DSimulatedIicBusChannelMasterI2c |
89 #endif |
89 #endif |
90 #endif/*MASTER_MODE*/ |
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91 |
90 |
92 #ifdef SLAVE_MODE |
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93 class DSimulatedIicBusChannelSlaveI2c : public DIicBusChannelSlave |
91 class DSimulatedIicBusChannelSlaveI2c : public DIicBusChannelSlave |
94 { |
92 { |
95 public: |
93 public: |
96 // platform specific implementation |
94 // platform specific implementation |
97 #ifdef STANDALONE_CHANNEL |
95 #ifdef STANDALONE_CHANNEL |
148 TInt iRxTxTrigger; |
146 TInt iRxTxTrigger; |
149 |
147 |
150 NTimer iSlaveTimer; // Used to simulate an asynchronous capture operation |
148 NTimer iSlaveTimer; // Used to simulate an asynchronous capture operation |
151 TSpinLock iEventSpinLock; // To serialise simulated bus events - Rx, Tx or Rx+Tx |
149 TSpinLock iEventSpinLock; // To serialise simulated bus events - Rx, Tx or Rx+Tx |
152 }; |
150 }; |
153 #endif/*SLAVE_MODE*/ |
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154 |
151 |
155 #if defined(MASTER_MODE) && defined(SLAVE_MODE) |
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156 class DSimulatedIicBusChannelMasterSlaveI2c : public DIicBusChannelMasterSlave |
152 class DSimulatedIicBusChannelMasterSlaveI2c : public DIicBusChannelMasterSlave |
157 { |
153 { |
158 public: |
154 public: |
159 #ifdef STANDALONE_CHANNEL |
155 #ifdef STANDALONE_CHANNEL |
160 IMPORT_C |
156 IMPORT_C |
161 #endif |
157 #endif |
162 DSimulatedIicBusChannelMasterSlaveI2c(TBusType /*aBusType*/, TChannelDuplex aChanDuplex, DSimulatedIicBusChannelMasterI2c* aMasterChan, DSimulatedIicBusChannelSlaveI2c* aSlaveChan); |
158 DSimulatedIicBusChannelMasterSlaveI2c(TBusType /*aBusType*/, TChannelDuplex aChanDuplex, DSimulatedIicBusChannelMasterI2c* aMasterChan, DSimulatedIicBusChannelSlaveI2c* aSlaveChan); |
163 |
159 |
164 TInt StaticExtension(TUint aFunction, TAny* aParam1, TAny* aParam2); |
160 TInt StaticExtension(TUint aFunction, TAny* aParam1, TAny* aParam2); |
165 }; |
161 }; |
166 #endif/*(MASTER_MODE) && (SLAVE_MODE)*/ |
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167 |
162 |
168 #endif /*I2C_H_*/ |
163 #endif /*I2C_H_*/ |