40 volatile TInt iCrashState; // 0=normal, 1=this CPU faulted, 2=this CPU has received an NMI and halted |
40 volatile TInt iCrashState; // 0=normal, 1=this CPU faulted, 2=this CPU has received an NMI and halted |
41 TUint32 iAPICID; // Local APIC ID for this CPU (starts at -1) |
41 TUint32 iAPICID; // Local APIC ID for this CPU (starts at -1) |
42 volatile TInt iIrqNestCount; // IRQ nest count for this CPU (starts at -1) |
42 volatile TInt iIrqNestCount; // IRQ nest count for this CPU (starts at -1) |
43 TLinAddr iIrqStackTop; // Top of IRQ stack for this CPU |
43 TLinAddr iIrqStackTop; // Top of IRQ stack for this CPU |
44 TX86Tss* iTss; // Address of TSS for this CPU |
44 TX86Tss* iTss; // Address of TSS for this CPU |
45 volatile TUint32 iCpuFreqM; // CPU frequency / Max CPU frequency (mantissa, bit 31=1) f/fmax=M/2^(S+32) <=1 |
45 SRatioInv iCpuFreqRI; // Ratio of CPU frequency to maximum possible CPU frequency |
46 volatile TInt iCpuFreqS; // CPU frequency / Max CPU frequency (shift) |
46 SRatioInv iTimerFreqRI; // Ratio of CPU local timer frequency to maximum possible |
47 volatile TUint32 iCpuPeriodM; // Max CPU frequency / CPU frequency (mantissa, bit 31=1) fmax/f=M/2^S >=1 |
47 |
48 volatile TInt iCpuPeriodS; // Max CPU frequency / CPU frequency (shift) |
|
49 volatile TUint32 iNTimerFreqM; // Nominal Timer frequency / Max Timer frequency (mantissa, bit 31=1) f/fmax=M/2^(S+32) <=1 |
|
50 volatile TInt iNTimerFreqS; // Nominal Timer frequency / Max Timer frequency (shift) |
|
51 volatile TUint32 iNTimerPeriodM; // Nominal Max Timer frequency / Timer frequency (mantissa, bit 31=1) fmax/f=M/2^S >=1 |
|
52 volatile TInt iNTimerPeriodS; // Nominal Max Timer frequency / Timer frequency (shift) |
|
53 volatile TUint32 iTimerFreqM; // Timer frequency / Max Timer frequency (mantissa, bit 31=1) f/fmax=M/2^(S+32) <=1 |
|
54 volatile TInt iTimerFreqS; // Timer frequency / Max Timer frequency (shift) |
|
55 volatile TUint32 iTimerPeriodM; // Max Timer frequency / Timer frequency (mantissa, bit 31=1) fmax/f=M/2^S >=1 |
|
56 volatile TInt iTimerPeriodS; // Max Timer frequency / Timer frequency (shift) |
|
57 volatile TUint64HL iTimestampOffset; // 64 bit value to add to CPU TSC to give NKern::Timestamp() |
48 volatile TUint64HL iTimestampOffset; // 64 bit value to add to CPU TSC to give NKern::Timestamp() |
58 |
49 |
59 TUint32 iSSXP2[32]; |
50 TUint32 iSSXP2[36]; |
60 TUint64 iSSXP3; // one 64 bit value to guarantee alignment |
51 TUint64 iSSXP3; // one 64 bit value to guarantee alignment |
61 }; |
52 }; |
62 |
53 |
63 // TScheduler member data |
54 // TScheduler member data |
64 struct TSchedulerX |
55 struct TSchedulerX |
65 { |
56 { |
66 TUint64 iTimerMax; // Maximum per-CPU timer frequency (after prescaling) |
57 TUint64 iTimerMax; // Maximum per-CPU timer frequency (after prescaling) |
67 TUint32 iSXP[14]; |
58 TUint32 iSXP[30]; |
68 }; |
59 }; |
69 |
60 |
70 |
61 |
71 #define CRASH_IPI_VECTOR 0x27 |
62 #define CRASH_IPI_VECTOR 0x27 |
72 #define RESCHED_IPI_VECTOR 0x28 |
63 #define RESCHED_IPI_VECTOR 0x28 |