kernel/eka/memmodel/epoc/flexible/arm/xsched.cia
changeset 36 538db54a451d
parent 0 a41df078684a
equal deleted inserted replaced
34:f497542af8e4 36:538db54a451d
   174 	asm("bne got_alias");
   174 	asm("bne got_alias");
   175 	__JUMP(,lr);
   175 	__JUMP(,lr);
   176 
   176 
   177 	// restore alias...
   177 	// restore alias...
   178 	asm("got_alias:");
   178 	asm("got_alias:");
       
   179 	// Disable interrupts so setting the alias pde is must complete before
       
   180 	// Mmu::RemoveAliasesForPageTable() can execute the alias IPI and vice 
       
   181 	// versa.
       
   182 	__ASM_CLI();						// interrupts off
   179 	asm("ldr r8, [r3, #%a0]" : : "i" (_FOFF(DMemModelThread, iAliasPdePtr)-_FOFF(DThread, iNThread)) );
   183 	asm("ldr r8, [r3, #%a0]" : : "i" (_FOFF(DMemModelThread, iAliasPdePtr)-_FOFF(DThread, iNThread)) );
   180 	asm("ldr r7, [r3, #%a0]" : : "i" (_FOFF(DMemModelThread, iAliasPde)-_FOFF(DThread, iNThread)) );
   184 	asm("ldr r7, [r3, #%a0]" : : "i" (_FOFF(DMemModelThread, iAliasPde)-_FOFF(DThread, iNThread)) );
   181 	asm("orr r6, r6, r4");				// put ASID into address for TLB flush later...
   185 	asm("orr r6, r6, r4");				// put ASID into address for TLB flush later...
   182 	asm("str r7, [r8]");				// restore PDE for alias
   186 	asm("str r7, [r8]");				// restore PDE for alias
       
   187 	__ASM_STI();						// interrupts back on
   183 	
   188 	
   184 	CACHE_MAINTENANCE_PDE_PTE_UPDATED(r8);
   189 	CACHE_MAINTENANCE_PDE_PTE_UPDATED(r8);
   185 
   190 
   186 #if defined(__CPU_ARM11MP__) // why?...
   191 #if defined(__CPU_ARM11MP__) // why?...
   187 	asm("mcr p15, 0, r6, c8, c7, 3 ");	// flush TLB for aliased page
   192 	asm("mcr p15, 0, r6, c8, c7, 3 ");	// flush TLB for aliased page