89 inline TCounter TIMER() |
89 inline TCounter TIMER() |
90 { return *(volatile TUint*)(KHwCounterTimer1+KHoTimerValue)&0xffff;} |
90 { return *(volatile TUint*)(KHwCounterTimer1+KHoTimerValue)&0xffff;} |
91 #endif |
91 #endif |
92 #ifdef __NE1_TB__ |
92 #ifdef __NE1_TB__ |
93 inline TCounter TIMER() |
93 inline TCounter TIMER() |
94 { return NETimer::Timer(2).iTimerCount; } |
94 { return NETimer::Timer(5).iTimerCount; } |
95 #endif |
95 #endif |
96 #if defined(__EPOC32__) && defined(__CPU_X86) |
96 #if defined(__EPOC32__) && defined(__CPU_X86) |
97 TCounter TIMER(); |
97 TCounter TIMER(); |
98 void SetUpTimerChannel2(); |
98 void SetUpTimerChannel2(); |
99 #endif |
99 #endif |
186 #endif |
186 #endif |
187 #if defined(__MAWD__) || defined(__MEIG__) |
187 #if defined(__MAWD__) || defined(__MEIG__) |
188 return aTicks*500; // 2kHz tick |
188 return aTicks*500; // 2kHz tick |
189 #endif |
189 #endif |
190 #if defined(__NE1_TB__) |
190 #if defined(__NE1_TB__) |
191 NETimer& T2 = NETimer::Timer(2); |
191 NETimer& T5 = NETimer::Timer(5); |
192 TUint prescale = __e32_find_ms1_32(T2.iPrescaler & 0x3f); |
192 TUint prescale = __e32_find_ms1_32(T5.iPrescaler & 0x3f); |
193 TInt f = 66666667 >> prescale; |
193 TInt f = 66666667 >> prescale; |
194 TInt64 x = I64LIT(1000000); |
194 TInt64 x = I64LIT(1000000); |
195 x *= TInt64(aTicks); |
195 x *= TInt64(aTicks); |
196 x += TInt64(f>>1); |
196 x += TInt64(f>>1); |
197 x /= TInt64(f); |
197 x /= TInt64(f); |
262 TRvEmuBoard::SetTimerMode(KHwCounterTimer1, TRvEmuBoard::ETimerModeFreeRunning); |
262 TRvEmuBoard::SetTimerMode(KHwCounterTimer1, TRvEmuBoard::ETimerModeFreeRunning); |
263 TRvEmuBoard::SetTimerPreScale(KHwCounterTimer1, TRvEmuBoard::ETimerPreScaleDiv256);// 3.90625kHz wrap 16.777s |
263 TRvEmuBoard::SetTimerPreScale(KHwCounterTimer1, TRvEmuBoard::ETimerPreScaleDiv256);// 3.90625kHz wrap 16.777s |
264 TRvEmuBoard::EnableTimer(KHwCounterTimer1, TRvEmuBoard::EEnable); |
264 TRvEmuBoard::EnableTimer(KHwCounterTimer1, TRvEmuBoard::EEnable); |
265 #endif |
265 #endif |
266 #if defined(__NE1_TB__) |
266 #if defined(__NE1_TB__) |
267 // nothing to do since variant has already set up timer |
267 // set up timer 5 |
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268 NETimer& T5 = NETimer::Timer(5); |
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269 |
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270 T5.iTimerCtrl = 0; // stop and reset timer 5 |
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271 T5.iGTICtrl = 0; // disable timer 5 capture modes |
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272 __e32_io_completion_barrier(); |
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273 T5.iPrescaler = KNETimerPrescaleBy32; // Timer 5 prescaled by 32 (=2.0833MHz) |
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274 __e32_io_completion_barrier(); |
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275 T5.iGTInterruptEnable = 0; |
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276 __e32_io_completion_barrier(); |
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277 T5.iGTInterrupt = KNETimerGTIInt_All; |
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278 __e32_io_completion_barrier(); |
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279 T5.iTimerCtrl = KNETimerCtrl_CE; // deassert reset for timer 5, count still stopped |
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280 __e32_io_completion_barrier(); |
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281 T5.iTimerReset = 0xffffffffu; // timer 5 wraps after 2^32 counts |
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282 __e32_io_completion_barrier(); |
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283 T5.iTimerCtrl = KNETimerCtrl_CE | KNETimerCtrl_CAE; // start timer 5 |
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284 __e32_io_completion_barrier(); |
268 #endif |
285 #endif |
269 #if defined(__EPOC32__) && defined(__CPU_X86) |
286 #if defined(__EPOC32__) && defined(__CPU_X86) |
270 // Set up timer channel 2 as free running counter at 14318180/12 Hz |
287 // Set up timer channel 2 as free running counter at 14318180/12 Hz |
271 SetUpTimerChannel2(); |
288 SetUpTimerChannel2(); |
272 #endif |
289 #endif |