kernel/eka/euser/epoc/arm/uc_gcc.cia
changeset 0 a41df078684a
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-1:000000000000 0:a41df078684a
       
     1 // Copyright (c) 1995-2009 Nokia Corporation and/or its subsidiary(-ies).
       
     2 // All rights reserved.
       
     3 // This component and the accompanying materials are made available
       
     4 // under the terms of the License "Eclipse Public License v1.0"
       
     5 // which accompanies this distribution, and is available
       
     6 // at the URL "http://www.eclipse.org/legal/epl-v10.html".
       
     7 //
       
     8 // Initial Contributors:
       
     9 // Nokia Corporation - initial contribution.
       
    10 //
       
    11 // Contributors:
       
    12 //
       
    13 // Description:
       
    14 // e32\euser\epoc\arm\uc_gcc.cia
       
    15 // 
       
    16 //
       
    17 
       
    18 #include <u32std.h>
       
    19 #include <e32math.h>
       
    20 #include "uc_std.h"
       
    21 
       
    22 extern "C" {
       
    23 EXPORT_C __NAKED__ long long __fixdfdi(double /*aVal*/)
       
    24 	{
       
    25 	// r0:r1 contains argument, return result in r1:r0
       
    26 #ifdef __DOUBLE_WORDS_SWAPPED__
       
    27 	asm("mov r2, r0 ");					// save sign
       
    28 #else
       
    29 	asm("mov r2, r1 ");					// save sign
       
    30 	asm("mov r1, r0 ");
       
    31 	asm("mov r0, r2 ");
       
    32 #endif
       
    33 	asm("bic r0, r0, #0x80000000 ");	// remove sign bit from r0
       
    34 	asm("mov r3, #0x400 ");				// r3=0x43E = exponent of 2^63
       
    35 	asm("orr r3, r3, #0x3E ");
       
    36 	asm("subs r3, r3, r0, lsr #20 ");	// r3=0x43E-exponent = number of right shifts needed
       
    37 	asm("ble 1f ");						// branch to saturate result if exp>=0x43E
       
    38 	asm("cmp r3, #63 ");
       
    39 	asm("bgt 2f ");						// branch to produce zero result if exp<0x3FF
       
    40 	asm("mov r12, r0, lsl #11 ");		// left justify mantissa in r1:r0
       
    41 	asm("orr r12, r12, r1, lsr #21 ");
       
    42 	asm("mov r0, r1, lsl #11 ");
       
    43 	asm("orr r1, r12, #0x80000000 ");	// put in implied integer bit
       
    44 	asm("cmp r3, #32 ");				// check if >=32 shifts needed
       
    45 	asm("subge r3, r3, #32 ");			// if so reduce count by 32
       
    46 	asm("movge r0, r1, lsr r3 ");		// and shift right by (32+r3)
       
    47 	asm("movge r1, #0 ");
       
    48 	asm("rsblt r12, r3, #32 ");			// else shift right by r3
       
    49 	asm("movlt r0, r0, lsr r3 ");
       
    50 	asm("orrlt r0, r0, r1, lsl r12 ");
       
    51 	asm("movlt r1, r1, lsr r3 ");
       
    52 	asm("movs r2, r2 ");				// test sign bit
       
    53 	__JUMP(pl,lr);						// if +ve, finished
       
    54 	asm("rsbs r0, r0, #0 ");			// if -ve, negate
       
    55 	asm("rsc r1, r1, #0 ");
       
    56 	__JUMP(,lr);
       
    57 	asm("2: ");
       
    58 	asm("mov r0, #0 ");
       
    59 	asm("mov r1, #0 ");
       
    60 	__JUMP(,lr);						// return 0
       
    61 	asm("1: ");							// produce saturated result
       
    62 	asm("mvn r1, r2, asr #32 ");		// if +ve, r1=FFFFFFFF else r1=0
       
    63 	asm("mov r0, r1 ");					//
       
    64 	asm("eor r1, r1, #0x80000000 ");	// if +ve, r1:r0=7FFFFFFF FFFFFFFF else r1:r0=80000000 00000000
       
    65 	__JUMP(,lr);
       
    66 	}
       
    67 
       
    68 EXPORT_C __NAKED__ double __floatdidf(long long /*a*/)
       
    69 //
       
    70 // Convert 64-bit signed integer to double
       
    71 //
       
    72 	{
       
    73 	// r1:r0 = input, return output in r0,r1
       
    74 	asm("mov r2, #0x40000000 ");		// r2 will hold result exponent
       
    75 	asm("and r12, r1, #0x80000000 ");	// save sign in r12
       
    76 	asm("cmp r1, #0 ");					// test for MS word negative or zero
       
    77 	asm("orr r2, r2, #0x01E00000 ");	// r2=0x41E=exponent of 2^31
       
    78 	asm("bpl 1f ");						// skip if +
       
    79 	asm("rsbs r0, r0, #0 ");			// else negate
       
    80 	asm("rscs r1, r1, #0 ");
       
    81 	asm("1: ");
       
    82 	asm("bne 2f ");						// branch if ms word nonzero
       
    83 	asm("cmp r0, #0 ");					// check if ls word also zero
       
    84 	__JUMP(eq,lr);
       
    85 	asm("cmp r0, #0x10000 ");			// normalise r1 and adjust exponent
       
    86 	asm("movcc r0, r0, lsl #16 ");
       
    87 	asm("subcc r2, r2, #0x01000000 ");
       
    88 	asm("cmp r0, #0x1000000 ");
       
    89 	asm("movcc r0, r0, lsl #8 ");
       
    90 	asm("subcc r2, r2, #0x00800000 ");
       
    91 	asm("cmp r0, #0x10000000 ");
       
    92 	asm("movcc r0, r0, lsl #4 ");
       
    93 	asm("subcc r2, r2, #0x00400000 ");
       
    94 	asm("cmp r0, #0x40000000 ");
       
    95 	asm("movcc r0, r0, lsl #2 ");
       
    96 	asm("subcc r2, r2, #0x00200000 ");
       
    97 	asm("cmp r0, #0x80000000 ");
       
    98 	asm("movcc r0, r0, lsl #1 ");
       
    99 	asm("subcc r2, r2, #0x00100000 ");
       
   100 	asm("bic r1, r0, #0x80000000 ");	// remove implied integer bit
       
   101 	asm("orr r0, r2, r12 ");			// sign+exponent into r0
       
   102 	asm("orr r0, r0, r1, lsr #11 ");	// top 21 mantissa bits into r0
       
   103 	asm("mov r1, r1, lsl #21 ");		// remaining 11 mantissa bits in r1
       
   104 	asm("b 0f ");
       
   105 	asm("2: ");							// come here if ms word non zero
       
   106 	asm("mov r3, #32 ");				// r3=32-shift count
       
   107 	asm("cmp r1, #0x00010000 ");
       
   108 	asm("movcc r1, r1, lsl #16 ");
       
   109 	asm("subcc r3, r3, #16 ");
       
   110 	asm("cmp r1, #0x01000000 ");
       
   111 	asm("movcc r1, r1, lsl #8 ");
       
   112 	asm("subcc r3, r3, #8 ");
       
   113 	asm("cmp r1, #0x10000000 ");
       
   114 	asm("movcc r1, r1, lsl #4 ");
       
   115 	asm("subcc r3, r3, #4 ");
       
   116 	asm("cmp r1, #0x40000000 ");
       
   117 	asm("movcc r1, r1, lsl #2 ");
       
   118 	asm("subcc r3, r3, #2 ");
       
   119 	asm("cmp r1, #0x80000000 ");
       
   120 	asm("movcc r1, r1, lsl #1 ");
       
   121 	asm("subcc r3, r3, #1 ");
       
   122 	asm("add r2, r2, r3, lsl #20 ");	// r2 now holds result exponent
       
   123 	asm("orr r1, r1, r0, lsr r3 ");		// normalise r1:r0
       
   124 	asm("rsb r3, r3, #32 ");
       
   125 	asm("mov r0, r0, lsl r3 ");
       
   126 	asm("mov r3, r0, lsl #21 ");		// rounding bits into r3
       
   127 	asm("cmp r3, #0x80000000 ");		// C=1 to round up or halfway, C=0 to round down
       
   128 	asm("moveqs r3, r0, lsr #12 ");		// if exactly half-way, carry=LSB of mantissa
       
   129 	asm("addcss r0, r0, #0x800 ");		// if C=1, round up
       
   130 	asm("adcs r1, r1, #0 ");
       
   131 	asm("addcs r2, r2, #0x00100000 ");	// if carry, increment exponent
       
   132 	asm("bic r3, r1, #0x80000000 ");	// remove implied integer bit
       
   133 	asm("mov r1, r0, lsr #11 ");		// shift mantissa down to correct position
       
   134 	asm("orr r1, r1, r3, lsl #21 ");
       
   135 	asm("orr r0, r2, r3, lsr #11 ");	// and put in exponent
       
   136 	asm("orr r0, r0, r12 ");			// put in sign bit
       
   137 	asm("0: ");
       
   138 #ifndef __DOUBLE_WORDS_SWAPPED__
       
   139 	asm("mov r2, r1 ");					// save sign
       
   140 	asm("mov r1, r0 ");
       
   141 	asm("mov r0, r2 ");
       
   142 #endif
       
   143 	__JUMP(,lr);
       
   144 	}
       
   145 }
       
   146