kernel/eka/include/nkernsmp/x86/nk_plat.h
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     1 // Copyright (c) 2007-2009 Nokia Corporation and/or its subsidiary(-ies).
       
     2 // All rights reserved.
       
     3 // This component and the accompanying materials are made available
       
     4 // under the terms of the License "Eclipse Public License v1.0"
       
     5 // which accompanies this distribution, and is available
       
     6 // at the URL "http://www.eclipse.org/legal/epl-v10.html".
       
     7 //
       
     8 // Initial Contributors:
       
     9 // Nokia Corporation - initial contribution.
       
    10 //
       
    11 // Contributors:
       
    12 //
       
    13 // Description:
       
    14 // e32\include\nkernsmp\x86\nk_plat.h
       
    15 // 
       
    16 // WARNING: This file contains some APIs which are internal and are subject
       
    17 //          to change without notice. Such APIs should therefore not be used
       
    18 //          outside the Kernel and Hardware Services package.
       
    19 //
       
    20 
       
    21 /**
       
    22  @file
       
    23  @internalComponent
       
    24 */
       
    25 
       
    26 #ifndef __NK_X86_H__
       
    27 #define __NK_X86_H__
       
    28 #include <nk_cpu.h>
       
    29 
       
    30 // TSubScheduler member data
       
    31 #define	i_IrqCount			iExtras[9]		// count of interrupts handled
       
    32 #define	i_ExcInfo			iExtras[10]		// pointer to exception info for crash debugger
       
    33 #define	i_CrashState		iExtras[11]		// 0=normal, 1=this CPU faulted, 2=this CPU has received an NMI and halted
       
    34 #define	i_APICID			iExtras[12]		// Local APIC ID for this CPU (starts at -1)
       
    35 #define	i_IrqNestCount		iExtras[13]		// IRQ nest count for this CPU (starts at -1)
       
    36 #define	i_IrqStackTop		iExtras[14]		// Top of IRQ stack for this CPU
       
    37 #define	i_Tss				iExtras[15]		// Address of TSS for this CPU
       
    38 #define	i_TimerMultF		iExtras[16]		// Timer frequency / Max Timer frequency * 2^32
       
    39 #define	i_TimerMultI		iExtras[17]		// Max Timer frequency / Timer frequency * 2^24
       
    40 #define	i_CpuMult			iExtras[18]		// CPU frequency / Max CPU frequency * 2^32
       
    41 #define	i_TimestampOffset	iExtras[20]		// 64 bit value to add to CPU TSC to give NKern::Timestamp()
       
    42 #define	i_TimestampOffsetL	iExtras[20]		// 
       
    43 #define	i_TimestampOffsetH	iExtras[21]		// 
       
    44 
       
    45 // TScheduler member data
       
    46 #define	i_TimerMax		iExtras[16]		// Maximum per-CPU timer frequency (after prescaling)
       
    47 
       
    48 #define CRASH_IPI_VECTOR			0x27
       
    49 #define RESCHED_IPI_VECTOR			0x28
       
    50 #define TIMESLICE_VECTOR			0x29
       
    51 #define GENERIC_IPI_VECTOR			0x2A
       
    52 #define TRANSFERRED_IRQ_VECTOR		0x2E
       
    53 #define SPURIOUS_INTERRUPT_VECTOR	0x2F
       
    54 
       
    55 extern "C" TSubScheduler* SubSchedulerLookupTable[256];		// look up subscheduler from APIC ID
       
    56 
       
    57 #define IRQ_STACK_SIZE	1024
       
    58 
       
    59 //#define __SCHEDULER_MACHINE_CODED__
       
    60 //#define __DFC_MACHINE_CODED__
       
    61 //#define __MSTIM_MACHINE_CODED__
       
    62 //#define __PRI_LIST_MACHINE_CODED__
       
    63 //#define __FAST_SEM_MACHINE_CODED__
       
    64 //#define __FAST_MUTEX_MACHINE_CODED__
       
    65 
       
    66 class TX86RegSet;
       
    67 class NThread : public NThreadBase
       
    68 	{
       
    69 public:
       
    70 	TInt Create(SNThreadCreateInfo& anInfo, TBool aInitial);
       
    71 	inline void Stillborn()
       
    72 		{}
       
    73 	void GetUserContext(TX86RegSet& aContext, TUint32& aAvailRegMask);
       
    74 	void SetUserContext(const TX86RegSet& aContext, TUint32& aRegMask);
       
    75 	void GetSystemContext(TX86RegSet& aContext, TUint32& aAvailRegMask);
       
    76 	void CompleteContextSave();
       
    77 public:
       
    78 	TUint64	iCoprocessorState[64];	// state of FPU, SSE, SSE2
       
    79 	};
       
    80 
       
    81 __ASSERT_COMPILE(!(_FOFF(NThread,iCoprocessorState)&7));
       
    82 
       
    83 
       
    84 // Positions of registers on stack, relative to saved SP
       
    85 struct SThreadReschedStack
       
    86 	{
       
    87 	TUint32 iCR0;
       
    88 	TUint32 iReschedFlag;
       
    89 	TUint32 iEip;
       
    90 	TUint32 iReason;
       
    91 	};
       
    92 
       
    93 // Registers pushed on stack for all exceptions other than slow exec
       
    94 struct SThreadExcStack
       
    95 	{
       
    96 	TUint32	iEcx;
       
    97 	TUint32	iEdx;
       
    98 	TUint32	iEbx;
       
    99 	TUint32	iEsi;
       
   100 	TUint32	iEdi;
       
   101 	TUint32	iEbp;
       
   102 	TUint32	iEax;
       
   103 	TUint32	iDs;
       
   104 	TUint32	iEs;
       
   105 	TUint32	iFs;
       
   106 	TUint32	iGs;
       
   107 	TUint32	iVector;
       
   108 	TUint32	iError;
       
   109 	TUint32	iEip;
       
   110 	TUint32	iCs;
       
   111 	TUint32	iEflags;
       
   112 	TUint32	iEsp3;		// only if iCs does not indicate CPL=0
       
   113 	TUint32	iSs3;		// only if iCs does not indicate CPL=0
       
   114 	};
       
   115 
       
   116 // Registers pushed on stack for slow exec
       
   117 struct SThreadSlowExecStack
       
   118 	{
       
   119 	TUint32	iEcx;
       
   120 	TUint32	iEdx;
       
   121 	TUint32	iEbx;
       
   122 	TUint32	iEsi;
       
   123 	TUint32	iEdi;
       
   124 	TUint32	iEbp;
       
   125 	TUint32	iEax;
       
   126 	TUint32	iDs;
       
   127 	TUint32	iEs;
       
   128 	TUint32	iFs;
       
   129 	TUint32	iGs;
       
   130 	TUint32	iArgs[8];	// space for extra arguments copied from user side
       
   131 	TUint32	iVector;
       
   132 	TUint32	iError;
       
   133 	TUint32	iEip;
       
   134 	TUint32	iCs;
       
   135 	TUint32	iEflags;
       
   136 	TUint32	iEsp3;		// only if iCs does not indicate CPL=0
       
   137 	TUint32	iSs3;		// only if iCs does not indicate CPL=0
       
   138 	};
       
   139 
       
   140 // Top of stack after thread creation for threads with parameter block passed
       
   141 // by value.
       
   142 struct SThreadStackStub
       
   143 	{
       
   144 	enum {EVector=0xffffffffu};
       
   145 	TLinAddr iPBlock;	// pointer to parameter block
       
   146 	TUint32	iVector;
       
   147 	TUint32	iError;
       
   148 	TUint32	iEip;
       
   149 	TUint32	iCs;
       
   150 	TUint32	iEflags;
       
   151 	};
       
   152 
       
   153 // Stack structure at thread creation either at top of stack (if parameter block
       
   154 // passed by reference) or below parameter block if passed by value.
       
   155 struct SThreadInitStack
       
   156 	{
       
   157 	enum {EVector=0xfffffffeu};
       
   158 	SThreadReschedStack		iR;
       
   159 	SThreadExcStack			iX;
       
   160 	};
       
   161 
       
   162 
       
   163 extern "C" {
       
   164 GLREF_D TLinAddr X86_IrqHandler;
       
   165 GLREF_D SCpuIdleHandler CpuIdleHandler;
       
   166 GLREF_D TUint32 X86_CPUID;
       
   167 GLREF_D TBool X86_UseGlobalPTEs;
       
   168 GLREF_D TUint64 DefaultCoprocessorState[64];
       
   169 }
       
   170 
       
   171 /** Ensure the ordering of explicit memory writes
       
   172 
       
   173 	On x86 this is a no-op
       
   174 */
       
   175 #define	wmb()
       
   176 #define	smp_wmb()	wmb()
       
   177 
       
   178 /** Ensure the ordering of explicit memory accesses
       
   179 
       
   180 	On x86 any instruction with the LOCK prefix does this
       
   181 */
       
   182 #ifdef __GCC32__
       
   183 #define	mb()	__asm__ __volatile__("lock add dword ptr [esp], 0" : : : "memory")
       
   184 #else
       
   185 #define	mb()	do { _asm lock add dword ptr [esp], 0 } while (0)
       
   186 #endif
       
   187 #define smp_mb()	mb()
       
   188 
       
   189 
       
   190 
       
   191 // End of file
       
   192 #endif