kernel/eka/memmodel/epoc/flexible/arm/xdefs.h
changeset 0 a41df078684a
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-1:000000000000 0:a41df078684a
       
     1 // Copyright (c) 2008-2009 Nokia Corporation and/or its subsidiary(-ies).
       
     2 // All rights reserved.
       
     3 // This component and the accompanying materials are made available
       
     4 // under the terms of the License "Eclipse Public License v1.0"
       
     5 // which accompanies this distribution, and is available
       
     6 // at the URL "http://www.eclipse.org/legal/epl-v10.html".
       
     7 //
       
     8 // Initial Contributors:
       
     9 // Nokia Corporation - initial contribution.
       
    10 //
       
    11 // Contributors:
       
    12 //
       
    13 // Description:
       
    14 //
       
    15 
       
    16 #ifdef __CPU_NEEDS_BTAC_FLUSH_AFTER_ASID_CHANGE
       
    17 #define __ASM_SYNC_AFTER_ASID_CHANGE(rTemp) asm("mcr p15, 0, "#rTemp", c7, c5, 6 "); // BPIALL (Branch predictor invalidate all)
       
    18 #else
       
    19 #define __ASM_SYNC_AFTER_ASID_CHANGE(rTemp)
       
    20 #endif
       
    21 
       
    22 #if defined(__CPU_ARM1136__) && defined(__HAS_EXTERNAL_CACHE__) && !defined(__CPU_ARM1136_ERRATUM_317041_FIXED)
       
    23 #define __ASM_SET_ADDRESS_SPACE(rASID,rTTBR0,rTemp)   \
       
    24         asm("mrc p15, 0, "#rTemp", c2, c0, 1 ");    /* copy TTBR1... */                                     \
       
    25         asm("orr "#rTemp", "#rTemp", #0x18"); 		/* ERRATUM 1136_317041	*/								\
       
    26         asm("mcr p15, 0, "#rTemp", c2, c0, 0 ");    /* ... to TTBR0 (so we have global-only mappings) */    \
       
    27         __INST_SYNC_BARRIER_Z__(rTemp);                                                                     \
       
    28         __DATA_SYNC_BARRIER__(rTemp);               /* needed before change to ContextID */                 \
       
    29         asm("mcr p15, 0, "#rASID", c13, c0, 1 ");   /* set ContextID (ASID + debugging thread ID) */        \
       
    30         __INST_SYNC_BARRIER__(rTemp);                                                                       \
       
    31         asm("orr "#rTTBR0", "#rTTBR0", #0x18"); 	/* ERRATUM 1136_317041*/								\
       
    32         asm("mcr p15, 0, "#rTTBR0", c2, c0, 0 ");   /* set TTBR0*/                                          \
       
    33         __INST_SYNC_BARRIER__(rTemp);                                                                       \
       
    34         __ASM_SYNC_AFTER_ASID_CHANGE(rTemp)
       
    35 
       
    36 #else
       
    37 #define __ASM_SET_ADDRESS_SPACE(rASID,rTTBR0,rTemp)   \
       
    38         asm("mrc p15, 0, "#rTemp", c2, c0, 1 ");    /* copy TTBR1... */                                     \
       
    39         asm("mcr p15, 0, "#rTemp", c2, c0, 0 ");    /* ... to TTBR0 (so we have global-only mappings) */    \
       
    40         __INST_SYNC_BARRIER_Z__(rTemp);                                                                     \
       
    41         __DATA_SYNC_BARRIER__(rTemp);               /* needed before change to ContextID */                 \
       
    42         asm("mcr p15, 0, "#rASID", c13, c0, 1 ");   /* set ContextID (ASID + debugging thread ID) */                    \
       
    43         __INST_SYNC_BARRIER__(rTemp);                                                                       \
       
    44         asm("mcr p15, 0, "#rTTBR0", c2, c0, 0 ");   /* set TTBR0*/                                          \
       
    45         __INST_SYNC_BARRIER__(rTemp);                                                                       \
       
    46         __ASM_SYNC_AFTER_ASID_CHANGE(rTemp)
       
    47 #endif
       
    48 
       
    49 #ifndef __ASM_CLI
       
    50 
       
    51 #ifdef __FIQ_IS_UNCONTROLLED__
       
    52 #define	__ASM_CLI()							CPSIDI			/* Disable all interrupts */
       
    53 #define	__ASM_STI()							CPSIEI			/* Enable all interrupts */
       
    54 #else
       
    55 #define	__ASM_CLI()							CPSIDIF			/* Disable all interrupts */
       
    56 #define	__ASM_STI()							CPSIEIF			/* Enable all interrupts */
       
    57 #endif
       
    58 
       
    59 #endif