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1 // Copyright (c) 1999-2009 Nokia Corporation and/or its subsidiary(-ies). |
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2 // All rights reserved. |
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3 // This component and the accompanying materials are made available |
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4 // under the terms of the License "Eclipse Public License v1.0" |
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5 // which accompanies this distribution, and is available |
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6 // at the URL "http://www.eclipse.org/legal/epl-v10.html". |
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7 // |
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8 // Initial Contributors: |
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9 // Nokia Corporation - initial contribution. |
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10 // |
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11 // Contributors: |
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12 // |
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13 // Description: |
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14 // e32utils\profiler\sampler.cia |
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15 // |
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16 // |
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17 |
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18 #include <platform.h> |
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19 |
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20 #include "sampler.h" |
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21 #include <kernel/kern_priv.h> //temporary |
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22 |
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23 |
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24 #if defined(__GCC32__) |
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25 // CIA symbol macros for Gcc98r2 |
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26 #define CSM__ZN5NKern14CurrentContextEv " CurrentContext__5NKern" |
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27 #elif defined(__ARMCC__) |
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28 // CIA symbol macros for RVCT |
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29 #define CSM__ZN5NKern14CurrentContextEv " __cpp(NKern::CurrentContext)" |
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30 #else |
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31 // CIA symbol macros for EABI assemblers |
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32 #define CSM__ZN5NKern14CurrentContextEv " _ZN5NKern14CurrentContextEv" |
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33 #endif |
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34 |
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35 |
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36 __NAKED__ TUint IntStackPtr() |
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37 { |
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38 asm("mrs r1, cpsr "); |
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39 asm("bic r3, r1, #0x1f "); |
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40 //#ifdef __MISA__ |
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41 // asm("orr r3, r3, #0xd1 "); // mode_fiq, all interrupts off |
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42 //#else |
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43 asm("orr r3, r3, #0xd2 "); // mode_irq, all interrupts off |
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44 //#endif |
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45 asm("msr cpsr, r3 "); |
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46 asm("mov r0, sp "); // r0=sp_irq or sp_fiq |
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47 asm("msr cpsr, r1 "); // restore interrupts |
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48 __JUMP(,lr); |
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49 } |
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50 |
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51 __NAKED__ TUint32 SPSR() |
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52 { |
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53 asm("mrs r0, spsr "); |
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54 __JUMP(,lr); |
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55 } |
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56 |
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57 |
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58 // This will return 1 if it was iDFC interrupted (0 otherwise). |
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59 // As there is no Kernel interface for that, we have to 'fake' Kernel by |
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60 // setting SVC mode before calling NKern::CurrentContext. |
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61 // Without that, CurrentContext would always return EInterrupt. |
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62 __NAKED__ TUint IDFCRunning() |
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63 { |
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64 asm("stmfd sp!, {r4-r5} "); |
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65 |
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66 asm("mrs r5, cpsr"); // r5 = cpsr_irq |
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67 asm("bic r4, r5, #0xdf "); // clear interrupt mask & CPU mode |
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68 asm("orr r4, r4, #0xd3 "); // disable all interrupts and set SVC mode |
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69 |
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70 asm("msr CPSR_cf, r4"); // switch to SVC, (dissable FIQ, IRQ) |
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71 |
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72 // NKern::CurrentContext does not use sp (only r0,r1,r2) |
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73 // It is just lr in svc mode we need to preserve. |
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74 asm("mov r4, lr"); // r4 = lr_svc |
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75 asm("bl " CSM__ZN5NKern14CurrentContextEv ); // r0 = 1 if iDFC was running, 0 if a thread was running |
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76 asm("mov lr, r4"); // lr_svc is back to original state |
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77 |
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78 asm("msr CPSR_cf, r5"); // return to IRQ mode |
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79 |
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80 asm("ldmfd sp!, {r4-r5} "); |
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81 __JUMP(,lr); |
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82 } |