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1 // Copyright (c) 2006-2009 Nokia Corporation and/or its subsidiary(-ies). |
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2 // All rights reserved. |
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3 // This component and the accompanying materials are made available |
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4 // under the terms of the License "Eclipse Public License v1.0" |
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5 // which accompanies this distribution, and is available |
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6 // at the URL "http://www.eclipse.org/legal/epl-v10.html". |
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7 // |
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8 // Initial Contributors: |
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9 // Nokia Corporation - initial contribution. |
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10 // |
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11 // Contributors: |
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12 // |
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13 // Description: |
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14 // f32test\demandpaging\t_pagestress.cia |
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15 // |
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16 // |
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17 |
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18 #include <u32std.h> |
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19 |
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20 |
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21 #ifdef DEF_T_PAGESTRESS |
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22 #include "../t_pagestress.h" |
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23 #else |
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24 #include "t_pagestress.h" |
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25 #endif |
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26 |
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27 |
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28 |
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29 #ifdef __VC32__ |
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30 #pragma warning(disable:4706) |
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31 #endif |
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32 |
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33 //#if defined(_DEBUG) || defined(_DEBUG_RELEASE) |
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34 |
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35 #if defined __ARMCC__ || defined __X86__ |
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36 |
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37 #ifdef __X86__ |
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38 |
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39 #ifdef __GCC32__ |
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40 #define ASM_NOP asm("nop"); |
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41 #define ASM_RET asm("mov eax, dword ptr [esp+4]"); \ |
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42 asm("add eax, dword ptr [esp+8]"); \ |
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43 asm("ret"); // do not use C 'return' or stack frame will be created |
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44 #else |
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45 #define ASM_NOP _asm nop |
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46 #define ASM_RET return aParam1 + aParam2; |
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47 #endif |
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48 #define ASM_NOP2 ASM_NOP ASM_NOP |
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49 #define ASM_NOP4 ASM_NOP2 ASM_NOP2 |
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50 #define ASM_NOP8 ASM_NOP4 ASM_NOP4 |
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51 #define ASM_NOP16 ASM_NOP8 ASM_NOP8 |
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52 #define ASM_NOP32 ASM_NOP16 ASM_NOP16 |
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53 #define ASM_NOP64 ASM_NOP32 ASM_NOP32 |
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54 #define ASM_NOP128 ASM_NOP64 ASM_NOP64 |
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55 #define ASM_NOP256 ASM_NOP128 ASM_NOP128 |
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56 #define ASM_NOP512 ASM_NOP256 ASM_NOP256 |
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57 #define ASM_NOP1024 ASM_NOP512 ASM_NOP512 |
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58 #define ASM_NOP2048 ASM_NOP1024 ASM_NOP1024 |
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59 #define ASM_NOP3072 ASM_NOP1024 ASM_NOP2048 |
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60 #define ASM_NOP3584 ASM_NOP3072 ASM_NOP512 |
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61 #define ASM_NOP3840 ASM_NOP3584 ASM_NOP256 |
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62 #define ASM_NOP3968 ASM_NOP3840 ASM_NOP128 |
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63 #define ASM_NOP4032 ASM_NOP3968 ASM_NOP64 |
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64 #define ASM_NOP4064 ASM_NOP4032 ASM_NOP32 |
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65 #define ASM_NOP4080 ASM_NOP4064 ASM_NOP8 |
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66 #define ASM_ALL ASM_NOP4080 |
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67 #undef __NAKED__ |
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68 #define __NAKED__ |
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69 #endif |
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70 |
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71 #if defined __ARMCC__ |
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72 #define ASM_OP1 asm("movs r2,r0"); |
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73 #define ASM_OP2 asm("adds r0,r2,r1"); |
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74 #define ASM_OP3 asm("bx lr"); |
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75 #define ASM_OP4 asm(".space 4084"); |
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76 #define ASM_ALL1 ASM_OP1 ASM_OP2 |
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77 #define ASM_ALL2 ASM_ALL1 ASM_OP3 |
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78 #define ASM_ALL ASM_ALL2 ASM_OP4 |
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79 #define ASM_RET |
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80 #endif |
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81 |
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82 __NAKED__ TInt TestAlignment0(TInt aParam1, TInt aParam2) |
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83 { |
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84 ASM_ALL |
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85 ASM_RET |
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86 } |
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87 |
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88 __NAKED__ TInt TestAlignment1(TInt aParam1, TInt aParam2) |
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89 { |
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90 ASM_ALL |
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91 ASM_RET |
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92 } |
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93 |
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94 __NAKED__ TInt TestAlignment2(TInt aParam1, TInt aParam2) |
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95 { |
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96 ASM_ALL |
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97 ASM_RET |
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98 } |
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99 |
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100 __NAKED__ TInt TestAlignment3(TInt aParam1, TInt aParam2) |
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101 { |
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102 ASM_ALL |
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103 ASM_RET |
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104 } |
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105 |
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106 __NAKED__ TInt TestAlignment4(TInt aParam1, TInt aParam2) |
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107 { |
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108 ASM_ALL |
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109 ASM_RET |
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110 } |
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111 |
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112 __NAKED__ TInt TestAlignment5(TInt aParam1, TInt aParam2) |
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113 { |
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114 ASM_ALL |
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115 ASM_RET |
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116 } |
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117 |
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118 __NAKED__ TInt TestAlignment6(TInt aParam1, TInt aParam2) |
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119 { |
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120 ASM_ALL |
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121 ASM_RET |
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122 } |
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123 |
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124 __NAKED__ TInt TestAlignment7(TInt aParam1, TInt aParam2) |
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125 { |
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126 ASM_ALL |
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127 ASM_RET |
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128 } |
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129 |
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130 __NAKED__ TInt TestAlignment8(TInt aParam1, TInt aParam2) |
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131 { |
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132 ASM_ALL |
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133 ASM_RET |
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134 } |
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135 |
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136 __NAKED__ TInt TestAlignment9(TInt aParam1, TInt aParam2) |
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137 { |
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138 ASM_ALL |
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139 ASM_RET |
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140 } |
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141 |
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142 __NAKED__ TInt TestAlignment10(TInt aParam1, TInt aParam2) |
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143 { |
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144 ASM_ALL |
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145 ASM_RET |
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146 } |
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147 |
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148 __NAKED__ TInt TestAlignment11(TInt aParam1, TInt aParam2) |
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149 { |
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150 ASM_ALL |
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151 ASM_RET |
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152 } |
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153 |
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154 __NAKED__ TInt TestAlignment12(TInt aParam1, TInt aParam2) |
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155 { |
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156 ASM_ALL |
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157 ASM_RET |
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158 } |
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159 |
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160 __NAKED__ TInt TestAlignment13(TInt aParam1, TInt aParam2) |
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161 { |
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162 ASM_ALL |
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163 ASM_RET |
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164 } |
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165 |
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166 __NAKED__ TInt TestAlignment14(TInt aParam1, TInt aParam2) |
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167 { |
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168 ASM_ALL |
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169 ASM_RET |
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170 } |
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171 |
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172 __NAKED__ TInt TestAlignment15(TInt aParam1, TInt aParam2) |
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173 { |
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174 ASM_ALL |
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175 ASM_RET |
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176 } |
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177 |
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178 __NAKED__ TInt TestAlignment16(TInt aParam1, TInt aParam2) |
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179 { |
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180 ASM_ALL |
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181 ASM_RET |
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182 } |
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183 |
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184 __NAKED__ TInt TestAlignment17(TInt aParam1, TInt aParam2) |
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185 { |
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186 ASM_ALL |
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187 ASM_RET |
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188 } |
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189 |
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190 __NAKED__ TInt TestAlignment18(TInt aParam1, TInt aParam2) |
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191 { |
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192 ASM_ALL |
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193 ASM_RET |
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194 } |
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195 |
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196 __NAKED__ TInt TestAlignment19(TInt aParam1, TInt aParam2) |
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197 { |
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198 ASM_ALL |
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199 ASM_RET |
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200 } |
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201 |
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202 __NAKED__ TInt TestAlignment20(TInt aParam1, TInt aParam2) |
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203 { |
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204 ASM_ALL |
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205 ASM_RET |
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206 } |
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207 |
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208 __NAKED__ TInt TestAlignment21(TInt aParam1, TInt aParam2) |
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209 { |
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210 ASM_ALL |
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211 ASM_RET |
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212 } |
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213 |
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214 __NAKED__ TInt TestAlignment22(TInt aParam1, TInt aParam2) |
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215 { |
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216 ASM_ALL |
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217 ASM_RET |
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218 } |
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219 |
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220 __NAKED__ TInt TestAlignment23(TInt aParam1, TInt aParam2) |
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221 { |
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222 ASM_ALL |
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223 ASM_RET |
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224 } |
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225 |
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226 __NAKED__ TInt TestAlignment24(TInt aParam1, TInt aParam2) |
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227 { |
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228 ASM_ALL |
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229 ASM_RET |
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230 } |
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231 |
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232 __NAKED__ TInt TestAlignment25(TInt aParam1, TInt aParam2) |
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233 { |
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234 ASM_ALL |
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235 ASM_RET |
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236 } |
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237 |
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238 __NAKED__ TInt TestAlignment26(TInt aParam1, TInt aParam2) |
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239 { |
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240 ASM_ALL |
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241 ASM_RET |
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242 } |
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243 |
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244 __NAKED__ TInt TestAlignment27(TInt aParam1, TInt aParam2) |
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245 { |
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246 ASM_ALL |
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247 ASM_RET |
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248 } |
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249 |
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250 __NAKED__ TInt TestAlignment28(TInt aParam1, TInt aParam2) |
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251 { |
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252 ASM_ALL |
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253 ASM_RET |
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254 } |
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255 |
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256 __NAKED__ TInt TestAlignment29(TInt aParam1, TInt aParam2) |
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257 { |
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258 ASM_ALL |
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259 ASM_RET |
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260 } |
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261 |
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262 __NAKED__ TInt TestAlignment30(TInt aParam1, TInt aParam2) |
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263 { |
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264 ASM_ALL |
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265 ASM_RET |
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266 } |
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267 |
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268 __NAKED__ TInt TestAlignment31(TInt aParam1, TInt aParam2) |
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269 { |
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270 ASM_ALL |
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271 ASM_RET |
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272 } |
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273 |
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274 __NAKED__ TInt TestAlignment32(TInt aParam1, TInt aParam2) |
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275 { |
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276 ASM_ALL |
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277 ASM_RET |
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278 } |
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279 |
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280 __NAKED__ TInt TestAlignment33(TInt aParam1, TInt aParam2) |
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281 { |
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282 ASM_ALL |
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283 ASM_RET |
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284 } |
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285 |
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286 __NAKED__ TInt TestAlignment34(TInt aParam1, TInt aParam2) |
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287 { |
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288 ASM_ALL |
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289 ASM_RET |
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290 } |
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291 |
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292 __NAKED__ TInt TestAlignment35(TInt aParam1, TInt aParam2) |
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293 { |
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294 ASM_ALL |
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295 ASM_RET |
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296 } |
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297 |
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298 __NAKED__ TInt TestAlignment36(TInt aParam1, TInt aParam2) |
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299 { |
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300 ASM_ALL |
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301 ASM_RET |
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302 } |
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303 |
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304 __NAKED__ TInt TestAlignment37(TInt aParam1, TInt aParam2) |
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305 { |
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306 ASM_ALL |
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307 ASM_RET |
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308 } |
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309 |
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310 __NAKED__ TInt TestAlignment38(TInt aParam1, TInt aParam2) |
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311 { |
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312 ASM_ALL |
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313 ASM_RET |
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314 } |
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315 |
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316 __NAKED__ TInt TestAlignment39(TInt aParam1, TInt aParam2) |
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317 { |
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318 ASM_ALL |
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319 ASM_RET |
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320 } |
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321 |
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322 __NAKED__ TInt TestAlignment40(TInt aParam1, TInt aParam2) |
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323 { |
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324 ASM_ALL |
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325 ASM_RET |
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326 } |
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327 |
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328 __NAKED__ TInt TestAlignment41(TInt aParam1, TInt aParam2) |
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329 { |
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330 ASM_ALL |
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331 ASM_RET |
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332 } |
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333 |
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334 __NAKED__ TInt TestAlignment42(TInt aParam1, TInt aParam2) |
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335 { |
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336 ASM_ALL |
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337 ASM_RET |
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338 } |
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339 |
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340 __NAKED__ TInt TestAlignment43(TInt aParam1, TInt aParam2) |
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341 { |
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342 ASM_ALL |
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343 ASM_RET |
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344 } |
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345 |
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346 __NAKED__ TInt TestAlignment44(TInt aParam1, TInt aParam2) |
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347 { |
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348 ASM_ALL |
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349 ASM_RET |
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350 } |
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351 |
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352 __NAKED__ TInt TestAlignment45(TInt aParam1, TInt aParam2) |
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353 { |
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354 ASM_ALL |
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355 ASM_RET |
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356 } |
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357 |
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358 __NAKED__ TInt TestAlignment46(TInt aParam1, TInt aParam2) |
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359 { |
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360 ASM_ALL |
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361 ASM_RET |
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362 } |
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363 |
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364 __NAKED__ TInt TestAlignment47(TInt aParam1, TInt aParam2) |
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365 { |
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366 ASM_ALL |
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367 ASM_RET |
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368 } |
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369 |
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370 __NAKED__ TInt TestAlignment48(TInt aParam1, TInt aParam2) |
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371 { |
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372 ASM_ALL |
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373 ASM_RET |
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374 } |
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375 |
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376 __NAKED__ TInt TestAlignment49(TInt aParam1, TInt aParam2) |
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377 { |
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378 ASM_ALL |
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379 ASM_RET |
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380 } |
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381 |
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382 __NAKED__ TInt TestAlignment50(TInt aParam1, TInt aParam2) |
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383 { |
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384 ASM_ALL |
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385 ASM_RET |
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386 } |
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387 |
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388 __NAKED__ TInt TestAlignment51(TInt aParam1, TInt aParam2) |
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389 { |
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390 ASM_ALL |
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391 ASM_RET |
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392 } |
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393 |
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394 __NAKED__ TInt TestAlignment52(TInt aParam1, TInt aParam2) |
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395 { |
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396 ASM_ALL |
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397 ASM_RET |
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398 } |
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399 |
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400 __NAKED__ TInt TestAlignment53(TInt aParam1, TInt aParam2) |
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401 { |
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402 ASM_ALL |
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403 ASM_RET |
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404 } |
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405 |
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406 __NAKED__ TInt TestAlignment54(TInt aParam1, TInt aParam2) |
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407 { |
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408 ASM_ALL |
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409 ASM_RET |
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410 } |
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411 |
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412 __NAKED__ TInt TestAlignment55(TInt aParam1, TInt aParam2) |
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413 { |
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414 ASM_ALL |
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415 ASM_RET |
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416 } |
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417 |
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418 __NAKED__ TInt TestAlignment56(TInt aParam1, TInt aParam2) |
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419 { |
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420 ASM_ALL |
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421 ASM_RET |
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422 } |
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423 |
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424 __NAKED__ TInt TestAlignment57(TInt aParam1, TInt aParam2) |
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425 { |
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426 ASM_ALL |
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427 ASM_RET |
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428 } |
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429 |
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430 __NAKED__ TInt TestAlignment58(TInt aParam1, TInt aParam2) |
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431 { |
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432 ASM_ALL |
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433 ASM_RET |
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434 } |
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435 |
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436 __NAKED__ TInt TestAlignment59(TInt aParam1, TInt aParam2) |
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437 { |
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438 ASM_ALL |
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439 ASM_RET |
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440 } |
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441 |
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442 __NAKED__ TInt TestAlignment60(TInt aParam1, TInt aParam2) |
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443 { |
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444 ASM_ALL |
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445 ASM_RET |
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446 } |
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447 |
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448 |
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449 __NAKED__ TInt TestAlignment61(TInt aParam1, TInt aParam2) |
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450 { |
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451 ASM_ALL |
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452 ASM_RET |
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453 } |
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454 |
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455 |
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456 __NAKED__ TInt TestAlignment62(TInt aParam1, TInt aParam2) |
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457 { |
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458 ASM_ALL |
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459 ASM_RET |
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460 } |
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461 |
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462 __NAKED__ TInt TestAlignment63(TInt aParam1, TInt aParam2) |
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463 { |
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464 ASM_ALL |
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465 ASM_RET |
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466 } |
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467 |
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468 #ifdef T_PAGESTRESS_LARGE_ARRAY |
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469 __NAKED__ TInt TestAlignment64(TInt aParam1, TInt aParam2) |
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470 { |
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471 ASM_ALL |
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472 ASM_RET |
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473 } |
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474 |
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475 __NAKED__ TInt TestAlignment65(TInt aParam1, TInt aParam2) |
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476 { |
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477 ASM_ALL |
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478 ASM_RET |
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479 } |
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480 |
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481 __NAKED__ TInt TestAlignment66(TInt aParam1, TInt aParam2) |
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482 { |
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483 ASM_ALL |
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484 ASM_RET |
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485 } |
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486 |
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487 __NAKED__ TInt TestAlignment67(TInt aParam1, TInt aParam2) |
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488 { |
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489 ASM_ALL |
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490 ASM_RET |
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491 } |
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492 |
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493 __NAKED__ TInt TestAlignment68(TInt aParam1, TInt aParam2) |
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494 { |
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495 ASM_ALL |
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496 ASM_RET |
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497 } |
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498 |
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499 __NAKED__ TInt TestAlignment69(TInt aParam1, TInt aParam2) |
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500 { |
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501 ASM_ALL |
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502 ASM_RET |
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503 } |
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504 |
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505 __NAKED__ TInt TestAlignment70(TInt aParam1, TInt aParam2) |
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506 { |
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507 ASM_ALL |
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508 ASM_RET |
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509 } |
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510 |
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511 __NAKED__ TInt TestAlignment71(TInt aParam1, TInt aParam2) |
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512 { |
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513 ASM_ALL |
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514 ASM_RET |
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515 } |
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516 |
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517 __NAKED__ TInt TestAlignment72(TInt aParam1, TInt aParam2) |
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518 { |
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519 ASM_ALL |
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520 ASM_RET |
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521 } |
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522 |
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523 __NAKED__ TInt TestAlignment73(TInt aParam1, TInt aParam2) |
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524 { |
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525 ASM_ALL |
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526 ASM_RET |
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527 } |
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528 |
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529 __NAKED__ TInt TestAlignment74(TInt aParam1, TInt aParam2) |
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530 { |
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531 ASM_ALL |
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532 ASM_RET |
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533 } |
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534 |
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535 __NAKED__ TInt TestAlignment75(TInt aParam1, TInt aParam2) |
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536 { |
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537 ASM_ALL |
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538 ASM_RET |
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539 } |
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540 |
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541 __NAKED__ TInt TestAlignment76(TInt aParam1, TInt aParam2) |
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542 { |
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543 ASM_ALL |
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544 ASM_RET |
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545 } |
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546 |
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547 __NAKED__ TInt TestAlignment77(TInt aParam1, TInt aParam2) |
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548 { |
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549 ASM_ALL |
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550 ASM_RET |
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551 } |
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552 |
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553 __NAKED__ TInt TestAlignment78(TInt aParam1, TInt aParam2) |
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554 { |
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555 ASM_ALL |
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556 ASM_RET |
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557 } |
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558 |
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559 __NAKED__ TInt TestAlignment79(TInt aParam1, TInt aParam2) |
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560 { |
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561 ASM_ALL |
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562 ASM_RET |
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563 } |
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564 |
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565 __NAKED__ TInt TestAlignment80(TInt aParam1, TInt aParam2) |
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566 { |
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567 ASM_ALL |
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568 ASM_RET |
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569 } |
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570 |
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571 __NAKED__ TInt TestAlignment81(TInt aParam1, TInt aParam2) |
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572 { |
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573 ASM_ALL |
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574 ASM_RET |
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575 } |
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576 |
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577 __NAKED__ TInt TestAlignment82(TInt aParam1, TInt aParam2) |
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578 { |
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579 ASM_ALL |
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580 ASM_RET |
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581 } |
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582 |
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583 __NAKED__ TInt TestAlignment83(TInt aParam1, TInt aParam2) |
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584 { |
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585 ASM_ALL |
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586 ASM_RET |
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587 } |
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588 |
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589 __NAKED__ TInt TestAlignment84(TInt aParam1, TInt aParam2) |
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590 { |
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591 ASM_ALL |
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592 ASM_RET |
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593 } |
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594 |
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595 __NAKED__ TInt TestAlignment85(TInt aParam1, TInt aParam2) |
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596 { |
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597 ASM_ALL |
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598 ASM_RET |
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599 } |
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600 |
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601 __NAKED__ TInt TestAlignment86(TInt aParam1, TInt aParam2) |
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602 { |
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603 ASM_ALL |
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604 ASM_RET |
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605 } |
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606 |
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607 __NAKED__ TInt TestAlignment87(TInt aParam1, TInt aParam2) |
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608 { |
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609 ASM_ALL |
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610 ASM_RET |
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611 } |
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612 |
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613 __NAKED__ TInt TestAlignment88(TInt aParam1, TInt aParam2) |
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614 { |
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615 ASM_ALL |
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616 ASM_RET |
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617 } |
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618 |
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619 __NAKED__ TInt TestAlignment89(TInt aParam1, TInt aParam2) |
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620 { |
|
621 ASM_ALL |
|
622 ASM_RET |
|
623 } |
|
624 |
|
625 __NAKED__ TInt TestAlignment90(TInt aParam1, TInt aParam2) |
|
626 { |
|
627 ASM_ALL |
|
628 ASM_RET |
|
629 } |
|
630 |
|
631 __NAKED__ TInt TestAlignment91(TInt aParam1, TInt aParam2) |
|
632 { |
|
633 ASM_ALL |
|
634 ASM_RET |
|
635 } |
|
636 |
|
637 __NAKED__ TInt TestAlignment92(TInt aParam1, TInt aParam2) |
|
638 { |
|
639 ASM_ALL |
|
640 ASM_RET |
|
641 } |
|
642 |
|
643 __NAKED__ TInt TestAlignment93(TInt aParam1, TInt aParam2) |
|
644 { |
|
645 ASM_ALL |
|
646 ASM_RET |
|
647 } |
|
648 |
|
649 __NAKED__ TInt TestAlignment94(TInt aParam1, TInt aParam2) |
|
650 { |
|
651 ASM_ALL |
|
652 ASM_RET |
|
653 } |
|
654 |
|
655 __NAKED__ TInt TestAlignment95(TInt aParam1, TInt aParam2) |
|
656 { |
|
657 ASM_ALL |
|
658 ASM_RET |
|
659 } |
|
660 |
|
661 __NAKED__ TInt TestAlignment96(TInt aParam1, TInt aParam2) |
|
662 { |
|
663 ASM_ALL |
|
664 ASM_RET |
|
665 } |
|
666 |
|
667 __NAKED__ TInt TestAlignment97(TInt aParam1, TInt aParam2) |
|
668 { |
|
669 ASM_ALL |
|
670 ASM_RET |
|
671 } |
|
672 |
|
673 __NAKED__ TInt TestAlignment98(TInt aParam1, TInt aParam2) |
|
674 { |
|
675 ASM_ALL |
|
676 ASM_RET |
|
677 } |
|
678 |
|
679 __NAKED__ TInt TestAlignment99(TInt aParam1, TInt aParam2) |
|
680 { |
|
681 ASM_ALL |
|
682 ASM_RET |
|
683 } |
|
684 |
|
685 __NAKED__ TInt TestAlignment100(TInt aParam1, TInt aParam2) |
|
686 { |
|
687 ASM_ALL |
|
688 ASM_RET |
|
689 } |
|
690 |
|
691 __NAKED__ TInt TestAlignment101(TInt aParam1, TInt aParam2) |
|
692 { |
|
693 ASM_ALL |
|
694 ASM_RET |
|
695 } |
|
696 |
|
697 __NAKED__ TInt TestAlignment102(TInt aParam1, TInt aParam2) |
|
698 { |
|
699 ASM_ALL |
|
700 ASM_RET |
|
701 } |
|
702 |
|
703 __NAKED__ TInt TestAlignment103(TInt aParam1, TInt aParam2) |
|
704 { |
|
705 ASM_ALL |
|
706 ASM_RET |
|
707 } |
|
708 |
|
709 __NAKED__ TInt TestAlignment104(TInt aParam1, TInt aParam2) |
|
710 { |
|
711 ASM_ALL |
|
712 ASM_RET |
|
713 } |
|
714 |
|
715 __NAKED__ TInt TestAlignment105(TInt aParam1, TInt aParam2) |
|
716 { |
|
717 ASM_ALL |
|
718 ASM_RET |
|
719 } |
|
720 |
|
721 __NAKED__ TInt TestAlignment106(TInt aParam1, TInt aParam2) |
|
722 { |
|
723 ASM_ALL |
|
724 ASM_RET |
|
725 } |
|
726 |
|
727 __NAKED__ TInt TestAlignment107(TInt aParam1, TInt aParam2) |
|
728 { |
|
729 ASM_ALL |
|
730 ASM_RET |
|
731 } |
|
732 |
|
733 __NAKED__ TInt TestAlignment108(TInt aParam1, TInt aParam2) |
|
734 { |
|
735 ASM_ALL |
|
736 ASM_RET |
|
737 } |
|
738 |
|
739 __NAKED__ TInt TestAlignment109(TInt aParam1, TInt aParam2) |
|
740 { |
|
741 ASM_ALL |
|
742 ASM_RET |
|
743 } |
|
744 |
|
745 __NAKED__ TInt TestAlignment110(TInt aParam1, TInt aParam2) |
|
746 { |
|
747 ASM_ALL |
|
748 ASM_RET |
|
749 } |
|
750 |
|
751 __NAKED__ TInt TestAlignment111(TInt aParam1, TInt aParam2) |
|
752 { |
|
753 ASM_ALL |
|
754 ASM_RET |
|
755 } |
|
756 |
|
757 __NAKED__ TInt TestAlignment112(TInt aParam1, TInt aParam2) |
|
758 { |
|
759 ASM_ALL |
|
760 ASM_RET |
|
761 } |
|
762 |
|
763 __NAKED__ TInt TestAlignment113(TInt aParam1, TInt aParam2) |
|
764 { |
|
765 ASM_ALL |
|
766 ASM_RET |
|
767 } |
|
768 |
|
769 __NAKED__ TInt TestAlignment114(TInt aParam1, TInt aParam2) |
|
770 { |
|
771 ASM_ALL |
|
772 ASM_RET |
|
773 } |
|
774 |
|
775 __NAKED__ TInt TestAlignment115(TInt aParam1, TInt aParam2) |
|
776 { |
|
777 ASM_ALL |
|
778 ASM_RET |
|
779 } |
|
780 |
|
781 __NAKED__ TInt TestAlignment116(TInt aParam1, TInt aParam2) |
|
782 { |
|
783 ASM_ALL |
|
784 ASM_RET |
|
785 } |
|
786 |
|
787 __NAKED__ TInt TestAlignment117(TInt aParam1, TInt aParam2) |
|
788 { |
|
789 ASM_ALL |
|
790 ASM_RET |
|
791 } |
|
792 |
|
793 __NAKED__ TInt TestAlignment118(TInt aParam1, TInt aParam2) |
|
794 { |
|
795 ASM_ALL |
|
796 ASM_RET |
|
797 } |
|
798 |
|
799 __NAKED__ TInt TestAlignment119(TInt aParam1, TInt aParam2) |
|
800 { |
|
801 ASM_ALL |
|
802 ASM_RET |
|
803 } |
|
804 |
|
805 __NAKED__ TInt TestAlignment120(TInt aParam1, TInt aParam2) |
|
806 { |
|
807 ASM_ALL |
|
808 ASM_RET |
|
809 } |
|
810 |
|
811 __NAKED__ TInt TestAlignment121(TInt aParam1, TInt aParam2) |
|
812 { |
|
813 ASM_ALL |
|
814 ASM_RET |
|
815 } |
|
816 |
|
817 __NAKED__ TInt TestAlignment122(TInt aParam1, TInt aParam2) |
|
818 { |
|
819 ASM_ALL |
|
820 ASM_RET |
|
821 } |
|
822 |
|
823 __NAKED__ TInt TestAlignment123(TInt aParam1, TInt aParam2) |
|
824 { |
|
825 ASM_ALL |
|
826 ASM_RET |
|
827 } |
|
828 |
|
829 __NAKED__ TInt TestAlignment124(TInt aParam1, TInt aParam2) |
|
830 { |
|
831 ASM_ALL |
|
832 ASM_RET |
|
833 } |
|
834 |
|
835 __NAKED__ TInt TestAlignment125(TInt aParam1, TInt aParam2) |
|
836 { |
|
837 ASM_ALL |
|
838 ASM_RET |
|
839 } |
|
840 |
|
841 __NAKED__ TInt TestAlignment126(TInt aParam1, TInt aParam2) |
|
842 { |
|
843 ASM_ALL |
|
844 ASM_RET |
|
845 } |
|
846 |
|
847 __NAKED__ TInt TestAlignment127(TInt aParam1, TInt aParam2) |
|
848 { |
|
849 ASM_ALL |
|
850 ASM_RET |
|
851 } |
|
852 |
|
853 __NAKED__ TInt TestAlignment128(TInt aParam1, TInt aParam2) |
|
854 { |
|
855 ASM_ALL |
|
856 ASM_RET |
|
857 } |
|
858 |
|
859 __NAKED__ TInt TestAlignment129(TInt aParam1, TInt aParam2) |
|
860 { |
|
861 ASM_ALL |
|
862 ASM_RET |
|
863 } |
|
864 |
|
865 __NAKED__ TInt TestAlignment130(TInt aParam1, TInt aParam2) |
|
866 { |
|
867 ASM_ALL |
|
868 ASM_RET |
|
869 } |
|
870 |
|
871 __NAKED__ TInt TestAlignment131(TInt aParam1, TInt aParam2) |
|
872 { |
|
873 ASM_ALL |
|
874 ASM_RET |
|
875 } |
|
876 |
|
877 __NAKED__ TInt TestAlignment132(TInt aParam1, TInt aParam2) |
|
878 { |
|
879 ASM_ALL |
|
880 ASM_RET |
|
881 } |
|
882 |
|
883 __NAKED__ TInt TestAlignment133(TInt aParam1, TInt aParam2) |
|
884 { |
|
885 ASM_ALL |
|
886 ASM_RET |
|
887 } |
|
888 |
|
889 __NAKED__ TInt TestAlignment134(TInt aParam1, TInt aParam2) |
|
890 { |
|
891 ASM_ALL |
|
892 ASM_RET |
|
893 } |
|
894 |
|
895 __NAKED__ TInt TestAlignment135(TInt aParam1, TInt aParam2) |
|
896 { |
|
897 ASM_ALL |
|
898 ASM_RET |
|
899 } |
|
900 |
|
901 __NAKED__ TInt TestAlignment136(TInt aParam1, TInt aParam2) |
|
902 { |
|
903 ASM_ALL |
|
904 ASM_RET |
|
905 } |
|
906 |
|
907 __NAKED__ TInt TestAlignment137(TInt aParam1, TInt aParam2) |
|
908 { |
|
909 ASM_ALL |
|
910 ASM_RET |
|
911 } |
|
912 |
|
913 __NAKED__ TInt TestAlignment138(TInt aParam1, TInt aParam2) |
|
914 { |
|
915 ASM_ALL |
|
916 ASM_RET |
|
917 } |
|
918 |
|
919 __NAKED__ TInt TestAlignment139(TInt aParam1, TInt aParam2) |
|
920 { |
|
921 ASM_ALL |
|
922 ASM_RET |
|
923 } |
|
924 |
|
925 __NAKED__ TInt TestAlignment140(TInt aParam1, TInt aParam2) |
|
926 { |
|
927 ASM_ALL |
|
928 ASM_RET |
|
929 } |
|
930 |
|
931 __NAKED__ TInt TestAlignment141(TInt aParam1, TInt aParam2) |
|
932 { |
|
933 ASM_ALL |
|
934 ASM_RET |
|
935 } |
|
936 |
|
937 __NAKED__ TInt TestAlignment142(TInt aParam1, TInt aParam2) |
|
938 { |
|
939 ASM_ALL |
|
940 ASM_RET |
|
941 } |
|
942 |
|
943 __NAKED__ TInt TestAlignment143(TInt aParam1, TInt aParam2) |
|
944 { |
|
945 ASM_ALL |
|
946 ASM_RET |
|
947 } |
|
948 |
|
949 __NAKED__ TInt TestAlignment144(TInt aParam1, TInt aParam2) |
|
950 { |
|
951 ASM_ALL |
|
952 ASM_RET |
|
953 } |
|
954 |
|
955 __NAKED__ TInt TestAlignment145(TInt aParam1, TInt aParam2) |
|
956 { |
|
957 ASM_ALL |
|
958 ASM_RET |
|
959 } |
|
960 |
|
961 __NAKED__ TInt TestAlignment146(TInt aParam1, TInt aParam2) |
|
962 { |
|
963 ASM_ALL |
|
964 ASM_RET |
|
965 } |
|
966 |
|
967 __NAKED__ TInt TestAlignment147(TInt aParam1, TInt aParam2) |
|
968 { |
|
969 ASM_ALL |
|
970 ASM_RET |
|
971 } |
|
972 |
|
973 __NAKED__ TInt TestAlignment148(TInt aParam1, TInt aParam2) |
|
974 { |
|
975 ASM_ALL |
|
976 ASM_RET |
|
977 } |
|
978 |
|
979 __NAKED__ TInt TestAlignment149(TInt aParam1, TInt aParam2) |
|
980 { |
|
981 ASM_ALL |
|
982 ASM_RET |
|
983 } |
|
984 |
|
985 __NAKED__ TInt TestAlignment150(TInt aParam1, TInt aParam2) |
|
986 { |
|
987 ASM_ALL |
|
988 ASM_RET |
|
989 } |
|
990 |
|
991 __NAKED__ TInt TestAlignment151(TInt aParam1, TInt aParam2) |
|
992 { |
|
993 ASM_ALL |
|
994 ASM_RET |
|
995 } |
|
996 |
|
997 __NAKED__ TInt TestAlignment152(TInt aParam1, TInt aParam2) |
|
998 { |
|
999 ASM_ALL |
|
1000 ASM_RET |
|
1001 } |
|
1002 |
|
1003 __NAKED__ TInt TestAlignment153(TInt aParam1, TInt aParam2) |
|
1004 { |
|
1005 ASM_ALL |
|
1006 ASM_RET |
|
1007 } |
|
1008 |
|
1009 __NAKED__ TInt TestAlignment154(TInt aParam1, TInt aParam2) |
|
1010 { |
|
1011 ASM_ALL |
|
1012 ASM_RET |
|
1013 } |
|
1014 |
|
1015 __NAKED__ TInt TestAlignment155(TInt aParam1, TInt aParam2) |
|
1016 { |
|
1017 ASM_ALL |
|
1018 ASM_RET |
|
1019 } |
|
1020 |
|
1021 __NAKED__ TInt TestAlignment156(TInt aParam1, TInt aParam2) |
|
1022 { |
|
1023 ASM_ALL |
|
1024 ASM_RET |
|
1025 } |
|
1026 |
|
1027 __NAKED__ TInt TestAlignment157(TInt aParam1, TInt aParam2) |
|
1028 { |
|
1029 ASM_ALL |
|
1030 ASM_RET |
|
1031 } |
|
1032 |
|
1033 __NAKED__ TInt TestAlignment158(TInt aParam1, TInt aParam2) |
|
1034 { |
|
1035 ASM_ALL |
|
1036 ASM_RET |
|
1037 } |
|
1038 |
|
1039 __NAKED__ TInt TestAlignment159(TInt aParam1, TInt aParam2) |
|
1040 { |
|
1041 ASM_ALL |
|
1042 ASM_RET |
|
1043 } |
|
1044 |
|
1045 __NAKED__ TInt TestAlignment160(TInt aParam1, TInt aParam2) |
|
1046 { |
|
1047 ASM_ALL |
|
1048 ASM_RET |
|
1049 } |
|
1050 |
|
1051 __NAKED__ TInt TestAlignment161(TInt aParam1, TInt aParam2) |
|
1052 { |
|
1053 ASM_ALL |
|
1054 ASM_RET |
|
1055 } |
|
1056 |
|
1057 __NAKED__ TInt TestAlignment162(TInt aParam1, TInt aParam2) |
|
1058 { |
|
1059 ASM_ALL |
|
1060 ASM_RET |
|
1061 } |
|
1062 |
|
1063 __NAKED__ TInt TestAlignment163(TInt aParam1, TInt aParam2) |
|
1064 { |
|
1065 ASM_ALL |
|
1066 ASM_RET |
|
1067 } |
|
1068 |
|
1069 __NAKED__ TInt TestAlignment164(TInt aParam1, TInt aParam2) |
|
1070 { |
|
1071 ASM_ALL |
|
1072 ASM_RET |
|
1073 } |
|
1074 |
|
1075 __NAKED__ TInt TestAlignment165(TInt aParam1, TInt aParam2) |
|
1076 { |
|
1077 ASM_ALL |
|
1078 ASM_RET |
|
1079 } |
|
1080 |
|
1081 __NAKED__ TInt TestAlignment166(TInt aParam1, TInt aParam2) |
|
1082 { |
|
1083 ASM_ALL |
|
1084 ASM_RET |
|
1085 } |
|
1086 |
|
1087 __NAKED__ TInt TestAlignment167(TInt aParam1, TInt aParam2) |
|
1088 { |
|
1089 ASM_ALL |
|
1090 ASM_RET |
|
1091 } |
|
1092 |
|
1093 __NAKED__ TInt TestAlignment168(TInt aParam1, TInt aParam2) |
|
1094 { |
|
1095 ASM_ALL |
|
1096 ASM_RET |
|
1097 } |
|
1098 |
|
1099 __NAKED__ TInt TestAlignment169(TInt aParam1, TInt aParam2) |
|
1100 { |
|
1101 ASM_ALL |
|
1102 ASM_RET |
|
1103 } |
|
1104 |
|
1105 __NAKED__ TInt TestAlignment170(TInt aParam1, TInt aParam2) |
|
1106 { |
|
1107 ASM_ALL |
|
1108 ASM_RET |
|
1109 } |
|
1110 |
|
1111 __NAKED__ TInt TestAlignment171(TInt aParam1, TInt aParam2) |
|
1112 { |
|
1113 ASM_ALL |
|
1114 ASM_RET |
|
1115 } |
|
1116 |
|
1117 __NAKED__ TInt TestAlignment172(TInt aParam1, TInt aParam2) |
|
1118 { |
|
1119 ASM_ALL |
|
1120 ASM_RET |
|
1121 } |
|
1122 |
|
1123 __NAKED__ TInt TestAlignment173(TInt aParam1, TInt aParam2) |
|
1124 { |
|
1125 ASM_ALL |
|
1126 ASM_RET |
|
1127 } |
|
1128 |
|
1129 __NAKED__ TInt TestAlignment174(TInt aParam1, TInt aParam2) |
|
1130 { |
|
1131 ASM_ALL |
|
1132 ASM_RET |
|
1133 } |
|
1134 |
|
1135 __NAKED__ TInt TestAlignment175(TInt aParam1, TInt aParam2) |
|
1136 { |
|
1137 ASM_ALL |
|
1138 ASM_RET |
|
1139 } |
|
1140 |
|
1141 __NAKED__ TInt TestAlignment176(TInt aParam1, TInt aParam2) |
|
1142 { |
|
1143 ASM_ALL |
|
1144 ASM_RET |
|
1145 } |
|
1146 |
|
1147 __NAKED__ TInt TestAlignment177(TInt aParam1, TInt aParam2) |
|
1148 { |
|
1149 ASM_ALL |
|
1150 ASM_RET |
|
1151 } |
|
1152 |
|
1153 __NAKED__ TInt TestAlignment178(TInt aParam1, TInt aParam2) |
|
1154 { |
|
1155 ASM_ALL |
|
1156 ASM_RET |
|
1157 } |
|
1158 |
|
1159 __NAKED__ TInt TestAlignment179(TInt aParam1, TInt aParam2) |
|
1160 { |
|
1161 ASM_ALL |
|
1162 ASM_RET |
|
1163 } |
|
1164 |
|
1165 __NAKED__ TInt TestAlignment180(TInt aParam1, TInt aParam2) |
|
1166 { |
|
1167 ASM_ALL |
|
1168 ASM_RET |
|
1169 } |
|
1170 |
|
1171 __NAKED__ TInt TestAlignment181(TInt aParam1, TInt aParam2) |
|
1172 { |
|
1173 ASM_ALL |
|
1174 ASM_RET |
|
1175 } |
|
1176 |
|
1177 __NAKED__ TInt TestAlignment182(TInt aParam1, TInt aParam2) |
|
1178 { |
|
1179 ASM_ALL |
|
1180 ASM_RET |
|
1181 } |
|
1182 |
|
1183 __NAKED__ TInt TestAlignment183(TInt aParam1, TInt aParam2) |
|
1184 { |
|
1185 ASM_ALL |
|
1186 ASM_RET |
|
1187 } |
|
1188 |
|
1189 __NAKED__ TInt TestAlignment184(TInt aParam1, TInt aParam2) |
|
1190 { |
|
1191 ASM_ALL |
|
1192 ASM_RET |
|
1193 } |
|
1194 |
|
1195 __NAKED__ TInt TestAlignment185(TInt aParam1, TInt aParam2) |
|
1196 { |
|
1197 ASM_ALL |
|
1198 ASM_RET |
|
1199 } |
|
1200 |
|
1201 __NAKED__ TInt TestAlignment186(TInt aParam1, TInt aParam2) |
|
1202 { |
|
1203 ASM_ALL |
|
1204 ASM_RET |
|
1205 } |
|
1206 |
|
1207 __NAKED__ TInt TestAlignment187(TInt aParam1, TInt aParam2) |
|
1208 { |
|
1209 ASM_ALL |
|
1210 ASM_RET |
|
1211 } |
|
1212 |
|
1213 __NAKED__ TInt TestAlignment188(TInt aParam1, TInt aParam2) |
|
1214 { |
|
1215 ASM_ALL |
|
1216 ASM_RET |
|
1217 } |
|
1218 |
|
1219 __NAKED__ TInt TestAlignment189(TInt aParam1, TInt aParam2) |
|
1220 { |
|
1221 ASM_ALL |
|
1222 ASM_RET |
|
1223 } |
|
1224 |
|
1225 __NAKED__ TInt TestAlignment190(TInt aParam1, TInt aParam2) |
|
1226 { |
|
1227 ASM_ALL |
|
1228 ASM_RET |
|
1229 } |
|
1230 |
|
1231 __NAKED__ TInt TestAlignment191(TInt aParam1, TInt aParam2) |
|
1232 { |
|
1233 ASM_ALL |
|
1234 ASM_RET |
|
1235 } |
|
1236 |
|
1237 __NAKED__ TInt TestAlignment192(TInt aParam1, TInt aParam2) |
|
1238 { |
|
1239 ASM_ALL |
|
1240 ASM_RET |
|
1241 } |
|
1242 |
|
1243 __NAKED__ TInt TestAlignment193(TInt aParam1, TInt aParam2) |
|
1244 { |
|
1245 ASM_ALL |
|
1246 ASM_RET |
|
1247 } |
|
1248 |
|
1249 __NAKED__ TInt TestAlignment194(TInt aParam1, TInt aParam2) |
|
1250 { |
|
1251 ASM_ALL |
|
1252 ASM_RET |
|
1253 } |
|
1254 |
|
1255 __NAKED__ TInt TestAlignment195(TInt aParam1, TInt aParam2) |
|
1256 { |
|
1257 ASM_ALL |
|
1258 ASM_RET |
|
1259 } |
|
1260 |
|
1261 __NAKED__ TInt TestAlignment196(TInt aParam1, TInt aParam2) |
|
1262 { |
|
1263 ASM_ALL |
|
1264 ASM_RET |
|
1265 } |
|
1266 |
|
1267 __NAKED__ TInt TestAlignment197(TInt aParam1, TInt aParam2) |
|
1268 { |
|
1269 ASM_ALL |
|
1270 ASM_RET |
|
1271 } |
|
1272 |
|
1273 __NAKED__ TInt TestAlignment198(TInt aParam1, TInt aParam2) |
|
1274 { |
|
1275 ASM_ALL |
|
1276 ASM_RET |
|
1277 } |
|
1278 |
|
1279 __NAKED__ TInt TestAlignment199(TInt aParam1, TInt aParam2) |
|
1280 { |
|
1281 ASM_ALL |
|
1282 ASM_RET |
|
1283 } |
|
1284 |
|
1285 __NAKED__ TInt TestAlignment200(TInt aParam1, TInt aParam2) |
|
1286 { |
|
1287 ASM_ALL |
|
1288 ASM_RET |
|
1289 } |
|
1290 |
|
1291 __NAKED__ TInt TestAlignment201(TInt aParam1, TInt aParam2) |
|
1292 { |
|
1293 ASM_ALL |
|
1294 ASM_RET |
|
1295 } |
|
1296 |
|
1297 __NAKED__ TInt TestAlignment202(TInt aParam1, TInt aParam2) |
|
1298 { |
|
1299 ASM_ALL |
|
1300 ASM_RET |
|
1301 } |
|
1302 |
|
1303 __NAKED__ TInt TestAlignment203(TInt aParam1, TInt aParam2) |
|
1304 { |
|
1305 ASM_ALL |
|
1306 ASM_RET |
|
1307 } |
|
1308 |
|
1309 __NAKED__ TInt TestAlignment204(TInt aParam1, TInt aParam2) |
|
1310 { |
|
1311 ASM_ALL |
|
1312 ASM_RET |
|
1313 } |
|
1314 |
|
1315 __NAKED__ TInt TestAlignment205(TInt aParam1, TInt aParam2) |
|
1316 { |
|
1317 ASM_ALL |
|
1318 ASM_RET |
|
1319 } |
|
1320 |
|
1321 __NAKED__ TInt TestAlignment206(TInt aParam1, TInt aParam2) |
|
1322 { |
|
1323 ASM_ALL |
|
1324 ASM_RET |
|
1325 } |
|
1326 |
|
1327 __NAKED__ TInt TestAlignment207(TInt aParam1, TInt aParam2) |
|
1328 { |
|
1329 ASM_ALL |
|
1330 ASM_RET |
|
1331 } |
|
1332 |
|
1333 __NAKED__ TInt TestAlignment208(TInt aParam1, TInt aParam2) |
|
1334 { |
|
1335 ASM_ALL |
|
1336 ASM_RET |
|
1337 } |
|
1338 |
|
1339 __NAKED__ TInt TestAlignment209(TInt aParam1, TInt aParam2) |
|
1340 { |
|
1341 ASM_ALL |
|
1342 ASM_RET |
|
1343 } |
|
1344 |
|
1345 __NAKED__ TInt TestAlignment210(TInt aParam1, TInt aParam2) |
|
1346 { |
|
1347 ASM_ALL |
|
1348 ASM_RET |
|
1349 } |
|
1350 |
|
1351 __NAKED__ TInt TestAlignment211(TInt aParam1, TInt aParam2) |
|
1352 { |
|
1353 ASM_ALL |
|
1354 ASM_RET |
|
1355 } |
|
1356 |
|
1357 __NAKED__ TInt TestAlignment212(TInt aParam1, TInt aParam2) |
|
1358 { |
|
1359 ASM_ALL |
|
1360 ASM_RET |
|
1361 } |
|
1362 |
|
1363 __NAKED__ TInt TestAlignment213(TInt aParam1, TInt aParam2) |
|
1364 { |
|
1365 ASM_ALL |
|
1366 ASM_RET |
|
1367 } |
|
1368 |
|
1369 __NAKED__ TInt TestAlignment214(TInt aParam1, TInt aParam2) |
|
1370 { |
|
1371 ASM_ALL |
|
1372 ASM_RET |
|
1373 } |
|
1374 |
|
1375 __NAKED__ TInt TestAlignment215(TInt aParam1, TInt aParam2) |
|
1376 { |
|
1377 ASM_ALL |
|
1378 ASM_RET |
|
1379 } |
|
1380 |
|
1381 __NAKED__ TInt TestAlignment216(TInt aParam1, TInt aParam2) |
|
1382 { |
|
1383 ASM_ALL |
|
1384 ASM_RET |
|
1385 } |
|
1386 |
|
1387 __NAKED__ TInt TestAlignment217(TInt aParam1, TInt aParam2) |
|
1388 { |
|
1389 ASM_ALL |
|
1390 ASM_RET |
|
1391 } |
|
1392 |
|
1393 __NAKED__ TInt TestAlignment218(TInt aParam1, TInt aParam2) |
|
1394 { |
|
1395 ASM_ALL |
|
1396 ASM_RET |
|
1397 } |
|
1398 |
|
1399 __NAKED__ TInt TestAlignment219(TInt aParam1, TInt aParam2) |
|
1400 { |
|
1401 ASM_ALL |
|
1402 ASM_RET |
|
1403 } |
|
1404 |
|
1405 __NAKED__ TInt TestAlignment220(TInt aParam1, TInt aParam2) |
|
1406 { |
|
1407 ASM_ALL |
|
1408 ASM_RET |
|
1409 } |
|
1410 |
|
1411 __NAKED__ TInt TestAlignment221(TInt aParam1, TInt aParam2) |
|
1412 { |
|
1413 ASM_ALL |
|
1414 ASM_RET |
|
1415 } |
|
1416 |
|
1417 __NAKED__ TInt TestAlignment222(TInt aParam1, TInt aParam2) |
|
1418 { |
|
1419 ASM_ALL |
|
1420 ASM_RET |
|
1421 } |
|
1422 |
|
1423 __NAKED__ TInt TestAlignment223(TInt aParam1, TInt aParam2) |
|
1424 { |
|
1425 ASM_ALL |
|
1426 ASM_RET |
|
1427 } |
|
1428 |
|
1429 __NAKED__ TInt TestAlignment224(TInt aParam1, TInt aParam2) |
|
1430 { |
|
1431 ASM_ALL |
|
1432 ASM_RET |
|
1433 } |
|
1434 |
|
1435 __NAKED__ TInt TestAlignment225(TInt aParam1, TInt aParam2) |
|
1436 { |
|
1437 ASM_ALL |
|
1438 ASM_RET |
|
1439 } |
|
1440 |
|
1441 __NAKED__ TInt TestAlignment226(TInt aParam1, TInt aParam2) |
|
1442 { |
|
1443 ASM_ALL |
|
1444 ASM_RET |
|
1445 } |
|
1446 |
|
1447 __NAKED__ TInt TestAlignment227(TInt aParam1, TInt aParam2) |
|
1448 { |
|
1449 ASM_ALL |
|
1450 ASM_RET |
|
1451 } |
|
1452 |
|
1453 __NAKED__ TInt TestAlignment228(TInt aParam1, TInt aParam2) |
|
1454 { |
|
1455 ASM_ALL |
|
1456 ASM_RET |
|
1457 } |
|
1458 |
|
1459 __NAKED__ TInt TestAlignment229(TInt aParam1, TInt aParam2) |
|
1460 { |
|
1461 ASM_ALL |
|
1462 ASM_RET |
|
1463 } |
|
1464 |
|
1465 __NAKED__ TInt TestAlignment230(TInt aParam1, TInt aParam2) |
|
1466 { |
|
1467 ASM_ALL |
|
1468 ASM_RET |
|
1469 } |
|
1470 |
|
1471 __NAKED__ TInt TestAlignment231(TInt aParam1, TInt aParam2) |
|
1472 { |
|
1473 ASM_ALL |
|
1474 ASM_RET |
|
1475 } |
|
1476 |
|
1477 __NAKED__ TInt TestAlignment232(TInt aParam1, TInt aParam2) |
|
1478 { |
|
1479 ASM_ALL |
|
1480 ASM_RET |
|
1481 } |
|
1482 |
|
1483 __NAKED__ TInt TestAlignment233(TInt aParam1, TInt aParam2) |
|
1484 { |
|
1485 ASM_ALL |
|
1486 ASM_RET |
|
1487 } |
|
1488 |
|
1489 __NAKED__ TInt TestAlignment234(TInt aParam1, TInt aParam2) |
|
1490 { |
|
1491 ASM_ALL |
|
1492 ASM_RET |
|
1493 } |
|
1494 |
|
1495 __NAKED__ TInt TestAlignment235(TInt aParam1, TInt aParam2) |
|
1496 { |
|
1497 ASM_ALL |
|
1498 ASM_RET |
|
1499 } |
|
1500 |
|
1501 __NAKED__ TInt TestAlignment236(TInt aParam1, TInt aParam2) |
|
1502 { |
|
1503 ASM_ALL |
|
1504 ASM_RET |
|
1505 } |
|
1506 |
|
1507 __NAKED__ TInt TestAlignment237(TInt aParam1, TInt aParam2) |
|
1508 { |
|
1509 ASM_ALL |
|
1510 ASM_RET |
|
1511 } |
|
1512 |
|
1513 __NAKED__ TInt TestAlignment238(TInt aParam1, TInt aParam2) |
|
1514 { |
|
1515 ASM_ALL |
|
1516 ASM_RET |
|
1517 } |
|
1518 |
|
1519 __NAKED__ TInt TestAlignment239(TInt aParam1, TInt aParam2) |
|
1520 { |
|
1521 ASM_ALL |
|
1522 ASM_RET |
|
1523 } |
|
1524 |
|
1525 __NAKED__ TInt TestAlignment240(TInt aParam1, TInt aParam2) |
|
1526 { |
|
1527 ASM_ALL |
|
1528 ASM_RET |
|
1529 } |
|
1530 |
|
1531 __NAKED__ TInt TestAlignment241(TInt aParam1, TInt aParam2) |
|
1532 { |
|
1533 ASM_ALL |
|
1534 ASM_RET |
|
1535 } |
|
1536 |
|
1537 __NAKED__ TInt TestAlignment242(TInt aParam1, TInt aParam2) |
|
1538 { |
|
1539 ASM_ALL |
|
1540 ASM_RET |
|
1541 } |
|
1542 |
|
1543 __NAKED__ TInt TestAlignment243(TInt aParam1, TInt aParam2) |
|
1544 { |
|
1545 ASM_ALL |
|
1546 ASM_RET |
|
1547 } |
|
1548 |
|
1549 __NAKED__ TInt TestAlignment244(TInt aParam1, TInt aParam2) |
|
1550 { |
|
1551 ASM_ALL |
|
1552 ASM_RET |
|
1553 } |
|
1554 |
|
1555 __NAKED__ TInt TestAlignment245(TInt aParam1, TInt aParam2) |
|
1556 { |
|
1557 ASM_ALL |
|
1558 ASM_RET |
|
1559 } |
|
1560 |
|
1561 __NAKED__ TInt TestAlignment246(TInt aParam1, TInt aParam2) |
|
1562 { |
|
1563 ASM_ALL |
|
1564 ASM_RET |
|
1565 } |
|
1566 |
|
1567 __NAKED__ TInt TestAlignment247(TInt aParam1, TInt aParam2) |
|
1568 { |
|
1569 ASM_ALL |
|
1570 ASM_RET |
|
1571 } |
|
1572 |
|
1573 __NAKED__ TInt TestAlignment248(TInt aParam1, TInt aParam2) |
|
1574 { |
|
1575 ASM_ALL |
|
1576 ASM_RET |
|
1577 } |
|
1578 |
|
1579 __NAKED__ TInt TestAlignment249(TInt aParam1, TInt aParam2) |
|
1580 { |
|
1581 ASM_ALL |
|
1582 ASM_RET |
|
1583 } |
|
1584 |
|
1585 __NAKED__ TInt TestAlignment250(TInt aParam1, TInt aParam2) |
|
1586 { |
|
1587 ASM_ALL |
|
1588 ASM_RET |
|
1589 } |
|
1590 |
|
1591 __NAKED__ TInt TestAlignment251(TInt aParam1, TInt aParam2) |
|
1592 { |
|
1593 ASM_ALL |
|
1594 ASM_RET |
|
1595 } |
|
1596 |
|
1597 __NAKED__ TInt TestAlignment252(TInt aParam1, TInt aParam2) |
|
1598 { |
|
1599 ASM_ALL |
|
1600 ASM_RET |
|
1601 } |
|
1602 |
|
1603 __NAKED__ TInt TestAlignment253(TInt aParam1, TInt aParam2) |
|
1604 { |
|
1605 ASM_ALL |
|
1606 ASM_RET |
|
1607 } |
|
1608 |
|
1609 __NAKED__ TInt TestAlignment254(TInt aParam1, TInt aParam2) |
|
1610 { |
|
1611 ASM_ALL |
|
1612 ASM_RET |
|
1613 } |
|
1614 |
|
1615 __NAKED__ TInt TestAlignment255(TInt aParam1, TInt aParam2) |
|
1616 { |
|
1617 ASM_ALL |
|
1618 ASM_RET |
|
1619 } |
|
1620 |
|
1621 #define DUMMY_ARRAY_SIZE 4096 |
|
1622 TInt dummyArray[DUMMY_ARRAY_SIZE]; // 4 pages, probably spanning 5 pages? |
|
1623 |
|
1624 __NAKED__ TInt DoLdmia(TInt *aAddress) |
|
1625 { |
|
1626 #ifdef __X86__ |
|
1627 return 0; |
|
1628 #else |
|
1629 asm("ldmia r0, {r0,r1}"); |
|
1630 asm("bx lr"); |
|
1631 #endif |
|
1632 } |
|
1633 |
|
1634 __NAKED__ TInt TestAlignmentxXXx(TInt aParam1) |
|
1635 { |
|
1636 #ifdef __X86__ |
|
1637 return 0; |
|
1638 #else |
|
1639 space 4096 |
|
1640 BX lr |
|
1641 ENDP |
|
1642 #endif |
|
1643 } |
|
1644 |
|
1645 TInt *CheckLdmiaInstr(void) |
|
1646 { |
|
1647 TInt *pIntArray; |
|
1648 TInt offset = ((TInt)dummyArray) % 4096; |
|
1649 |
|
1650 if (offset == 0) |
|
1651 { |
|
1652 pIntArray = (TInt *)(((TInt)dummyArray) + 4092); |
|
1653 } |
|
1654 else |
|
1655 { |
|
1656 pIntArray = (TInt *)(((TInt)dummyArray) + (4092 - offset)); |
|
1657 } |
|
1658 DoLdmia(pIntArray); |
|
1659 return pIntArray; |
|
1660 } |
|
1661 |
|
1662 #endif //T_PAGESTRESS_LARGE_ARRAY |
|
1663 |
|
1664 #else |
|
1665 |
|
1666 #define TPS_DECLARE(_num) \ |
|
1667 TInt TestAlignment##_num(TInt aParam1, TInt aParam2)\ |
|
1668 {\ |
|
1669 return aParam1 + aParam2;\ |
|
1670 } |
|
1671 |
|
1672 TPS_DECLARE(0) |
|
1673 TPS_DECLARE(1) |
|
1674 TPS_DECLARE(2) |
|
1675 TPS_DECLARE(3) |
|
1676 TPS_DECLARE(4) |
|
1677 TPS_DECLARE(5) |
|
1678 TPS_DECLARE(6) |
|
1679 TPS_DECLARE(7) |
|
1680 TPS_DECLARE(8) |
|
1681 TPS_DECLARE(9) |
|
1682 TPS_DECLARE(10) |
|
1683 TPS_DECLARE(11) |
|
1684 TPS_DECLARE(12) |
|
1685 TPS_DECLARE(13) |
|
1686 TPS_DECLARE(14) |
|
1687 TPS_DECLARE(15) |
|
1688 TPS_DECLARE(16) |
|
1689 TPS_DECLARE(17) |
|
1690 TPS_DECLARE(18) |
|
1691 TPS_DECLARE(19) |
|
1692 TPS_DECLARE(20) |
|
1693 TPS_DECLARE(21) |
|
1694 TPS_DECLARE(22) |
|
1695 TPS_DECLARE(23) |
|
1696 TPS_DECLARE(24) |
|
1697 TPS_DECLARE(25) |
|
1698 TPS_DECLARE(26) |
|
1699 TPS_DECLARE(27) |
|
1700 TPS_DECLARE(28) |
|
1701 TPS_DECLARE(29) |
|
1702 TPS_DECLARE(30) |
|
1703 TPS_DECLARE(31) |
|
1704 TPS_DECLARE(32) |
|
1705 TPS_DECLARE(33) |
|
1706 TPS_DECLARE(34) |
|
1707 TPS_DECLARE(35) |
|
1708 TPS_DECLARE(36) |
|
1709 TPS_DECLARE(37) |
|
1710 TPS_DECLARE(38) |
|
1711 TPS_DECLARE(39) |
|
1712 TPS_DECLARE(40) |
|
1713 TPS_DECLARE(41) |
|
1714 TPS_DECLARE(42) |
|
1715 TPS_DECLARE(43) |
|
1716 TPS_DECLARE(44) |
|
1717 TPS_DECLARE(45) |
|
1718 TPS_DECLARE(46) |
|
1719 TPS_DECLARE(47) |
|
1720 TPS_DECLARE(48) |
|
1721 TPS_DECLARE(49) |
|
1722 TPS_DECLARE(50) |
|
1723 TPS_DECLARE(51) |
|
1724 TPS_DECLARE(52) |
|
1725 TPS_DECLARE(53) |
|
1726 TPS_DECLARE(54) |
|
1727 TPS_DECLARE(55) |
|
1728 TPS_DECLARE(56) |
|
1729 TPS_DECLARE(57) |
|
1730 TPS_DECLARE(58) |
|
1731 TPS_DECLARE(59) |
|
1732 TPS_DECLARE(60) |
|
1733 TPS_DECLARE(61) |
|
1734 TPS_DECLARE(62) |
|
1735 TPS_DECLARE(63) |
|
1736 #ifdef T_PAGESTRESS_LARGE_ARRAY |
|
1737 TPS_DECLARE(64) |
|
1738 TPS_DECLARE(65) |
|
1739 TPS_DECLARE(66) |
|
1740 TPS_DECLARE(67) |
|
1741 TPS_DECLARE(68) |
|
1742 TPS_DECLARE(69) |
|
1743 TPS_DECLARE(70) |
|
1744 TPS_DECLARE(71) |
|
1745 TPS_DECLARE(72) |
|
1746 TPS_DECLARE(73) |
|
1747 TPS_DECLARE(74) |
|
1748 TPS_DECLARE(75) |
|
1749 TPS_DECLARE(76) |
|
1750 TPS_DECLARE(77) |
|
1751 TPS_DECLARE(78) |
|
1752 TPS_DECLARE(79) |
|
1753 TPS_DECLARE(80) |
|
1754 TPS_DECLARE(81) |
|
1755 TPS_DECLARE(82) |
|
1756 TPS_DECLARE(83) |
|
1757 TPS_DECLARE(84) |
|
1758 TPS_DECLARE(85) |
|
1759 TPS_DECLARE(86) |
|
1760 TPS_DECLARE(87) |
|
1761 TPS_DECLARE(88) |
|
1762 TPS_DECLARE(89) |
|
1763 TPS_DECLARE(90) |
|
1764 TPS_DECLARE(91) |
|
1765 TPS_DECLARE(92) |
|
1766 TPS_DECLARE(93) |
|
1767 TPS_DECLARE(94) |
|
1768 TPS_DECLARE(95) |
|
1769 TPS_DECLARE(96) |
|
1770 TPS_DECLARE(97) |
|
1771 TPS_DECLARE(98) |
|
1772 TPS_DECLARE(99) |
|
1773 TPS_DECLARE(100) |
|
1774 TPS_DECLARE(101) |
|
1775 TPS_DECLARE(102) |
|
1776 TPS_DECLARE(103) |
|
1777 TPS_DECLARE(104) |
|
1778 TPS_DECLARE(105) |
|
1779 TPS_DECLARE(106) |
|
1780 TPS_DECLARE(107) |
|
1781 TPS_DECLARE(108) |
|
1782 TPS_DECLARE(109) |
|
1783 TPS_DECLARE(110) |
|
1784 TPS_DECLARE(111) |
|
1785 TPS_DECLARE(112) |
|
1786 TPS_DECLARE(113) |
|
1787 TPS_DECLARE(114) |
|
1788 TPS_DECLARE(115) |
|
1789 TPS_DECLARE(116) |
|
1790 TPS_DECLARE(117) |
|
1791 TPS_DECLARE(118) |
|
1792 TPS_DECLARE(119) |
|
1793 TPS_DECLARE(120) |
|
1794 TPS_DECLARE(121) |
|
1795 TPS_DECLARE(122) |
|
1796 TPS_DECLARE(123) |
|
1797 TPS_DECLARE(124) |
|
1798 TPS_DECLARE(125) |
|
1799 TPS_DECLARE(126) |
|
1800 TPS_DECLARE(127) |
|
1801 TPS_DECLARE(128) |
|
1802 TPS_DECLARE(129) |
|
1803 TPS_DECLARE(130) |
|
1804 TPS_DECLARE(131) |
|
1805 TPS_DECLARE(132) |
|
1806 TPS_DECLARE(133) |
|
1807 TPS_DECLARE(134) |
|
1808 TPS_DECLARE(135) |
|
1809 TPS_DECLARE(136) |
|
1810 TPS_DECLARE(137) |
|
1811 TPS_DECLARE(138) |
|
1812 TPS_DECLARE(139) |
|
1813 TPS_DECLARE(140) |
|
1814 TPS_DECLARE(141) |
|
1815 TPS_DECLARE(142) |
|
1816 TPS_DECLARE(143) |
|
1817 TPS_DECLARE(144) |
|
1818 TPS_DECLARE(145) |
|
1819 TPS_DECLARE(146) |
|
1820 TPS_DECLARE(147) |
|
1821 TPS_DECLARE(148) |
|
1822 TPS_DECLARE(149) |
|
1823 TPS_DECLARE(150) |
|
1824 TPS_DECLARE(151) |
|
1825 TPS_DECLARE(152) |
|
1826 TPS_DECLARE(153) |
|
1827 TPS_DECLARE(154) |
|
1828 TPS_DECLARE(155) |
|
1829 TPS_DECLARE(156) |
|
1830 TPS_DECLARE(157) |
|
1831 TPS_DECLARE(158) |
|
1832 TPS_DECLARE(159) |
|
1833 TPS_DECLARE(160) |
|
1834 TPS_DECLARE(161) |
|
1835 TPS_DECLARE(162) |
|
1836 TPS_DECLARE(163) |
|
1837 TPS_DECLARE(164) |
|
1838 TPS_DECLARE(165) |
|
1839 TPS_DECLARE(166) |
|
1840 TPS_DECLARE(167) |
|
1841 TPS_DECLARE(168) |
|
1842 TPS_DECLARE(169) |
|
1843 TPS_DECLARE(170) |
|
1844 TPS_DECLARE(171) |
|
1845 TPS_DECLARE(172) |
|
1846 TPS_DECLARE(173) |
|
1847 TPS_DECLARE(174) |
|
1848 TPS_DECLARE(175) |
|
1849 TPS_DECLARE(176) |
|
1850 TPS_DECLARE(177) |
|
1851 TPS_DECLARE(178) |
|
1852 TPS_DECLARE(179) |
|
1853 TPS_DECLARE(180) |
|
1854 TPS_DECLARE(181) |
|
1855 TPS_DECLARE(182) |
|
1856 TPS_DECLARE(183) |
|
1857 TPS_DECLARE(184) |
|
1858 TPS_DECLARE(185) |
|
1859 TPS_DECLARE(186) |
|
1860 TPS_DECLARE(187) |
|
1861 TPS_DECLARE(188) |
|
1862 TPS_DECLARE(189) |
|
1863 TPS_DECLARE(190) |
|
1864 TPS_DECLARE(191) |
|
1865 TPS_DECLARE(192) |
|
1866 TPS_DECLARE(193) |
|
1867 TPS_DECLARE(194) |
|
1868 TPS_DECLARE(195) |
|
1869 TPS_DECLARE(196) |
|
1870 TPS_DECLARE(197) |
|
1871 TPS_DECLARE(198) |
|
1872 TPS_DECLARE(199) |
|
1873 TPS_DECLARE(200) |
|
1874 TPS_DECLARE(201) |
|
1875 TPS_DECLARE(202) |
|
1876 TPS_DECLARE(203) |
|
1877 TPS_DECLARE(204) |
|
1878 TPS_DECLARE(205) |
|
1879 TPS_DECLARE(206) |
|
1880 TPS_DECLARE(207) |
|
1881 TPS_DECLARE(208) |
|
1882 TPS_DECLARE(209) |
|
1883 TPS_DECLARE(210) |
|
1884 TPS_DECLARE(211) |
|
1885 TPS_DECLARE(212) |
|
1886 TPS_DECLARE(213) |
|
1887 TPS_DECLARE(214) |
|
1888 TPS_DECLARE(215) |
|
1889 TPS_DECLARE(216) |
|
1890 TPS_DECLARE(217) |
|
1891 TPS_DECLARE(218) |
|
1892 TPS_DECLARE(219) |
|
1893 TPS_DECLARE(220) |
|
1894 TPS_DECLARE(221) |
|
1895 TPS_DECLARE(222) |
|
1896 TPS_DECLARE(223) |
|
1897 TPS_DECLARE(224) |
|
1898 TPS_DECLARE(225) |
|
1899 TPS_DECLARE(226) |
|
1900 TPS_DECLARE(227) |
|
1901 TPS_DECLARE(228) |
|
1902 TPS_DECLARE(229) |
|
1903 TPS_DECLARE(230) |
|
1904 TPS_DECLARE(231) |
|
1905 TPS_DECLARE(232) |
|
1906 TPS_DECLARE(233) |
|
1907 TPS_DECLARE(234) |
|
1908 TPS_DECLARE(235) |
|
1909 TPS_DECLARE(236) |
|
1910 TPS_DECLARE(237) |
|
1911 TPS_DECLARE(238) |
|
1912 TPS_DECLARE(239) |
|
1913 TPS_DECLARE(240) |
|
1914 TPS_DECLARE(241) |
|
1915 TPS_DECLARE(242) |
|
1916 TPS_DECLARE(243) |
|
1917 TPS_DECLARE(244) |
|
1918 TPS_DECLARE(245) |
|
1919 TPS_DECLARE(246) |
|
1920 TPS_DECLARE(247) |
|
1921 TPS_DECLARE(248) |
|
1922 TPS_DECLARE(249) |
|
1923 TPS_DECLARE(250) |
|
1924 TPS_DECLARE(251) |
|
1925 TPS_DECLARE(252) |
|
1926 TPS_DECLARE(253) |
|
1927 TPS_DECLARE(254) |
|
1928 TPS_DECLARE(255) |
|
1929 #endif //T_PAGESTRESS_LARGE_ARRAY |
|
1930 |
|
1931 TInt *CheckLdmiaInstr(void) |
|
1932 { |
|
1933 return NULL; |
|
1934 } |
|
1935 |
|
1936 |
|
1937 #endif // __ARMCC__ |
|
1938 |
|
1939 TInt CallTestFunc(TInt aParam1, TInt aParam2, TInt aIndex) |
|
1940 { |
|
1941 #define CALLFUNC(_num) case _num: return TestAlignment##_num(aParam1, aParam2); |
|
1942 |
|
1943 switch (aIndex) |
|
1944 { |
|
1945 CALLFUNC(0) |
|
1946 CALLFUNC(1) |
|
1947 CALLFUNC(2) |
|
1948 CALLFUNC(3) |
|
1949 CALLFUNC(4) |
|
1950 CALLFUNC(5) |
|
1951 CALLFUNC(6) |
|
1952 CALLFUNC(7) |
|
1953 CALLFUNC(8) |
|
1954 CALLFUNC(9) |
|
1955 CALLFUNC(10) |
|
1956 CALLFUNC(11) |
|
1957 CALLFUNC(12) |
|
1958 CALLFUNC(13) |
|
1959 CALLFUNC(14) |
|
1960 CALLFUNC(15) |
|
1961 CALLFUNC(16) |
|
1962 CALLFUNC(17) |
|
1963 CALLFUNC(18) |
|
1964 CALLFUNC(19) |
|
1965 CALLFUNC(20) |
|
1966 CALLFUNC(21) |
|
1967 CALLFUNC(22) |
|
1968 CALLFUNC(23) |
|
1969 CALLFUNC(24) |
|
1970 CALLFUNC(25) |
|
1971 CALLFUNC(26) |
|
1972 CALLFUNC(27) |
|
1973 CALLFUNC(28) |
|
1974 CALLFUNC(29) |
|
1975 CALLFUNC(30) |
|
1976 CALLFUNC(31) |
|
1977 CALLFUNC(32) |
|
1978 CALLFUNC(33) |
|
1979 CALLFUNC(34) |
|
1980 CALLFUNC(35) |
|
1981 CALLFUNC(36) |
|
1982 CALLFUNC(37) |
|
1983 CALLFUNC(38) |
|
1984 CALLFUNC(39) |
|
1985 CALLFUNC(40) |
|
1986 CALLFUNC(41) |
|
1987 CALLFUNC(42) |
|
1988 CALLFUNC(43) |
|
1989 CALLFUNC(44) |
|
1990 CALLFUNC(45) |
|
1991 CALLFUNC(46) |
|
1992 CALLFUNC(47) |
|
1993 CALLFUNC(48) |
|
1994 CALLFUNC(49) |
|
1995 CALLFUNC(50) |
|
1996 CALLFUNC(51) |
|
1997 CALLFUNC(52) |
|
1998 CALLFUNC(53) |
|
1999 CALLFUNC(54) |
|
2000 CALLFUNC(55) |
|
2001 CALLFUNC(56) |
|
2002 CALLFUNC(57) |
|
2003 CALLFUNC(58) |
|
2004 CALLFUNC(59) |
|
2005 CALLFUNC(60) |
|
2006 CALLFUNC(61) |
|
2007 CALLFUNC(62) |
|
2008 CALLFUNC(63) |
|
2009 #ifdef T_PAGESTRESS_LARGE_ARRAY |
|
2010 CALLFUNC(64) |
|
2011 CALLFUNC(65) |
|
2012 CALLFUNC(66) |
|
2013 CALLFUNC(67) |
|
2014 CALLFUNC(68) |
|
2015 CALLFUNC(69) |
|
2016 CALLFUNC(70) |
|
2017 CALLFUNC(71) |
|
2018 CALLFUNC(72) |
|
2019 CALLFUNC(73) |
|
2020 CALLFUNC(74) |
|
2021 CALLFUNC(75) |
|
2022 CALLFUNC(76) |
|
2023 CALLFUNC(77) |
|
2024 CALLFUNC(78) |
|
2025 CALLFUNC(79) |
|
2026 CALLFUNC(80) |
|
2027 CALLFUNC(81) |
|
2028 CALLFUNC(82) |
|
2029 CALLFUNC(83) |
|
2030 CALLFUNC(84) |
|
2031 CALLFUNC(85) |
|
2032 CALLFUNC(86) |
|
2033 CALLFUNC(87) |
|
2034 CALLFUNC(88) |
|
2035 CALLFUNC(89) |
|
2036 CALLFUNC(90) |
|
2037 CALLFUNC(91) |
|
2038 CALLFUNC(92) |
|
2039 CALLFUNC(93) |
|
2040 CALLFUNC(94) |
|
2041 CALLFUNC(95) |
|
2042 CALLFUNC(96) |
|
2043 CALLFUNC(97) |
|
2044 CALLFUNC(98) |
|
2045 CALLFUNC(99) |
|
2046 CALLFUNC(100) |
|
2047 CALLFUNC(101) |
|
2048 CALLFUNC(102) |
|
2049 CALLFUNC(103) |
|
2050 CALLFUNC(104) |
|
2051 CALLFUNC(105) |
|
2052 CALLFUNC(106) |
|
2053 CALLFUNC(107) |
|
2054 CALLFUNC(108) |
|
2055 CALLFUNC(109) |
|
2056 CALLFUNC(110) |
|
2057 CALLFUNC(111) |
|
2058 CALLFUNC(112) |
|
2059 CALLFUNC(113) |
|
2060 CALLFUNC(114) |
|
2061 CALLFUNC(115) |
|
2062 CALLFUNC(116) |
|
2063 CALLFUNC(117) |
|
2064 CALLFUNC(118) |
|
2065 CALLFUNC(119) |
|
2066 CALLFUNC(120) |
|
2067 CALLFUNC(121) |
|
2068 CALLFUNC(122) |
|
2069 CALLFUNC(123) |
|
2070 CALLFUNC(124) |
|
2071 CALLFUNC(125) |
|
2072 CALLFUNC(126) |
|
2073 CALLFUNC(127) |
|
2074 CALLFUNC(128) |
|
2075 CALLFUNC(129) |
|
2076 CALLFUNC(130) |
|
2077 CALLFUNC(131) |
|
2078 CALLFUNC(132) |
|
2079 CALLFUNC(133) |
|
2080 CALLFUNC(134) |
|
2081 CALLFUNC(135) |
|
2082 CALLFUNC(136) |
|
2083 CALLFUNC(137) |
|
2084 CALLFUNC(138) |
|
2085 CALLFUNC(139) |
|
2086 CALLFUNC(140) |
|
2087 CALLFUNC(141) |
|
2088 CALLFUNC(142) |
|
2089 CALLFUNC(143) |
|
2090 CALLFUNC(144) |
|
2091 CALLFUNC(145) |
|
2092 CALLFUNC(146) |
|
2093 CALLFUNC(147) |
|
2094 CALLFUNC(148) |
|
2095 CALLFUNC(149) |
|
2096 CALLFUNC(150) |
|
2097 CALLFUNC(151) |
|
2098 CALLFUNC(152) |
|
2099 CALLFUNC(153) |
|
2100 CALLFUNC(154) |
|
2101 CALLFUNC(155) |
|
2102 CALLFUNC(156) |
|
2103 CALLFUNC(157) |
|
2104 CALLFUNC(158) |
|
2105 CALLFUNC(159) |
|
2106 CALLFUNC(160) |
|
2107 CALLFUNC(161) |
|
2108 CALLFUNC(162) |
|
2109 CALLFUNC(163) |
|
2110 CALLFUNC(164) |
|
2111 CALLFUNC(165) |
|
2112 CALLFUNC(166) |
|
2113 CALLFUNC(167) |
|
2114 CALLFUNC(168) |
|
2115 CALLFUNC(169) |
|
2116 CALLFUNC(170) |
|
2117 CALLFUNC(171) |
|
2118 CALLFUNC(172) |
|
2119 CALLFUNC(173) |
|
2120 CALLFUNC(174) |
|
2121 CALLFUNC(175) |
|
2122 CALLFUNC(176) |
|
2123 CALLFUNC(177) |
|
2124 CALLFUNC(178) |
|
2125 CALLFUNC(179) |
|
2126 CALLFUNC(180) |
|
2127 CALLFUNC(181) |
|
2128 CALLFUNC(182) |
|
2129 CALLFUNC(183) |
|
2130 CALLFUNC(184) |
|
2131 CALLFUNC(185) |
|
2132 CALLFUNC(186) |
|
2133 CALLFUNC(187) |
|
2134 CALLFUNC(188) |
|
2135 CALLFUNC(189) |
|
2136 CALLFUNC(190) |
|
2137 CALLFUNC(191) |
|
2138 CALLFUNC(192) |
|
2139 CALLFUNC(193) |
|
2140 CALLFUNC(194) |
|
2141 CALLFUNC(195) |
|
2142 CALLFUNC(196) |
|
2143 CALLFUNC(197) |
|
2144 CALLFUNC(198) |
|
2145 CALLFUNC(199) |
|
2146 CALLFUNC(200) |
|
2147 CALLFUNC(201) |
|
2148 CALLFUNC(202) |
|
2149 CALLFUNC(203) |
|
2150 CALLFUNC(204) |
|
2151 CALLFUNC(205) |
|
2152 CALLFUNC(206) |
|
2153 CALLFUNC(207) |
|
2154 CALLFUNC(208) |
|
2155 CALLFUNC(209) |
|
2156 CALLFUNC(210) |
|
2157 CALLFUNC(211) |
|
2158 CALLFUNC(212) |
|
2159 CALLFUNC(213) |
|
2160 CALLFUNC(214) |
|
2161 CALLFUNC(215) |
|
2162 CALLFUNC(216) |
|
2163 CALLFUNC(217) |
|
2164 CALLFUNC(218) |
|
2165 CALLFUNC(219) |
|
2166 CALLFUNC(220) |
|
2167 CALLFUNC(221) |
|
2168 CALLFUNC(222) |
|
2169 CALLFUNC(223) |
|
2170 CALLFUNC(224) |
|
2171 CALLFUNC(225) |
|
2172 CALLFUNC(226) |
|
2173 CALLFUNC(227) |
|
2174 CALLFUNC(228) |
|
2175 CALLFUNC(229) |
|
2176 CALLFUNC(230) |
|
2177 CALLFUNC(231) |
|
2178 CALLFUNC(232) |
|
2179 CALLFUNC(233) |
|
2180 CALLFUNC(234) |
|
2181 CALLFUNC(235) |
|
2182 CALLFUNC(236) |
|
2183 CALLFUNC(237) |
|
2184 CALLFUNC(238) |
|
2185 CALLFUNC(239) |
|
2186 CALLFUNC(240) |
|
2187 CALLFUNC(241) |
|
2188 CALLFUNC(242) |
|
2189 CALLFUNC(243) |
|
2190 CALLFUNC(244) |
|
2191 CALLFUNC(245) |
|
2192 CALLFUNC(246) |
|
2193 CALLFUNC(247) |
|
2194 CALLFUNC(248) |
|
2195 CALLFUNC(249) |
|
2196 CALLFUNC(250) |
|
2197 CALLFUNC(251) |
|
2198 CALLFUNC(252) |
|
2199 CALLFUNC(253) |
|
2200 CALLFUNC(254) |
|
2201 CALLFUNC(255) |
|
2202 #endif //T_PAGESTRESS_LARGE_ARRAY |
|
2203 default: break; |
|
2204 } |
|
2205 return 0; |
|
2206 } |
|
2207 |
|
2208 //#endif // defined(_DEBUG) || defined(_DEBUG_RELEASE) |
|
2209 |