1719 r = ExpandDstDesList(/*1*/); |
1720 r = ExpandDstDesList(/*1*/); |
1720 if (r != KErrNone) |
1721 if (r != KErrNone) |
1721 { |
1722 { |
1722 break; |
1723 break; |
1723 } |
1724 } |
|
1725 __DMA_ASSERTD(iSrcDesCount == iDstDesCount); |
1724 // Compute fragment size |
1726 // Compute fragment size |
1725 TUint c = Min(aMaxTransferLen, aCount); |
1727 TUint c = Min(aMaxTransferLen, aCount); |
1726 __KTRACE_OPT(KDMA, Kern::Printf("c = Min(aMaxTransferLen, aCount) = %d", c)); |
1728 __KTRACE_OPT(KDMA, Kern::Printf("c = Min(aMaxTransferLen, aCount) = %d", c)); |
1727 |
1729 |
1728 // SRC |
1730 // SRC |
1849 { |
1851 { |
1850 __KTRACE_OPT(KDMA, Kern::Printf("DDmaRequest::Queue thread %O", &Kern::CurrentThread())); |
1852 __KTRACE_OPT(KDMA, Kern::Printf("DDmaRequest::Queue thread %O", &Kern::CurrentThread())); |
1851 // Not configured? Call Fragment() first! |
1853 // Not configured? Call Fragment() first! |
1852 if (iChannel.iDmacCaps->iAsymHwDescriptors) |
1854 if (iChannel.iDmacCaps->iAsymHwDescriptors) |
1853 { |
1855 { |
1854 __DMA_ASSERTD((iSrcDesCount < 0) && (iDstDesCount < 0)); |
1856 __DMA_ASSERTD((iSrcDesCount > 0) && (iDstDesCount > 0)); |
1855 } |
1857 } |
1856 else |
1858 else |
1857 { |
1859 { |
1858 __DMA_ASSERTD(iDesCount > 0); |
1860 __DMA_ASSERTD(iDesCount > 0); |
1859 } |
1861 } |
2211 { |
2213 { |
2212 __DMA_ASSERTD((0 <= iSrcDesCount) && (iSrcDesCount <= iChannel.iMaxDesCount) && |
2214 __DMA_ASSERTD((0 <= iSrcDesCount) && (iSrcDesCount <= iChannel.iMaxDesCount) && |
2213 (0 <= iDstDesCount) && (iDstDesCount <= iChannel.iMaxDesCount)); |
2215 (0 <= iDstDesCount) && (iDstDesCount <= iChannel.iMaxDesCount)); |
2214 if (iSrcDesCount == 0) |
2216 if (iSrcDesCount == 0) |
2215 { |
2217 { |
|
2218 // Not fragmented yet |
2216 __DMA_ASSERTD(iDstDesCount == 0); |
2219 __DMA_ASSERTD(iDstDesCount == 0); |
2217 __DMA_ASSERTD(!iQueued); |
2220 __DMA_ASSERTD(!iQueued); |
2218 __DMA_ASSERTD(!iSrcFirstHdr && !iSrcLastHdr && |
2221 __DMA_ASSERTD(!iSrcFirstHdr && !iSrcLastHdr && |
2219 !iDstFirstHdr && !iDstLastHdr); |
2222 !iDstFirstHdr && !iDstLastHdr); |
2220 } |
2223 } |
|
2224 else if (iDstDesCount == 0) |
|
2225 { |
|
2226 // Src side only fragmented yet |
|
2227 __DMA_ASSERTD(iChannel.iController->IsValidHdr(iSrcFirstHdr)); |
|
2228 __DMA_ASSERTD(iChannel.iController->IsValidHdr(iSrcLastHdr)); |
|
2229 } |
2221 else |
2230 else |
2222 { |
2231 { |
|
2232 // Src & Dst sides fragmented |
2223 __DMA_ASSERTD(iChannel.iController->IsValidHdr(iSrcFirstHdr)); |
2233 __DMA_ASSERTD(iChannel.iController->IsValidHdr(iSrcFirstHdr)); |
2224 __DMA_ASSERTD(iChannel.iController->IsValidHdr(iSrcLastHdr)); |
2234 __DMA_ASSERTD(iChannel.iController->IsValidHdr(iSrcLastHdr)); |
2225 __DMA_ASSERTD(iChannel.iController->IsValidHdr(iDstFirstHdr)); |
2235 __DMA_ASSERTD(iChannel.iController->IsValidHdr(iDstFirstHdr)); |
2226 __DMA_ASSERTD(iChannel.iController->IsValidHdr(iDstLastHdr)); |
2236 __DMA_ASSERTD(iChannel.iController->IsValidHdr(iDstLastHdr)); |
2227 } |
|
2228 if (iChannel.iDmacCaps->iBalancedAsymSegments) |
|
2229 { |
|
2230 __DMA_ASSERTD(iSrcDesCount == iDstDesCount); |
|
2231 } |
2237 } |
2232 } |
2238 } |
2233 else |
2239 else |
2234 { |
2240 { |
2235 __DMA_ASSERTD((0 <= iDesCount) && (iDesCount <= iChannel.iMaxDesCount)); |
2241 __DMA_ASSERTD((0 <= iDesCount) && (iDesCount <= iChannel.iMaxDesCount)); |