FCL/sf/os/kernelhwsrv: comparison kernel/eka/drivers/dma/dma2

equal deleted inserted replaced

-:43365a9b78a3
+:d8d70de2bd36
 #include <drivers/dma_hai.h>
 #include <kernel/kern_priv.h>
-// Symbian Min() & Max() are broken, so we have to define them ourselves
+// Symbian _Min() & _Max() are broken, so we have to define them ourselves
-inline TUint Min(TUint aLeft, TUint aRight)
+inline TUint _Min(TUint aLeft, TUint aRight)
 	{return(aLeft < aRight ? aLeft : aRight);}
-inline TUint Max(TUint aLeft, TUint aRight)
+inline TUint _Max(TUint aLeft, TUint aRight)
 	{return(aLeft > aRight ? aLeft : aRight);}
-// Uncomment the following #define only when freezing the DMA2 export library.
+// The following section is used only when freezing the DMA2 export library
-//#define __FREEZE_DMA2_LIB
+/*
-#ifdef __FREEZE_DMA2_LIB
 TInt DmaChannelMgr::StaticExtension(TInt, TAny*) {return 0;}
 TDmaChannel* DmaChannelMgr::Open(TUint32, TBool, TUint) {return 0;}
 void DmaChannelMgr::Close(TDmaChannel*) {}
 EXPORT_C const TDmaTestInfo& DmaTestInfo() {static TDmaTestInfo a; return a;}
 EXPORT_C const TDmaV2TestInfo& DmaTestInfoV2() {static TDmaV2TestInfo a; return a;}
-#endif	// #ifdef __FREEZE_DMA2_LIB
+*/
 static const char KDmaPanicCat[] = "DMA " __FILE__;
 //////////////////////////////////////////////////////////////////////
 // DmaChannelMgr
 void TDmac::Transfer(const TDmaChannel& /*aChannel*/, const SDmaDesHdr& /*aHdr*/)
 	{
 	// TDmac needs to override this function if it has reported the channel
 	// type for which the PIL calls it.
-	__DMA_CANT_HAPPEN();
+	__DMA_UNREACHABLE_DEFAULT();
 	}
 void TDmac::Transfer(const TDmaChannel& /*aChannel*/, const SDmaDesHdr& /*aSrcHdr*/,
 					 const SDmaDesHdr& /*aDstHdr*/)
 	{
 	// TDmac needs to override this function if it has reported the channel
 	// type for which the PIL calls it.
-	__DMA_CANT_HAPPEN();
+	__DMA_UNREACHABLE_DEFAULT();
 	}
 TInt TDmac::PauseTransfer(const TDmaChannel& /*aChannel*/)
 	{
 			}
 #endif
 		}
 	else
 		{
-		iDesPool = new TDmaTransferArgs[iMaxDesCount];
+		iDesPool = Kern::Alloc(iMaxDesCount * sizeof(TDmaTransferArgs));
 		r = iDesPool ? KErrNone : KErrNoMemory;
 		}
 	return r;
 	}
 TInt TDmac::InitHwDes(const SDmaDesHdr& /*aHdr*/, const TDmaTransferArgs& /*aTransferArgs*/)
 	{
 	// concrete controller must override if SDmacCaps::iHwDescriptors set
-	__DMA_CANT_HAPPEN();
+	__DMA_UNREACHABLE_DEFAULT();
 	return KErrGeneral;
 	}
 TInt TDmac::InitSrcHwDes(const SDmaDesHdr& /*aHdr*/, const TDmaTransferArgs& /*aTransferArgs*/)
 	{
 	// concrete controller must override if SDmacCaps::iAsymHwDescriptors set
-	__DMA_CANT_HAPPEN();
+	__DMA_UNREACHABLE_DEFAULT();
 	return KErrGeneral;
 	}
 TInt TDmac::InitDstHwDes(const SDmaDesHdr& /*aHdr*/, const TDmaTransferArgs& /*aTransferArgs*/)
 	{
 	// concrete controller must override if SDmacCaps::iAsymHwDescriptors set
-	__DMA_CANT_HAPPEN();
+	__DMA_UNREACHABLE_DEFAULT();
 	return KErrGeneral;
 	}
 TInt TDmac::UpdateDes(const SDmaDesHdr& aHdr, TUint32 aSrcAddr, TUint32 aDstAddr,
 TInt TDmac::UpdateHwDes(const SDmaDesHdr& /*aHdr*/, TUint32 /*aSrcAddr*/, TUint32 /*aDstAddr*/,
 						TUint /*aTransferCount*/, TUint32 /*aPslRequestInfo*/)
 	{
 	// concrete controller must override if SDmacCaps::iHwDescriptors set
-	__DMA_CANT_HAPPEN();
+	__DMA_UNREACHABLE_DEFAULT();
 	return KErrGeneral;
 	}
 TInt TDmac::UpdateSrcHwDes(const SDmaDesHdr& /*aHdr*/, TUint32 /*aSrcAddr*/,
 						   TUint /*aTransferCount*/, TUint32 /*aPslRequestInfo*/)
 	{
 	// concrete controller must override if SDmacCaps::iAsymHwDescriptors set
-	__DMA_CANT_HAPPEN();
+	__DMA_UNREACHABLE_DEFAULT();
 	return KErrGeneral;
 	}
 TInt TDmac::UpdateDstHwDes(const SDmaDesHdr& /*aHdr*/, TUint32 /*aDstAddr*/,
 						   TUint /*aTransferCount*/, TUint32 /*aPslRequestInfo*/)
 	{
 	// concrete controller must override if SDmacCaps::iAsymHwDescriptors set
-	__DMA_CANT_HAPPEN();
+	__DMA_UNREACHABLE_DEFAULT();
 	return KErrGeneral;
 	}
 void TDmac::ChainHwDes(const SDmaDesHdr& /*aHdr*/, const SDmaDesHdr& /*aNextHdr*/)
 	{
 	// concrete controller must override if SDmacCaps::iHwDescriptors set
-	__DMA_CANT_HAPPEN();
+	__DMA_UNREACHABLE_DEFAULT();
 	}
 void TDmac::AppendHwDes(const TDmaChannel& /*aChannel*/, const SDmaDesHdr& /*aLastHdr*/,
 						const SDmaDesHdr& /*aNewHdr*/)
 	{
 	// concrete controller must override if SDmacCaps::iHwDescriptors set
-	__DMA_CANT_HAPPEN();
+	__DMA_UNREACHABLE_DEFAULT();
 	}
 void TDmac::AppendHwDes(const TDmaChannel& /*aChannel*/,
 						const SDmaDesHdr& /*aSrcLastHdr*/, const SDmaDesHdr& /*aSrcNewHdr*/,
 						const SDmaDesHdr& /*aDstLastHdr*/, const SDmaDesHdr& /*aDstNewHdr*/)
 	{
 	// concrete controller must override if SDmacCaps::iAsymHwDescriptors set
-	__DMA_CANT_HAPPEN();
+	__DMA_UNREACHABLE_DEFAULT();
 	}
 void TDmac::UnlinkHwDes(const TDmaChannel& /*aChannel*/, SDmaDesHdr& /*aHdr*/)
 	{
 	// concrete controller must override if SDmacCaps::iHwDescriptors set
-	__DMA_CANT_HAPPEN();
+	__DMA_UNREACHABLE_DEFAULT();
 	}
 void TDmac::ClearHwDes(const SDmaDesHdr& /*aHdr*/)
 	{
 TUint32 TDmac::HwDesNumDstElementsTransferred(const SDmaDesHdr& /*aHdr*/)
 	{
 	// Concrete controller must override if SDmacCaps::iHwDescriptors set.
-	__DMA_CANT_HAPPEN();
+	__DMA_UNREACHABLE_DEFAULT();
 	return 0;
 	}
 TUint32 TDmac::HwDesNumSrcElementsTransferred(const SDmaDesHdr& /*aHdr*/)
 	{
 	// Concrete controller must override if SDmacCaps::iHwDescriptors set.
-	__DMA_CANT_HAPPEN();
+	__DMA_UNREACHABLE_DEFAULT();
 	return 0;
 	}
 #ifdef _DEBUG
 		}
 	return KErrNone;
 	}
-TInt DDmaRequest::CheckMemFlags(const TDmaTransferConfig& aTarget, TUint aCount) const
+TInt DDmaRequest::CheckMemFlags(const TDmaTransferConfig& aTarget) const
 	{
 	__KTRACE_OPT(KDMA, Kern::Printf("DDmaRequest::CheckMemFlags"));
 	const TBool mem_target = (aTarget.iFlags & KDmaMemAddr);
 									aFragSize, aElementSize, aFrameSize));
 	TUint rem = 0;
 	TInt r = KErrNone;
-	while (1)
+	FOREVER
 		{
 		// If an element size is defined, make sure the fragment size is
 		// greater or equal.
 		if (aElementSize)
 			{
 	// Set the channel cookie for the PSL
 	aTransferArgs.iChannelCookie = iChannel.PslId();
 	// Client shouldn't specify contradictory or invalid things
-	TInt r = CheckMemFlags(aTransferArgs.iSrcConfig, count);
+	TInt r = CheckMemFlags(aTransferArgs.iSrcConfig);
 	if (r != KErrNone)
 		{
 		__KTRACE_OPT(KPANIC, Kern::Printf("Error: CheckMemFlags(src)"));
 		return r;
 		}
-	r =  CheckMemFlags(aTransferArgs.iDstConfig, count);
+	r =  CheckMemFlags(aTransferArgs.iDstConfig);
 	if (r != KErrNone)
 		{
 		__KTRACE_OPT(KPANIC, Kern::Printf("Error: CheckMemFlags(dst)"));
 		return r;
 		}
 	__DMA_ASSERTD(!mem_dst || ((dst.iAddr & align_mask_dst) == 0));
 	// Max aligned length is used to make sure the beginnings of subtransfers
 	// (i.e. fragments) are correctly aligned.
 	const TUint max_aligned_len = (aMaxTransferLen &
-								   ~(Max(align_mask_src, align_mask_dst)));
+								   ~(_Max(align_mask_src, align_mask_dst)));
 	__KTRACE_OPT(KDMA, Kern::Printf("max_aligned_len: %d", max_aligned_len));
 	// Client and PSL sane?
 	__DMA_ASSERTD(max_aligned_len > 0);
 	if (mem_src && mem_dst &&
 		if (r != KErrNone)
 			{
 			break;
 			}
 		// Compute fragment size
-		TUint c = Min(aMaxTransferLen, aCount);
+		TUint c = _Min(aMaxTransferLen, aCount);
-		__KTRACE_OPT(KDMA, Kern::Printf("c = Min(aMaxTransferLen, aCount) = %d", c));
+		__KTRACE_OPT(KDMA, Kern::Printf("c = _Min(aMaxTransferLen, aCount) = %d", c));
 		// SRC
 		if (mem_src && !(src.iFlags & KDmaMemIsContiguous))
 			{
 			c = MaxPhysSize(src.iAddr, c);
 		if (r != KErrNone)
 			{
 			break;
 			}
 		// Compute fragment size
-		TUint c = Min(aMaxTransferLen, aCount);
+		TUint c = _Min(aMaxTransferLen, aCount);
-		__KTRACE_OPT(KDMA, Kern::Printf("c = Min(aMaxTransferLen, aCount) = %d", c));
+		__KTRACE_OPT(KDMA, Kern::Printf("c = _Min(aMaxTransferLen, aCount) = %d", c));
 		if (mem_src && !(src.iFlags & KDmaMemIsContiguous))
 			{
 			c = MaxPhysSize(src.iAddr, c);
 			__KTRACE_OPT(KDMA, Kern::Printf("c = MaxPhysSize(src.iAddr, c) = %d", c));
 		if (r != KErrNone)
 			{
 			break;
 			}
 		// Compute fragment size
-		TUint c = Min(aMaxTransferLen, aCount);
+		TUint c = _Min(aMaxTransferLen, aCount);
-		__KTRACE_OPT(KDMA, Kern::Printf("c = Min(aMaxTransferLen, aCount) = %d", c));
+		__KTRACE_OPT(KDMA, Kern::Printf("c = _Min(aMaxTransferLen, aCount) = %d", c));
 		if (mem_dst && !(dst.iFlags & KDmaMemIsContiguous))
 			{
 			c = MaxPhysSize(dst.iAddr, c);
 			__KTRACE_OPT(KDMA, Kern::Printf("c = MaxPhysSize(dst.iAddr, c) = %d", c));
 	__DMA_ASSERTD(!mem_dst || ((dst.iAddr & align_mask_dst) == 0));
 	// Max aligned length is used to make sure the beginnings of subtransfers
 	// (i.e. fragments) are correctly aligned.
 	const TUint max_aligned_len = (aMaxTransferLen &
-								   ~(Max(align_mask_src, align_mask_dst)));
+								   ~(_Max(align_mask_src, align_mask_dst)));
 	__KTRACE_OPT(KDMA, Kern::Printf("max_aligned_len: %d", max_aligned_len));
 	// Client and PSL sane?
 	__DMA_ASSERTD(max_aligned_len > 0);
 	if (mem_src && mem_dst &&
 	TInt r;
 	// Revert any previous fragmentation attempt
 	FreeSrcDesList();
 	FreeDstDesList();
+	__DMA_ASSERTD(iSrcDesCount == iDstDesCount);
 	do
 		{
 		// Allocate fragment
 		r = ExpandSrcDesList(/*1*/);
 		if (r != KErrNone)
 		r = ExpandDstDesList(/*1*/);
 		if (r != KErrNone)
 			{
 			break;
 			}
+		__DMA_ASSERTD(iSrcDesCount == iDstDesCount);
 		// Compute fragment size
-		TUint c = Min(aMaxTransferLen, aCount);
+		TUint c = _Min(aMaxTransferLen, aCount);
-		__KTRACE_OPT(KDMA, Kern::Printf("c = Min(aMaxTransferLen, aCount) = %d", c));
+		__KTRACE_OPT(KDMA, Kern::Printf("c = _Min(aMaxTransferLen, aCount) = %d", c));
 		// SRC
 		if (mem_src && !(src.iFlags & KDmaMemIsContiguous))
 			{
 			c = MaxPhysSize(src.iAddr, c);
 	{
 	__KTRACE_OPT(KDMA, Kern::Printf("DDmaRequest::Queue thread %O", &Kern::CurrentThread()));
 	// Not configured? Call Fragment() first!
 	if (iChannel.iDmacCaps->iAsymHwDescriptors)
 		{
-		__DMA_ASSERTD((iSrcDesCount < 0) && (iDstDesCount < 0));
+		__DMA_ASSERTD((iSrcDesCount > 0) && (iDstDesCount > 0));
 		}
 	else
 		{
 		__DMA_ASSERTD(iDesCount > 0);
 		}
 	// Append request to queue and link new descriptor list to existing one.
 	iChannel.Wait();
 	TUint32 req_count = iChannel.iQueuedRequests++;
-	if (req_count == 0)
+	if (iChannel.iCallQueuedRequestFn)
 		{
-		iChannel.Signal();
+		if (req_count == 0)
-		iChannel.QueuedRequestCountChanged();
+			{
-		iChannel.Wait();
+			iChannel.Signal();
+			iChannel.QueuedRequestCountChanged();
+			iChannel.Wait();
+			}
 		}
 	TInt r = KErrGeneral;
 	const TBool ch_isr_cb = __e32_atomic_load_acq32(&iChannel.iIsrCbRequest);
 	if (ch_isr_cb)
 		__KTRACE_OPT(KPANIC, Kern::Printf("An ISR cb request exists - not queueing"));
 		// Undo the request count increment...
 		req_count = --iChannel.iQueuedRequests;
 		__DMA_INVARIANT();
 		iChannel.Signal();
-		if (req_count == 0)
+		if (iChannel.iCallQueuedRequestFn)
 			{
-			iChannel.QueuedRequestCountChanged();
+			if (req_count == 0)
+				{
+				iChannel.QueuedRequestCountChanged();
+				}
 			}
 		}
 	else if (iIsrCb && !iChannel.IsQueueEmpty())
 		{
 		// Client mustn't try to queue an ISR callback request whilst any
 		__KTRACE_OPT(KPANIC, Kern::Printf("Request queue not empty - not queueing"));
 		// Undo the request count increment...
 		req_count = --iChannel.iQueuedRequests;
 		__DMA_INVARIANT();
 		iChannel.Signal();
-		if (req_count == 0)
+		if (iChannel.iCallQueuedRequestFn)
 			{
-			iChannel.QueuedRequestCountChanged();
+			if (req_count == 0)
+				{
+				iChannel.QueuedRequestCountChanged();
+				}
 			}
 		}
 	else if (iChannel.iIsrDfc & (TUint32)TDmaChannel::KCancelFlagMask)
 		{
 		__KTRACE_OPT(KPANIC, Kern::Printf("Channel requests cancelled - not queueing"));
 		// Someone is cancelling all requests - undo the request count increment...
 		req_count = --iChannel.iQueuedRequests;
 		__DMA_INVARIANT();
 		iChannel.Signal();
-		if (req_count == 0)
+		if (iChannel.iCallQueuedRequestFn)
 			{
-			iChannel.QueuedRequestCountChanged();
+			if (req_count == 0)
+				{
+				iChannel.QueuedRequestCountChanged();
+				}
 			}
 		}
 	else
 		{
 		iQueued = ETrue;
 		iChannel.iReqQ.Add(&iLink);
-		// iChannel.iNullPtr points to iChannel.iCurHdr for an empty queue
+		iChannel.SetNullPtr(*this);
-		*iChannel.iNullPtr = iFirstHdr;
-		iChannel.iNullPtr = &(iLastHdr->iNext);
 		if (iIsrCb)
 			{
 			// Since we've made sure that there is no other request in the
 			// queue before this, the only thing of relevance is the channel
 			// DFC which might yet have to complete for the previous request,
 			// the client callback. This should be all right though as once
 			// we've set the following flag no further Queue()'s will be
 			// possible.
 			__e32_atomic_store_rel32(&iChannel.iIsrCbRequest, ETrue);
 			}
-		iChannel.DoQueue(const_cast<const DDmaRequest&>(*this));
+		iChannel.DoQueue(*this);
 		r = KErrNone;
 		__DMA_INVARIANT();
 		iChannel.Signal();
 		}
 EXPORT_C TUint32 DDmaRequest::TotalNumSrcElementsTransferred()
 	{
 	__KTRACE_OPT(KDMA, Kern::Printf("DDmaRequest::TotalNumSrcElementsTransferred"));
 	// Not yet implemented.
-	// So far largely bogus code (just to touch some symbols)...
-	iTotalNumSrcElementsTransferred = 0;
-	TDmac& c = *(iChannel.iController);
-	if (c.iCapsHwDes)
-		{
-		for (const SDmaDesHdr* pH = iFirstHdr; pH != NULL; pH = pH->iNext)
-			{
-			iTotalNumSrcElementsTransferred += c.HwDesNumDstElementsTransferred(*pH);
-			}
-		}
-	else
-		{
-		// Do something different for pseudo descriptors...
-		}
 	return iTotalNumSrcElementsTransferred;
 	}
 EXPORT_C TUint32 DDmaRequest::TotalNumDstElementsTransferred()
 		{
 		__DMA_ASSERTD((0 <= iSrcDesCount) && (iSrcDesCount <= iChannel.iMaxDesCount) &&
 					  (0 <= iDstDesCount) && (iDstDesCount <= iChannel.iMaxDesCount));
 		if (iSrcDesCount == 0)
 			{
+			// Not fragmented yet
 			__DMA_ASSERTD(iDstDesCount == 0);
 			__DMA_ASSERTD(!iQueued);
 			__DMA_ASSERTD(!iSrcFirstHdr && !iSrcLastHdr &&
 						  !iDstFirstHdr && !iDstLastHdr);
 			}
+		else if (iDstDesCount == 0)
+			{
+			// Src side only fragmented yet
+			__DMA_ASSERTD(iChannel.iController->IsValidHdr(iSrcFirstHdr));
+			__DMA_ASSERTD(iChannel.iController->IsValidHdr(iSrcLastHdr));
+			}
 		else
 			{
+			// Src & Dst sides fragmented
 			__DMA_ASSERTD(iChannel.iController->IsValidHdr(iSrcFirstHdr));
 			__DMA_ASSERTD(iChannel.iController->IsValidHdr(iSrcLastHdr));
 			__DMA_ASSERTD(iChannel.iController->IsValidHdr(iDstFirstHdr));
 			__DMA_ASSERTD(iChannel.iController->IsValidHdr(iDstLastHdr));
-			}
-		if (iChannel.iDmacCaps->iBalancedAsymSegments)
-			{
-			__DMA_ASSERTD(iSrcDesCount == iDstDesCount);
 			}
 		}
 	else
 		{
 		__DMA_ASSERTD((0 <= iDesCount) && (iDesCount <= iChannel.iMaxDesCount));
 	  iAvailDesCount(0),
 	  iIsrDfc(0),
 	  iReqQ(),
 	  iReqCount(0),
 	  iQueuedRequests(0),
+	  iCallQueuedRequestFn(ETrue),
 	  iCancelInfo(NULL),
 	  iRedoRequest(EFalse),
 	  iIsrCbRequest(EFalse)
 	{
 	__KTRACE_OPT(KDMA, Kern::Printf("TDmaChannel::TDmaChannel =0x%08X", this));
 		// There is a transfer in progress. It may complete before the DMAC
 		// has stopped, but the resulting ISR will not post a DFC.
 		// ISR should not happen after this function returns.
 		iController->StopTransfer(*this);
-		ResetStateMachine();
+		DoCancelAll();
+		ResetNullPtr();
 		// Clean-up the request queue.
 		SDblQueLink* pL;
 		while ((pL = iReqQ.GetFirst()) != NULL)
 			{
 	NKern::ThreadLeaveCS();
 	// Only call PSL if there were requests queued when we entered AND there
 	// are now no requests left on the queue.
-	if ((req_count_before != 0) && (req_count_after == 0))
+	if (iCallQueuedRequestFn)
 		{
-		QueuedRequestCountChanged();
+		if ((req_count_before != 0) && (req_count_after == 0))
+			{
+			QueuedRequestCountChanged();
+			}
 		}
 	__DMA_INVARIANT();
 	}
 			TBool complete;
 			if (iDmacCaps->iAsymHwDescriptors)
 				{
 				SDmaDesHdr* pCompletedSrcHdr = NULL;
 				SDmaDesHdr* pCompletedDstHdr = NULL;
-				DoDfc(const_cast<const DDmaRequest&>(*pCurReq),
+				DoDfc(*pCurReq, pCompletedSrcHdr, pCompletedDstHdr);
-					  pCompletedSrcHdr, pCompletedDstHdr);
 				// We don't support asymmetrical ISR notifications and request
 				// completions yet, hence we can do the following assert test
 				// here; also 'complete' is determined equally by either the
 				// SRC or DST side.
 				__DMA_ASSERTD(!LOGICAL_XOR((pCompletedSrcHdr == pCurReq->iSrcLastHdr),
 				complete = (pCompletedDstHdr == pCurReq->iDstLastHdr);
 				}
 			else
 				{
 				SDmaDesHdr* pCompletedHdr = NULL;
-				DoDfc(const_cast<const DDmaRequest&>(*pCurReq), pCompletedHdr);
+				DoDfc(*pCurReq, pCompletedHdr);
 				complete = (pCompletedHdr == pCurReq->iLastHdr);
 				}
 			// If just completed last fragment from current request, switch to
 			// next request (if any).
 			if (complete)
 				{
 				pCompletedReq = pCurReq;
 				pCurReq->iLink.Deque();
 				iQueuedRequests--;
 				if (iReqQ.IsEmpty())
-					iNullPtr = &iCurHdr;
+					ResetNullPtr();
 				pCompletedReq->OnDeque();
 				}
 			}
 		else
 			{
 		}
 	// Only call PSL if there were requests queued when we entered AND there
 	// are now no requests left on the queue (after also having executed all
 	// client callbacks).
-	if ((req_count_before != 0) && (req_count_after == 0))
+	if (iCallQueuedRequestFn)
 		{
-		QueuedRequestCountChanged();
+		if ((req_count_before != 0) && (req_count_after == 0))
+			{
+			QueuedRequestCountChanged();
+			}
 		}
 	__DMA_INVARIANT();
 	}
-//
-// Reset state machine only, request queue is unchanged */
-//
-void TDmaChannel::ResetStateMachine()
-	{
-	DoCancelAll();
-	iCurHdr = NULL;
-	iNullPtr = &iCurHdr;
-	}
 void TDmaChannel::DoQueue(const DDmaRequest& /*aReq*/)
 	{
 	// Must be overridden
-	__DMA_CANT_HAPPEN();
+	__DMA_UNREACHABLE_DEFAULT();
 	}
 //
 // Unlink the last item of a LLI chain from the next chain.
 void TDmaChannel::DoDfc(const DDmaRequest& /*aCurReq*/, SDmaDesHdr*& /*aCompletedHdr*/)
 	{
 	// To make sure this version of the function isn't called for channels for
 	// which it isn't appropriate (and which therefore don't override it) we
 	// put this check in here.
-	__DMA_CANT_HAPPEN();
+	__DMA_UNREACHABLE_DEFAULT();
 	}
 void TDmaChannel::DoDfc(const DDmaRequest& /*aCurReq*/, SDmaDesHdr*& /*aSrcCompletedHdr*/,
 						SDmaDesHdr*& /*aDstCompletedHdr*/)
 	{
 	// To make sure this version of the function isn't called for channels for
 	// which it isn't appropriate (and which therefore don't override it) we
 	// put this check in here.
-	__DMA_CANT_HAPPEN();
+	__DMA_UNREACHABLE_DEFAULT();
+	}
+void TDmaChannel::SetNullPtr(const DDmaRequest& aReq)
+	{
+	// iNullPtr points to iCurHdr for an empty queue
+	*iNullPtr = aReq.iFirstHdr;
+	iNullPtr = &(aReq.iLastHdr->iNext);
+	}
+void TDmaChannel::ResetNullPtr()
+	{
+	iCurHdr = NULL;
+	iNullPtr = &iCurHdr;
 	}
 /** PSL may override */
 void TDmaChannel::QueuedRequestCountChanged()
 	{
-#ifdef _DEBUG
+	__KTRACE_OPT(KDMA, Kern::Printf("TDmaChannel::QueuedRequestCountChanged(): "
+									"disabling further calls"));
 	Wait();
-	__KTRACE_OPT(KDMA,
+	iCallQueuedRequestFn = EFalse;
-				 Kern::Printf("TDmaChannel::QueuedRequestCountChanged() %d",
-							  iQueuedRequests));
-	__DMA_ASSERTA(iQueuedRequests >= 0);
 	Signal();
-#endif
 	}
 #ifdef _DEBUG
 void TDmaChannel::Invariant()
 //////////////////////////////////////////////////////////////////////////////
 // TDmaAsymSgChannel
+TDmaAsymSgChannel::TDmaAsymSgChannel()
+	: iSrcCurHdr(NULL),
+	  iSrcNullPtr(&iSrcCurHdr),
+	  iDstCurHdr(NULL),
+	  iDstNullPtr(&iDstCurHdr)
+	{
+	__DMA_INVARIANT();
+	}
+void TDmaAsymSgChannel::SetNullPtr(const DDmaRequest& aReq)
+	{
+	// i{Src|Dst}NullPtr points to i{Src|Dst}CurHdr for an empty queue
+	*iSrcNullPtr = aReq.iSrcFirstHdr;
+	*iDstNullPtr = aReq.iDstFirstHdr;
+	iSrcNullPtr = &(aReq.iSrcLastHdr->iNext);
+	iDstNullPtr = &(aReq.iDstLastHdr->iNext);
+	}
+void TDmaAsymSgChannel::ResetNullPtr()
+	{
+	iSrcCurHdr = NULL;
+	iSrcNullPtr = &iSrcCurHdr;
+	iDstCurHdr = NULL;
+	iDstNullPtr = &iDstCurHdr;
+	}
 void TDmaAsymSgChannel::DoQueue(const DDmaRequest& aReq)
 	{
 	if (iState == ETransferring)
 		{
 		__DMA_ASSERTD(!aReq.iLink.Alone());
 	// Must be either both NULL or none of them.
 	__DMA_ASSERTD(!LOGICAL_XOR(iSrcCurHdr, iDstCurHdr));
 	iState = (iSrcCurHdr != NULL) ? ETransferring : EIdle;
 	}
+#ifdef _DEBUG
+void TDmaAsymSgChannel::Invariant()
+	{
+	Wait();
+	__DMA_ASSERTD(iReqCount >= 0);
+	__DMA_ASSERTD(iSrcCurHdr == NULL || iController->IsValidHdr(iSrcCurHdr));
+	__DMA_ASSERTD(iDstCurHdr == NULL || iController->IsValidHdr(iDstCurHdr));
+	// should always point to NULL pointer ending fragment queue
+	__DMA_ASSERTD(*iSrcNullPtr == NULL);
+	__DMA_ASSERTD(*iDstNullPtr == NULL);
+	__DMA_ASSERTD((0 <= iAvailDesCount) && (iAvailDesCount <= iMaxDesCount));
+	__DMA_ASSERTD((iSrcCurHdr && iDstCurHdr && !IsQueueEmpty()) ||
+				  (!iSrcCurHdr && !iDstCurHdr && IsQueueEmpty()));
+	if (iSrcCurHdr == NULL)
+		{
+		__DMA_ASSERTD(iSrcNullPtr == &iSrcCurHdr);
+		}
+	if (iDstCurHdr == NULL)
+		{
+		__DMA_ASSERTD(iDstNullPtr == &iDstCurHdr);
+		}
+	Signal();
+	}
+#endif

changeset 247	d8d70de2bd36
parent 139	95f71bcdcdb7