40 #define __DMA_ASSERTD(e) __ASSERT_DEBUG(e, Kern::Fault(KDmaPanicCat, __LINE__)) |
40 #define __DMA_ASSERTD(e) __ASSERT_DEBUG(e, Kern::Fault(KDmaPanicCat, __LINE__)) |
41 #define __DMA_ASSERTA(e) __ASSERT_ALWAYS(e, Kern::Fault(KDmaPanicCat, __LINE__)) |
41 #define __DMA_ASSERTA(e) __ASSERT_ALWAYS(e, Kern::Fault(KDmaPanicCat, __LINE__)) |
42 #ifdef _DEBUG |
42 #ifdef _DEBUG |
43 #define __DMA_CANT_HAPPEN() Kern::Fault(KDmaPanicCat, __LINE__) |
43 #define __DMA_CANT_HAPPEN() Kern::Fault(KDmaPanicCat, __LINE__) |
44 #define __DMA_DECLARE_INVARIANT public: void Invariant(); |
44 #define __DMA_DECLARE_INVARIANT public: void Invariant(); |
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45 #define __DMA_DECLARE_VIRTUAL_INVARIANT public: virtual void Invariant(); |
45 #define __DMA_INVARIANT() Invariant() |
46 #define __DMA_INVARIANT() Invariant() |
46 #else |
47 #else |
47 #define __DMA_CANT_HAPPEN() |
48 #define __DMA_CANT_HAPPEN() |
48 #define __DMA_DECLARE_INVARIANT |
49 #define __DMA_DECLARE_INVARIANT |
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50 #define __DMA_DECLARE_VIRTUAL_INVARIANT |
49 #define __DMA_INVARIANT() |
51 #define __DMA_INVARIANT() |
50 #endif |
52 #endif |
51 |
53 |
|
54 #ifdef __DMASIM__ |
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55 #ifdef __PRETTY_FUNCTION__ |
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56 #define __DMA_UNREACHABLE_DEFAULT() DMA_PSL_TRACE1("Calling default virtual: %s", __PRETTY_FUNCTION__) |
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57 #else |
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58 #define __DMA_UNREACHABLE_DEFAULT() DMA_PSL_TRACE("Calling default virtual function") |
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59 #endif |
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60 #else |
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61 #define __DMA_UNREACHABLE_DEFAULT() __DMA_CANT_HAPPEN() |
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62 #endif |
52 |
63 |
53 ////////////////////////////////////////////////////////////////////////////// |
64 ////////////////////////////////////////////////////////////////////////////// |
54 // INTERFACE EXPOSED TO DEVICE-DRIVERS |
65 // INTERFACE EXPOSED TO DEVICE-DRIVERS |
55 ////////////////////////////////////////////////////////////////////////////// |
66 ////////////////////////////////////////////////////////////////////////////// |
56 |
67 |
635 IMPORT_C TInt DstFragmentCount(); |
646 IMPORT_C TInt DstFragmentCount(); |
636 |
647 |
637 private: |
648 private: |
638 inline void OnDeque(); |
649 inline void OnDeque(); |
639 TInt CheckTransferConfig(const TDmaTransferConfig& aTarget, TUint aCount) const; |
650 TInt CheckTransferConfig(const TDmaTransferConfig& aTarget, TUint aCount) const; |
640 TInt CheckMemFlags(const TDmaTransferConfig& aTarget, TUint aCount) const; |
651 TInt CheckMemFlags(const TDmaTransferConfig& aTarget) const; |
641 TInt AdjustFragmentSize(TUint& aFragSize, TUint aElementSize, TUint aFrameSize); |
652 TInt AdjustFragmentSize(TUint& aFragSize, TUint aElementSize, TUint aFrameSize); |
642 TUint GetTransferCount(const TDmaTransferArgs& aTransferArgs) const; |
653 TUint GetTransferCount(const TDmaTransferArgs& aTransferArgs) const; |
643 TUint GetMaxTransferlength(const TDmaTransferArgs& aTransferArgs, TUint aCount) const; |
654 TUint GetMaxTransferlength(const TDmaTransferArgs& aTransferArgs, TUint aCount) const; |
644 TInt Frag(TDmaTransferArgs& aTransferArgs); |
655 TInt Frag(TDmaTransferArgs& aTransferArgs); |
645 TInt FragSym(TDmaTransferArgs& aTransferArgs, TUint aCount, TUint aMaxTransferLen); |
656 TInt FragSym(TDmaTransferArgs& aTransferArgs, TUint aCount, TUint aMaxTransferLen); |
1230 }; |
1236 }; |
1231 |
1237 |
1232 void TFooDmaChannel::QueuedRequestCountChanged() |
1238 void TFooDmaChannel::QueuedRequestCountChanged() |
1233 { |
1239 { |
1234 Kern::MutexWait(*iDmaMutex); |
1240 Kern::MutexWait(*iDmaMutex); |
1235 if ((iQueuedRequests > 0) && (iPrevQueuedRequests == 0)) |
1241 const TInt queued_now = __e32_atomic_load_acq32(&iQueuedRequests); |
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1242 if ((queued_now > 0) && (iPrevQueuedRequests == 0)) |
1236 { |
1243 { |
1237 IncreasePowerCount(); // Base port specific |
1244 IncreasePowerCount(); // Base port specific |
1238 } |
1245 } |
1239 else if ((iQueuedRequests == 0) && (iPrevQueuedRequests > 0)) |
1246 else if ((queued_now == 0) && (iPrevQueuedRequests > 0)) |
1240 { |
1247 { |
1241 DecreasePowerCount(); // Base port specific |
1248 DecreasePowerCount(); // Base port specific |
1242 } |
1249 } |
1243 iPrevQueuedRequests = iQueuedRequests; |
1250 iPrevQueuedRequests = queued_now; |
1244 Kern::MutexSignal(*iDmaMutex); |
1251 Kern::MutexSignal(*iDmaMutex); |
1245 } |
1252 } |
1246 |
1253 |
1247 @endcode |
1254 @endcode |
1248 |
1255 |
1249 @see iQueuedRequests |
1256 @see iQueuedRequests |
1250 */ |
1257 */ |
1251 virtual void QueuedRequestCountChanged(); |
1258 virtual void QueuedRequestCountChanged(); |
1252 |
1259 |
1253 #if defined(__CPU_ARM) && !defined(__EABI__) |
1260 virtual void SetNullPtr(const DDmaRequest& aReq); |
1254 inline virtual ~TDmaChannel() {} // kill really annoying warning |
1261 virtual void ResetNullPtr(); |
1255 #endif |
1262 |
|
1263 inline virtual ~TDmaChannel() {} |
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1264 |
|
1265 inline void Wait(); |
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1266 inline void Signal(); |
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1267 inline TBool Flash(); |
1256 |
1268 |
1257 private: |
1269 private: |
1258 static void Dfc(TAny*); |
1270 static void Dfc(TAny*); |
1259 void DoDfc(); |
1271 void DoDfc(); |
1260 inline void Wait(); |
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1261 inline void Signal(); |
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1262 inline TBool Flash(); |
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1263 void ResetStateMachine(); |
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1264 |
1272 |
1265 protected: |
1273 protected: |
1266 TDmac* iController; // DMAC this channel belongs to (NULL when closed) |
1274 TDmac* iController; // DMAC this channel belongs to (NULL when closed) |
1267 const SDmacCaps* iDmacCaps; // what is supported by DMAC on this channel |
1275 const SDmacCaps* iDmacCaps; // what is supported by DMAC on this channel |
1268 TUint32 iPslId; // unique identifier provided by PSL |
1276 TUint32 iPslId; // unique identifier provided by PSL |
1279 enum {KCancelFlagMask = 0x40000000}; // bit 30 - cancel flag |
1287 enum {KCancelFlagMask = 0x40000000}; // bit 30 - cancel flag |
1280 enum {KDfcCountMask = 0x3FFFFFFF}; // bits 0-29 - number of queued DFCs |
1288 enum {KDfcCountMask = 0x3FFFFFFF}; // bits 0-29 - number of queued DFCs |
1281 SDblQue iReqQ; // being/about to be transferred request queue |
1289 SDblQue iReqQ; // being/about to be transferred request queue |
1282 TInt iReqCount; // number of requests attached to this channel |
1290 TInt iReqCount; // number of requests attached to this channel |
1283 TInt iQueuedRequests; // number of requests currently queued on this channel |
1291 TInt iQueuedRequests; // number of requests currently queued on this channel |
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1292 TBool iCallQueuedRequestFn; // call QueuedRequestCountChanged? (default: true) |
1284 |
1293 |
1285 private: |
1294 private: |
1286 TDmaCancelInfo* iCancelInfo; // ... |
1295 TDmaCancelInfo* iCancelInfo; // ... |
1287 TBool iRedoRequest; // client ISR callback wants a redo of request |
1296 TBool iRedoRequest; // client ISR callback wants a redo of request |
1288 TBool iIsrCbRequest; // request on queue using ISR callback |
1297 TBool iIsrCbRequest; // request on queue using ISR callback |
1289 |
1298 |
1290 __DMA_DECLARE_INVARIANT |
1299 __DMA_DECLARE_VIRTUAL_INVARIANT |
1291 }; |
1300 }; |
1292 |
1301 |
1293 |
1302 |
1294 ////////////////////////////////////////////////////////////////////////////// |
1303 ////////////////////////////////////////////////////////////////////////////// |
1295 // INTERFACE WITH TEST HARNESS |
1304 // INTERFACE WITH TEST HARNESS |