1195 requests count has changed in a significant way, either before the |
1195 requests count has changed in a significant way, either before the |
1196 channel's Transfer() method is invoked for a request on a previously |
1196 channel's Transfer() method is invoked for a request on a previously |
1197 empty request queue, or immediately after the request count has become |
1197 empty request queue, or immediately after the request count has become |
1198 zero because of request cancellation or completion. |
1198 zero because of request cancellation or completion. |
1199 |
1199 |
1200 Depending on the current value of iQueuedRequests, the PSL may power |
1200 Depending on the current and previous observed values of |
1201 down or power up the channel. Note that iQueuedRequests gets accessed |
1201 iQueuedRequests, the PSL may power down or power up the channel. |
1202 and changed by different threads, so the PSL needs to take the usual |
1202 |
1203 precautions when evaluating the variable's value. |
1203 Note that iQueuedRequests gets accessed and changed by different |
|
1204 threads, so the PSL needs to take the usual precautions when evaluating |
|
1205 the variable's value. Also, due to the multithreaded framework |
|
1206 architecture, there is no guarantee that the function calls always |
|
1207 arrive at the PSL level in the strict chronological order of |
|
1208 iQueuedRequests being incremented/decremented in the PIL, i.e. it might |
|
1209 happen that the PSL finds iQueuedRequests to have the same value in two |
|
1210 or more consecutive calls (that's why the previous observed value needs |
|
1211 to be locally available and taken into account). It is however promised |
|
1212 that before any actual transfer commences the PSL will find the request |
|
1213 count to be greater than zero and that after the last request has |
|
1214 finished it will be found to be zero. |
1204 |
1215 |
1205 None of the internal DMA framework mutexes is being held by the PIL |
1216 None of the internal DMA framework mutexes is being held by the PIL |
1206 when calling this function. |
1217 when calling this function. |
|
1218 |
|
1219 Here is an example implementation for a derived channel class: |
|
1220 |
|
1221 @code |
|
1222 |
|
1223 class TFooDmaChannel : public TDmaSgChannel |
|
1224 { |
|
1225 DMutex* iDmaMutex; |
|
1226 TInt iPrevQueuedRequests; |
|
1227 virtual void QueuedRequestCountChanged(); |
|
1228 }; |
|
1229 |
|
1230 void TFooDmaChannel::QueuedRequestCountChanged() |
|
1231 { |
|
1232 Kern::MutexWait(*iDmaMutex); |
|
1233 if ((iQueuedRequests > 0) && (iPrevQueuedRequests == 0)) |
|
1234 { |
|
1235 IncreasePowerCount(); // Base port specific |
|
1236 } |
|
1237 else if ((iQueuedRequests == 0) && (iPrevQueuedRequests > 0)) |
|
1238 { |
|
1239 DecreasePowerCount(); // Base port specific |
|
1240 } |
|
1241 iPrevQueuedRequests = iQueuedRequests; |
|
1242 Kern::MutexSignal(*iDmaMutex); |
|
1243 } |
|
1244 |
|
1245 @endcode |
1207 |
1246 |
1208 @see iQueuedRequests |
1247 @see iQueuedRequests |
1209 */ |
1248 */ |
1210 virtual void QueuedRequestCountChanged(); |
1249 virtual void QueuedRequestCountChanged(); |
1211 |
1250 |