halservices/hal/src/hal_gcc_shim.cia
author Arnaud Lenoir
Wed, 24 Mar 2010 19:34:20 +0000
branchRCL_3
changeset 83 9c05cd6b0b99
parent 0 a41df078684a
child 148 31ea0f8e3c99
permissions -rw-r--r--
Comment out the line with rofs for f32tests.oby and comment out the variant bit to allow to build e32 & f32 tests for kernelhwsrv.

//
// HAL_GCC_SHIM.CIA - generated by GENSHIMSRC.BAT
//

#include <e32def.h>
#include <e32const.h>
#include <cpudefs.h>


EXPORT_C __NAKED__ int export_at_ordinal_1()
//
// HAL::Get(HALData::TAttribute, int &)
//
	{
	asm("stmfd sp!, {r4,lr} ");
	asm("mov r4, sp ");
	asm("bic sp, sp, #4 ");
	asm("bl _ZN3HAL3GetEN7HALData10TAttributeERi ");
	asm("mov sp, r4 ");
	asm("ldmfd sp!, {r4,pc} ");
	}


EXPORT_C __NAKED__ int export_at_ordinal_2()
//
// HAL::Set(HALData::TAttribute, int)
//
	{
	asm("stmfd sp!, {r4,lr} ");
	asm("mov r4, sp ");
	asm("bic sp, sp, #4 ");
	asm("bl _ZN3HAL3SetEN7HALData10TAttributeEi ");
	asm("mov sp, r4 ");
	asm("ldmfd sp!, {r4,pc} ");
	}


EXPORT_C __NAKED__ int export_at_ordinal_3()
//
// HAL::GetAll(int &, HAL::SEntry *&)
//
	{
	asm("stmfd sp!, {r4,lr} ");
	asm("mov r4, sp ");
	asm("bic sp, sp, #4 ");
	asm("bl _ZN3HAL6GetAllERiRPNS_6SEntryE ");
	asm("mov sp, r4 ");
	asm("ldmfd sp!, {r4,pc} ");
	}